--- np2/i386c/ia32/instructions/shift_rotate.mcr	2004/03/23 15:29:34	1.9
+++ np2/i386c/ia32/instructions/shift_rotate.mcr	2011/12/20 03:00:44	1.14
@@ -1,5 +1,3 @@
-/*	$Id: shift_rotate.mcr,v 1.9 2004/03/23 15:29:34 monaka Exp $	*/
-
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
  * All rights reserved.
@@ -12,8 +10,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -38,7 +34,6 @@ static UINT32 \
 inst##1(UINT32 src, void *arg) \
 { \
 	UINT32 dst; \
-	(void)arg; \
 	BYTE_##inst##1(dst, src); \
 	return dst; \
 } \
@@ -46,7 +41,6 @@ static UINT32 \
 inst##2(UINT32 src, void *arg) \
 { \
 	UINT32 dst; \
-	(void)arg; \
 	WORD_##inst##1(dst, src); \
 	return dst; \
 } \
@@ -54,7 +48,6 @@ static UINT32 \
 inst##4(UINT32 src, void *arg) \
 { \
 	UINT32 dst; \
-	(void)arg; \
 	DWORD_##inst##1(dst, src); \
 	return dst; \
 } \
@@ -888,8 +881,9 @@ do { \
 			CPU_OV = ((s) >> 31) ^ tmp; \
 		} \
 		while ((c)--) { \
-			tmp = (s) & 1; \
+			UINT32 tmp2 = (s) & 1; \
 			(s) = (tmp << 31) | ((s) >> 1); \
+			tmp = tmp2; \
 		} \
 		CPU_FLAGL |= tmp; \
 	} \
@@ -969,16 +963,16 @@ do { \
 			CPU_OV = ((s) + 0x40000000) & 0x80000000; \
 		} \
 		while ((c)--) { \
-			tmp = (s) & 0x80000000; \
+			UINT32 tmp2 = (s) & 0x80000000; \
 			(s) = ((s) << 1) | (tmp & 1); \
-			tmp >>= 31; \
+			tmp = tmp2 >> 31; \
 		} \
 		CPU_FLAGL |= tmp; \
 	} \
 	(d) = (s); \
 } while (/*CONSTCOND*/ 0)
 
-#if defined(IA32_CROSS_CHECK) && defined(__GNUC__) && (defined(i386) || defined(i386))
+#if defined(IA32_CROSS_CHECK) && defined(GCC_CPU_ARCH_IA32)
 
 #include "shift_rotatexc.mcr"
 
@@ -1033,7 +1027,7 @@ do { \
 
 #include	"shift_rotatexc_msc.mcr"
 
-#else	/* !(IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__)) */
+#else	/* !(IA32_CROSS_CHECK && GCC_CPU_ARCH_IA32 */
 
 #define	BYTE_SAR1(d, s)		_BYTE_SAR1(d, s)
 #define	WORD_SAR1(d, s)		_WORD_SAR1(d, s)
@@ -1082,6 +1076,6 @@ do { \
 #define	WORD_RCLCL(d, s, c)	_WORD_RCLCL(d, s, c)
 #define	DWORD_RCLCL(d, s, c)	_DWORD_RCLCL(d, s, c)
 
-#endif	/* IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__) */
+#endif	/* IA32_CROSS_CHECK && GCC_CPU_ARCH_IA32 */
 
 #endif	/* IA32_CPU_SHIFT_ROTATE_MCR__ */