--- np2/i386c/ia32/instructions/shift_rotate.mcr	2004/03/23 15:29:34	1.9
+++ np2/i386c/ia32/instructions/shift_rotate.mcr	2005/03/12 12:33:48	1.11
@@ -1,4 +1,4 @@
-/*	$Id: shift_rotate.mcr,v 1.9 2004/03/23 15:29:34 monaka Exp $	*/
+/*	$Id: shift_rotate.mcr,v 1.11 2005/03/12 12:33:48 monaka Exp $	*/
 
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
@@ -12,8 +12,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -978,7 +976,7 @@ do { \
 	(d) = (s); \
 } while (/*CONSTCOND*/ 0)
 
-#if defined(IA32_CROSS_CHECK) && defined(__GNUC__) && (defined(i386) || defined(i386))
+#if defined(IA32_CROSS_CHECK) && defined(GCC_CPU_ARCH_IA32)
 
 #include "shift_rotatexc.mcr"
 
@@ -1033,7 +1031,7 @@ do { \
 
 #include	"shift_rotatexc_msc.mcr"
 
-#else	/* !(IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__)) */
+#else	/* !(IA32_CROSS_CHECK && GCC_CPU_ARCH_IA32 */
 
 #define	BYTE_SAR1(d, s)		_BYTE_SAR1(d, s)
 #define	WORD_SAR1(d, s)		_WORD_SAR1(d, s)
@@ -1082,6 +1080,6 @@ do { \
 #define	WORD_RCLCL(d, s, c)	_WORD_RCLCL(d, s, c)
 #define	DWORD_RCLCL(d, s, c)	_DWORD_RCLCL(d, s, c)
 
-#endif	/* IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__) */
+#endif	/* IA32_CROSS_CHECK && GCC_CPU_ARCH_IA32 */
 
 #endif	/* IA32_CPU_SHIFT_ROTATE_MCR__ */