--- np2/i386c/ia32/instructions/system_inst.c 2004/01/23 14:33:27 1.9 +++ np2/i386c/ia32/instructions/system_inst.c 2004/02/04 13:24:35 1.13 @@ -1,4 +1,4 @@ -/* $Id: system_inst.c,v 1.9 2004/01/23 14:33:27 monaka Exp $ */ +/* $Id: system_inst.c,v 1.13 2004/02/04 13:24:35 monaka Exp $ */ /* * Copyright (c) 2003 NONAKA Kimihiro @@ -51,7 +51,7 @@ LGDT_Ms(DWORD op) base &= 0x00ffffff; } -#if defined(DEBUG) +#if defined(MORE_DEBUG) gdtr_dump(base, limit); #endif @@ -59,6 +59,7 @@ LGDT_Ms(DWORD op) CPU_GDTR_LIMIT = limit; return; } + VERBOSE(("LGDT: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } EXCEPTION(UD_EXCEPTION, 0); @@ -104,8 +105,10 @@ LLDT_Ew(DWORD op) load_ldtr(src, GP_EXCEPTION); return; } + VERBOSE(("LLDT: CPL(%d) != 0", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } + VERBOSE(("LLDT: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -131,6 +134,7 @@ SLDT_Ew(DWORD op) } return; } + VERBOSE(("SLDT: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -152,8 +156,10 @@ LTR_Ew(DWORD op) load_tr(src); return; } + VERBOSE(("LTR: CPL(%d) != 0", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } + VERBOSE(("LTR: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -177,7 +183,9 @@ STR_Ew(DWORD op) madr = calc_ea_dst(op); cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, tr); } + return; } + VERBOSE(("STR: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -198,7 +206,7 @@ LIDT_Ms(DWORD op) base &= 0x00ffffff; } -#if defined(DEBUG) +#if defined(MORE_DEBUG) idtr_dump(base, limit); #endif @@ -206,6 +214,7 @@ LIDT_Ms(DWORD op) CPU_IDTR_LIMIT = limit; return; } + VERBOSE(("LIDT: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } EXCEPTION(UD_EXCEPTION, 0); @@ -244,6 +253,7 @@ MOV_CdRd(void) GET_PCBYTE(op); if (op >= 0xc0) { if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("MOV_CdRd: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } @@ -377,6 +387,7 @@ MOV_RdCd(void) GET_PCBYTE(op); if (op >= 0xc0) { if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("MOV_CdRd: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } @@ -437,6 +448,7 @@ LMSW_Ew(DWORD op) } return; } + VERBOSE(("LMSW: CPL(%d) != 0", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } @@ -461,6 +473,7 @@ CLTS(void) CPU_WORKCLOCK(2); if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL != 0))) { + VERBOSE(("CLTS: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } CPU_CR0 &= ~CPU_CR0_TS; @@ -499,6 +512,7 @@ ARPL_EwGw(void) } return; } + VERBOSE(("ARPL: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -511,13 +525,16 @@ LAR_GwEw(void) selector_t sel; WORD *out; DWORD op; + DWORD h; + int user_mode; int rv; WORD selector; if (CPU_STAT_PM && !CPU_STAT_VM86) { PREPART_REG16_EA(op, selector, out, 5, 11); - rv = parse_selector(&sel, selector); + user_mode = CPU_IS_USER_MODE(); + rv = parse_selector(&sel, selector, user_mode); if (rv < 0) { CPU_FLAGL &= ~Z_FLAG; return; @@ -547,10 +564,12 @@ LAR_GwEw(void) } } - *out = sel.desc.h & 0xff00; + h = cpu_lmemoryread_d(sel.addr + 4, user_mode); + *out = h & 0xff00; CPU_FLAGL |= Z_FLAG; return; } + VERBOSE(("LAR: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -560,13 +579,16 @@ LAR_GdEw(void) selector_t sel; DWORD *out; DWORD op; + DWORD h; + int user_mode; int rv; WORD selector; if (CPU_STAT_PM && !CPU_STAT_VM86) { PREPART_REG32_EA(op, selector, out, 5, 11); - rv = parse_selector(&sel, selector); + user_mode = CPU_IS_USER_MODE(); + rv = parse_selector(&sel, selector, user_mode); if (rv < 0) { CPU_FLAGL &= ~Z_FLAG; return; @@ -596,10 +618,12 @@ LAR_GdEw(void) } } - *out = sel.desc.h & 0x00ffff00; /* 0x00fxff00, x? */ + h = cpu_lmemoryread_d(sel.addr + 4, user_mode); + *out = h & 0x00ffff00; /* 0x00fxff00, x? */ CPU_FLAGL |= Z_FLAG; return; } + VERBOSE(("LAR: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -615,7 +639,7 @@ LSL_GwEw(void) if (CPU_STAT_PM && !CPU_STAT_VM86) { PREPART_REG16_EA(op, selector, out, 5, 11); - rv = parse_selector(&sel, selector); + rv = parse_selector(&sel, selector, CPU_IS_USER_MODE()); if (rv < 0) { CPU_FLAGL &= ~Z_FLAG; return; @@ -646,6 +670,7 @@ LSL_GwEw(void) CPU_FLAGL |= Z_FLAG; return; } + VERBOSE(("LSL: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -661,7 +686,7 @@ LSL_GdEw(void) if (CPU_STAT_PM && !CPU_STAT_VM86) { PREPART_REG32_EA(op, selector, out, 5, 11); - rv = parse_selector(&sel, selector); + rv = parse_selector(&sel, selector, CPU_IS_USER_MODE()); if (rv < 0) { CPU_FLAGL &= ~Z_FLAG; return; @@ -692,6 +717,7 @@ LSL_GdEw(void) CPU_FLAGL |= Z_FLAG; return; } + VERBOSE(("LSL: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -713,7 +739,7 @@ VERR_Ew(DWORD op) selector = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr); } - rv = parse_selector(&sel, selector); + rv = parse_selector(&sel, selector, CPU_IS_USER_MODE()); if (rv < 0) { CPU_FLAGL &= ~Z_FLAG; return; @@ -738,6 +764,7 @@ VERR_Ew(DWORD op) CPU_FLAGL |= Z_FLAG; return; } + VERBOSE(("VERR: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -759,7 +786,7 @@ VERW_Ew(DWORD op) selector = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr); } - rv = parse_selector(&sel, selector); + rv = parse_selector(&sel, selector, CPU_IS_USER_MODE()); if (rv < 0) { CPU_FLAGL &= ~Z_FLAG; return; @@ -771,7 +798,7 @@ VERW_Ew(DWORD op) return; } /* data segment is not writable */ - if (sel.desc.u.seg.c && !sel.desc.u.seg.wr) { + if (!sel.desc.u.seg.wr) { CPU_FLAGL &= ~Z_FLAG; return; } @@ -783,6 +810,7 @@ VERW_Ew(DWORD op) CPU_FLAGL |= Z_FLAG; return; } + VERBOSE(("VERW: VM86")); EXCEPTION(UD_EXCEPTION, 0); } @@ -806,6 +834,7 @@ INVD(void) CPU_WORKCLOCK(11); if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("INVD: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } /* nothing to do */ @@ -817,6 +846,7 @@ WBINVD(void) CPU_WORKCLOCK(11); if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("WBINVD: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } /* nothing to do */ @@ -828,6 +858,7 @@ INVLPG(DWORD op) DWORD madr; if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("INVLPG: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } @@ -852,6 +883,7 @@ HLT(void) { if (CPU_STAT_PM && CPU_STAT_CPL != 0) { + VERBOSE(("HLT: CPL(%d) != 0", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } @@ -872,6 +904,7 @@ RDMSR(void) int idx; if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("RDMSR: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); } @@ -889,6 +922,7 @@ WRMSR(void) int idx; if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) { + VERBOSE(("WRMSR: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL)); EXCEPTION(GP_EXCEPTION, 0); }