--- np2/i386c/ia32/instructions/system_inst.c	2004/01/23 14:33:27	1.9
+++ np2/i386c/ia32/instructions/system_inst.c	2004/03/04 15:53:11	1.20
@@ -1,4 +1,4 @@
-/*	$Id: system_inst.c,v 1.9 2004/01/23 14:33:27 monaka Exp $	*/
+/*	$Id: system_inst.c,v 1.20 2004/03/04 15:53:11 monaka Exp $	*/
 
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
@@ -35,23 +35,23 @@
 
 
 void
-LGDT_Ms(DWORD op)
+LGDT_Ms(UINT32 op)
 {
-	DWORD madr;
-	DWORD base;
-	WORD limit;
+	UINT32 madr;
+	UINT32 base;
+	UINT16 limit;
 
 	if (op < 0xc0) {
 		if (!CPU_STAT_PM || !CPU_STAT_VM86 || CPU_STAT_CPL == 0) {
 			CPU_WORKCLOCK(11);
-			madr = get_ea(op);
+			madr = calc_ea_dst(op);
 			limit = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr);
 			base = cpu_vmemoryread_d(CPU_INST_SEGREG_INDEX, madr + 2);
 			if (!CPU_INST_OP32) {
 				base &= 0x00ffffff;
 			}
 
-#if defined(DEBUG)
+#if defined(MORE_DEBUG)
 			gdtr_dump(base, limit);
 #endif
 
@@ -59,17 +59,18 @@ LGDT_Ms(DWORD op)
 			CPU_GDTR_LIMIT = limit;
 			return;
 		}
+		VERBOSE(("LGDT: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-SGDT_Ms(DWORD op)
+SGDT_Ms(UINT32 op)
 {
-	DWORD madr;
-	DWORD base;
-	WORD limit;
+	UINT32 madr;
+	UINT32 base;
+	UINT16 limit;
 
 	if (op < 0xc0) {
 		CPU_WORKCLOCK(11);
@@ -78,7 +79,7 @@ SGDT_Ms(DWORD op)
 		if (!CPU_INST_OP32) {
 			base &= 0x00ffffff;
 		}
-		madr = get_ea(op);
+		madr = calc_ea_dst(op);
 		cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, limit);
 		cpu_vmemorywrite_d(CPU_INST_SEGREG_INDEX, madr + 2, base);
 		return;
@@ -87,9 +88,9 @@ SGDT_Ms(DWORD op)
 }
 
 void
-LLDT_Ew(DWORD op)
+LLDT_Ew(UINT32 op)
 {
-	DWORD src, madr;
+	UINT32 src, madr;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		if (CPU_STAT_CPL == 0) {
@@ -101,19 +102,21 @@ LLDT_Ew(DWORD op)
 				madr = calc_ea_dst(op);
 				src = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr);
 			}
-			load_ldtr(src, GP_EXCEPTION);
+			load_ldtr((UINT16)src, GP_EXCEPTION);
 			return;
 		}
+		VERBOSE(("LLDT: CPL(%d) != 0", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
+	VERBOSE(("LLDT: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-SLDT_Ew(DWORD op)
+SLDT_Ew(UINT32 op)
 {
-	DWORD madr;
-	WORD ldtr;
+	UINT32 madr;
+	UINT16 ldtr;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		ldtr = CPU_LDTR;
@@ -131,13 +134,14 @@ SLDT_Ew(DWORD op)
 		}
 		return;
 	}
+	VERBOSE(("SLDT: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-LTR_Ew(DWORD op)
+LTR_Ew(UINT32 op)
 {
-	DWORD src, madr;
+	UINT32 src, madr;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		if (CPU_STAT_CPL == 0) {
@@ -149,19 +153,21 @@ LTR_Ew(DWORD op)
 				madr = calc_ea_dst(op);
 				src = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr);
 			}
-			load_tr(src);
+			load_tr((UINT16)src);
 			return;
 		}
+		VERBOSE(("LTR: CPL(%d) != 0", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
+	VERBOSE(("LTR: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-STR_Ew(DWORD op)
+STR_Ew(UINT32 op)
 {
-	DWORD madr;
-	WORD tr;
+	UINT32 madr;
+	UINT16 tr;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		tr = CPU_TR;
@@ -177,28 +183,30 @@ STR_Ew(DWORD op)
 			madr = calc_ea_dst(op);
 			cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, tr);
 		}
+		return;
 	}
+	VERBOSE(("STR: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-LIDT_Ms(DWORD op)
+LIDT_Ms(UINT32 op)
 {
-	DWORD madr;
-	DWORD base;
-	WORD limit;
+	UINT32 madr;
+	UINT32 base;
+	UINT16 limit;
 
 	if (op < 0xc0) {
 		if (!CPU_STAT_PM || !CPU_STAT_VM86 || CPU_STAT_CPL == 0) {
 			CPU_WORKCLOCK(11);
-			madr = get_ea(op);
+			madr = calc_ea_dst(op);
 			limit = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr);
 			base = cpu_vmemoryread_d(CPU_INST_SEGREG_INDEX, madr + 2);
 			if (!CPU_INST_OP32) {
 				base &= 0x00ffffff;
 			}
 
-#if defined(DEBUG)
+#if defined(MORE_DEBUG)
 			idtr_dump(base, limit);
 #endif
 
@@ -206,17 +214,18 @@ LIDT_Ms(DWORD op)
 			CPU_IDTR_LIMIT = limit;
 			return;
 		}
+		VERBOSE(("LIDT: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-SIDT_Ms(DWORD op)
+SIDT_Ms(UINT32 op)
 {
-	DWORD madr;
-	DWORD base;
-	WORD limit;
+	UINT32 madr;
+	UINT32 base;
+	UINT16 limit;
 
 	if (op < 0xc0) {
 		CPU_WORKCLOCK(11);
@@ -225,7 +234,7 @@ SIDT_Ms(DWORD op)
 		if (!CPU_INST_OP32) {
 			base &= 0x00ffffff;
 		}
-		madr = get_ea(op);
+		madr = calc_ea_dst(op);
 		cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, limit);
 		cpu_vmemorywrite_d(CPU_INST_SEGREG_INDEX, madr + 2, base);
 		return;
@@ -236,14 +245,15 @@ SIDT_Ms(DWORD op)
 void
 MOV_CdRd(void)
 {
-	DWORD op, src;
-	DWORD reg;
+	UINT32 op, src;
+	UINT32 reg;
 	int idx;
 
 	CPU_WORKCLOCK(11);
 	GET_PCBYTE(op);
 	if (op >= 0xc0) {
 		if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+			VERBOSE(("MOV_CdRd: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 			EXCEPTION(GP_EXCEPTION, 0);
 		}
 
@@ -267,7 +277,7 @@ MOV_CdRd(void)
 			 */
 
 			/* 下巻 p.182 割り込み 13 - 一般保護例外 */
-			if ((src & (CPU_CR0_PE|CPU_CR0_PG)) == (DWORD)CPU_CR0_PG) {
+			if ((src & (CPU_CR0_PE|CPU_CR0_PG)) == (UINT32)CPU_CR0_PG) {
 				EXCEPTION(GP_EXCEPTION, 0);
 			}
 			if ((src & (CPU_CR0_NW|CPU_CR0_CD)) == CPU_CR0_NW) {
@@ -304,6 +314,8 @@ MOV_CdRd(void)
 					change_pm(0);
 				}
 			}
+
+			CPU_STAT_WP = (CPU_CR0 & CPU_CR0_WP) ? 0x10 : 0;
 			break;
 
 		case 2: /* CR2 */
@@ -369,14 +381,15 @@ MOV_CdRd(void)
 void
 MOV_RdCd(void)
 {
-	DWORD *out;
-	DWORD op;
+	UINT32 *out;
+	UINT32 op;
 	int idx;
 
 	CPU_WORKCLOCK(11);
 	GET_PCBYTE(op);
 	if (op >= 0xc0) {
 		if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+			VERBOSE(("MOV_CdRd: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 			EXCEPTION(GP_EXCEPTION, 0);
 		}
 
@@ -414,10 +427,10 @@ MOV_RdCd(void)
 }
 
 void
-LMSW_Ew(DWORD op)
+LMSW_Ew(UINT32 op)
 {
-	DWORD src, madr;
-	DWORD cr0;
+	UINT32 src, madr;
+	UINT32 cr0;
 
 	if (!CPU_STAT_PM || CPU_STAT_CPL == 0) {
 		if (op >= 0xc0) {
@@ -437,21 +450,22 @@ LMSW_Ew(DWORD op)
 		}
 		return;
 	}
+	VERBOSE(("LMSW: CPL(%d) != 0", CPU_STAT_CPL));
 	EXCEPTION(GP_EXCEPTION, 0);
 }
 
 void
-SMSW_Ew(DWORD op)
+SMSW_Ew(UINT32 op)
 {
-	DWORD madr;
+	UINT32 madr;
 
 	if (op >= 0xc0) {
 		CPU_WORKCLOCK(2);
-		*(reg16_b20[op]) = (WORD)CPU_CR0;
+		*(reg16_b20[op]) = (UINT16)CPU_CR0;
 	} else {
 		CPU_WORKCLOCK(3);
 		madr = calc_ea_dst(op);
-		cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, (WORD)CPU_CR0);
+		cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, (UINT16)CPU_CR0);
 	}
 }
 
@@ -459,8 +473,9 @@ void
 CLTS(void)
 {
 
-	CPU_WORKCLOCK(2);
+	CPU_WORKCLOCK(5);
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL != 0))) {
+		VERBOSE(("CLTS: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 	CPU_CR0 &= ~CPU_CR0_TS;
@@ -469,7 +484,7 @@ CLTS(void)
 void
 ARPL_EwGw(void)
 {
-	DWORD op, src, dst, madr;
+	UINT32 op, src, dst, madr;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		PREPART_EA_REG16(op, src);
@@ -480,7 +495,7 @@ ARPL_EwGw(void)
 				CPU_FLAGL |= Z_FLAG;
 				dst &= ~3;
 				dst |= (src & 3);
-				*(reg16_b20[op]) = dst;
+				*(reg16_b20[op]) = (UINT16)dst;
 			} else {
 				CPU_FLAGL &= ~Z_FLAG;
 			}
@@ -492,13 +507,14 @@ ARPL_EwGw(void)
 				CPU_FLAGL |= Z_FLAG;
 				dst &= ~3;
 				dst |= (src & 3);
-				cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, dst);
+				cpu_vmemorywrite_w(CPU_INST_SEGREG_INDEX, madr, (UINT16)dst);
 			} else {
 				CPU_FLAGL &= ~Z_FLAG;
 			}
 		}
 		return;
 	}
+	VERBOSE(("ARPL: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -509,10 +525,11 @@ void
 LAR_GwEw(void)
 {
 	selector_t sel;
-	WORD *out;
-	DWORD op;
+	UINT16 *out;
+	UINT32 op;
+	UINT32 h;
 	int rv;
-	WORD selector;
+	UINT16 selector;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		PREPART_REG16_EA(op, selector, out, 5, 11);
@@ -524,12 +541,17 @@ LAR_GwEw(void)
 		}
 
 		if (sel.desc.s) {
-			if (!(sel.desc.u.seg.c && !sel.desc.u.seg.ec) &&
-			    ((sel.desc.dpl < CPU_STAT_CPL) || (sel.desc.dpl < sel.rpl))) {
-				CPU_FLAGL &= ~Z_FLAG;
-				return;
+			/* code or data segment */
+			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
+				/* not conforming code segment */
+				if ((sel.desc.dpl < CPU_STAT_CPL)
+				 || (sel.desc.dpl < sel.rpl)) {
+					CPU_FLAGL &= ~Z_FLAG;
+					return;
+				}
 			}
 		} else {
+			/* system segment */
 			switch (sel.desc.type) {
 			case CPU_SYSDESC_TYPE_TSS_16:
 			case CPU_SYSDESC_TYPE_LDT:
@@ -547,10 +569,12 @@ LAR_GwEw(void)
 			}
 		}
 
-		*out = sel.desc.h & 0xff00;
+		h = cpu_kmemoryread_d(sel.addr + 4);
+		*out = (UINT16)(h & 0xff00);
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
+	VERBOSE(("LAR: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -558,27 +582,33 @@ void
 LAR_GdEw(void)
 {
 	selector_t sel;
-	DWORD *out;
-	DWORD op;
+	UINT32 *out;
+	UINT32 op;
+	UINT32 h;
 	int rv;
-	WORD selector;
+	UINT32 selector;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		PREPART_REG32_EA(op, selector, out, 5, 11);
 
-		rv = parse_selector(&sel, selector);
+		rv = parse_selector(&sel, (UINT16)selector);
 		if (rv < 0) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
 
 		if (sel.desc.s) {
-			if (!(sel.desc.u.seg.c && !sel.desc.u.seg.ec)
-			 && ((sel.desc.dpl < CPU_STAT_CPL) || (sel.desc.dpl < sel.rpl))) {
-				CPU_FLAGL &= ~Z_FLAG;
-				return;
+			/* code or data segment */
+			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
+				/* not conforming code segment */
+				if ((sel.desc.dpl < CPU_STAT_CPL)
+				 || (sel.desc.dpl < sel.rpl)) {
+					CPU_FLAGL &= ~Z_FLAG;
+					return;
+				}
 			}
 		} else {
+			/* system segment */
 			switch (sel.desc.type) {
 			case CPU_SYSDESC_TYPE_TSS_16:
 			case CPU_SYSDESC_TYPE_LDT:
@@ -596,10 +626,12 @@ LAR_GdEw(void)
 			}
 		}
 
-		*out = sel.desc.h & 0x00ffff00;	/* 0x00fxff00, x? */
+		h = cpu_kmemoryread_d(sel.addr + 4);
+		*out = h & 0x00ffff00;	/* 0x00fxff00, x? */
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
+	VERBOSE(("LAR: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -607,10 +639,10 @@ void
 LSL_GwEw(void)
 {
 	selector_t sel;
-	WORD *out;
-	DWORD op;
+	UINT16 *out;
+	UINT32 op;
 	int rv;
-	WORD selector;
+	UINT16 selector;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		PREPART_REG16_EA(op, selector, out, 5, 11);
@@ -622,12 +654,17 @@ LSL_GwEw(void)
 		}
 
 		if (sel.desc.s) {
-			if (!(sel.desc.u.seg.c && !sel.desc.u.seg.ec)
-			 && ((sel.desc.dpl < CPU_STAT_CPL) || (sel.desc.dpl < sel.rpl))) {
-				CPU_FLAGL &= ~Z_FLAG;
-				return;
+			/* code or data segment */
+			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
+				/* not conforming code segment */
+				if ((sel.desc.dpl < CPU_STAT_CPL)
+				 || (sel.desc.dpl < sel.rpl)) {
+					CPU_FLAGL &= ~Z_FLAG;
+					return;
+				}
 			}
 		} else {
+			/* system segment */
 			switch (sel.desc.type) {
 			case CPU_SYSDESC_TYPE_TSS_16:
 			case CPU_SYSDESC_TYPE_LDT:
@@ -642,10 +679,11 @@ LSL_GwEw(void)
 			}
 		}
 
-		*out = (WORD)sel.desc.u.seg.limit;
+		*out = (UINT16)sel.desc.u.seg.limit;
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
+	VERBOSE(("LSL: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -653,27 +691,32 @@ void
 LSL_GdEw(void)
 {
 	selector_t sel;
-	DWORD *out;
-	DWORD op;
+	UINT32 *out;
+	UINT32 op;
 	int rv;
-	WORD selector;
+	UINT32 selector;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		PREPART_REG32_EA(op, selector, out, 5, 11);
 
-		rv = parse_selector(&sel, selector);
+		rv = parse_selector(&sel, (UINT16)selector);
 		if (rv < 0) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
 
 		if (sel.desc.s) {
-			if (!(sel.desc.u.seg.c && !sel.desc.u.seg.ec)
-			 && ((CPU_STAT_CPL > sel.desc.dpl) || (sel.rpl > sel.desc.dpl))) {
-				CPU_FLAGL &= ~Z_FLAG;
-				return;
+			/* code or data segment */
+			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
+				/* not conforming code segment */
+				if ((sel.desc.dpl < CPU_STAT_CPL)
+				 || (sel.desc.dpl < sel.rpl)) {
+					CPU_FLAGL &= ~Z_FLAG;
+					return;
+				}
 			}
 		} else {
+			/* system segment */
 			switch (sel.desc.type) {
 			case CPU_SYSDESC_TYPE_TSS_16:
 			case CPU_SYSDESC_TYPE_LDT:
@@ -692,16 +735,17 @@ LSL_GdEw(void)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
+	VERBOSE(("LSL: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-VERR_Ew(DWORD op)
+VERR_Ew(UINT32 op)
 {
 	selector_t sel;
-	DWORD madr;
+	UINT32 madr;
 	int rv;
-	WORD selector;
+	UINT16 selector;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		if (op >= 0xc0) {
@@ -724,30 +768,35 @@ VERR_Ew(DWORD op)
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
-		/* non-conforming code segment && (CPL > DPL || RPL > DPL) */
-		if ((sel.desc.u.seg.c && !sel.desc.u.seg.ec)
-		 && ((CPU_STAT_CPL > sel.desc.dpl) || (sel.rpl > sel.desc.dpl))) {
-			CPU_FLAGL &= ~Z_FLAG;
-			return;
+		/* not conforming code segment && (CPL > DPL || RPL > DPL) */
+		if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
+			/* not conforming code segment */
+			if ((sel.desc.dpl < CPU_STAT_CPL)
+			 || (sel.desc.dpl < sel.rpl)) {
+				CPU_FLAGL &= ~Z_FLAG;
+				return;
+			}
 		}
 		/* code segment is not readable */
 		if (sel.desc.u.seg.c && !sel.desc.u.seg.wr) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
+
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
+	VERBOSE(("VERR: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
-VERW_Ew(DWORD op)
+VERW_Ew(UINT32 op)
 {
 	selector_t sel;
-	DWORD madr;
+	UINT32 madr;
 	int rv;
-	WORD selector;
+	UINT16 selector;
 
 	if (CPU_STAT_PM && !CPU_STAT_VM86) {
 		if (op >= 0xc0) {
@@ -771,7 +820,7 @@ VERW_Ew(DWORD op)
 			return;
 		}
 		/* data segment is not writable */
-		if (sel.desc.u.seg.c && !sel.desc.u.seg.wr) {
+		if (!sel.desc.u.seg.wr) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
@@ -780,24 +829,36 @@ VERW_Ew(DWORD op)
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
+
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
+	VERBOSE(("VERW: VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
 MOV_DdRd(void)
 {
+	UINT op;
 
+	GET_PCBYTE(op);
+	TRACEOUT(("mov dr, rd - %.4x:%.8x", CPU_CS, CPU_EIP));
+#if 0
 	ia32_panic("MOV_DdRd: not implemented yet!");
+#endif
 }
 
 void
 MOV_RdDd(void)
 {
+	UINT op;
 
+	GET_PCBYTE(op);
+	TRACEOUT(("mov rd, dr - %.4x:%.8x", CPU_CS, CPU_EIP));
+#if 0
 	ia32_panic("MOV_DdRd: not implemented yet!");
+#endif
 }
 
 void
@@ -806,6 +867,7 @@ INVD(void)
 
 	CPU_WORKCLOCK(11);
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+		VERBOSE(("INVD: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 	/* nothing to do */
@@ -817,27 +879,65 @@ WBINVD(void)
 
 	CPU_WORKCLOCK(11);
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+		VERBOSE(("WBINVD: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 	/* nothing to do */
 }
 
 void
-INVLPG(DWORD op)
+INVLPG(UINT32 op)
 {
-	DWORD madr;
+	descriptor_t *sd;
+	UINT32 madr;
+	int idx;
+	int exc;
 
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+		VERBOSE(("INVLPG: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 
 	if (op < 0xc0) {
 		CPU_WORKCLOCK(11);
-		madr = get_ea(op);
-		tlb_flush_page(madr);
-		return;
+		madr = calc_ea_dst(op);
+
+		idx = CPU_INST_SEGREG_INDEX;
+		sd = &CPU_STAT_SREG(idx);
+		if (!sd->valid) {
+			exc = GP_EXCEPTION;
+			goto err;
+		}
+		switch (sd->type) {
+		case 4: case 5: case 6: case 7:
+			if (madr <= sd->u.seg.limit) {
+				if (idx == CPU_SS_INDEX)
+					exc = SS_EXCEPTION;
+				else
+					exc = GP_EXCEPTION;
+				goto err;
+			}
+			break;
+
+		default:
+			if (madr > sd->u.seg.limit) {
+				if (idx == CPU_SS_INDEX)
+					exc = SS_EXCEPTION;
+				else
+					exc = GP_EXCEPTION;
+				goto err;
+			}
+			break;
+		}
+		tlb_flush_page(sd->u.seg.segbase + madr);
 	}
-	EXCEPTION(UD_EXCEPTION, 0);
+	return;
+
+err:
+#if 0	/* XXX */
+	EXCEPTION(exc, 0);
+#endif
+	return;
 }
 
 void
@@ -852,11 +952,13 @@ HLT(void)
 {
 
 	if (CPU_STAT_PM && CPU_STAT_CPL != 0) {
+		VERBOSE(("HLT: CPL(%d) != 0", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 
 	CPU_HALT();
 	CPU_EIP--;
+	CPU_STAT_HLT = 1;
 }
 
 void
@@ -872,6 +974,7 @@ RDMSR(void)
 	int idx;
 
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+		VERBOSE(("RDMSR: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 
@@ -889,6 +992,7 @@ WRMSR(void)
 	int idx;
 
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
+		VERBOSE(("WRMSR: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}