--- np2/i386c/ia32/instructions/system_inst.c	2008/01/25 18:02:18	1.32
+++ np2/i386c/ia32/instructions/system_inst.c	2008/03/22 04:03:08	1.33
@@ -1,4 +1,4 @@
-/*	$Id: system_inst.c,v 1.32 2008/01/25 18:02:18 monaka Exp $	*/
+/*	$Id: system_inst.c,v 1.33 2008/03/22 04:03:08 monaka Exp $	*/
 
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
@@ -40,7 +40,7 @@ LGDT_Ms(UINT32 op)
 	UINT16 limit;
 
 	if (op < 0xc0) {
-		if (!CPU_STAT_PM || !CPU_STAT_VM86 || CPU_STAT_CPL == 0) {
+		if (!CPU_STAT_PM || (CPU_STAT_CPL == 0 && !CPU_STAT_VM86)) {
 			CPU_WORKCLOCK(11);
 			madr = calc_ea_dst(op);
 			limit = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr);
@@ -107,7 +107,7 @@ LLDT_Ew(UINT32 op)
 		VERBOSE(("LLDT: CPL(%d) != 0", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
-	VERBOSE(("LLDT: VM86"));
+	VERBOSE(("LLDT: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -133,7 +133,7 @@ SLDT_Ew(UINT32 op)
 		}
 		return;
 	}
-	VERBOSE(("SLDT: VM86"));
+	VERBOSE(("SLDT: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -159,7 +159,7 @@ LTR_Ew(UINT32 op)
 		VERBOSE(("LTR: CPL(%d) != 0", CPU_STAT_CPL));
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
-	VERBOSE(("LTR: VM86"));
+	VERBOSE(("LTR: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -185,7 +185,7 @@ STR_Ew(UINT32 op)
 		}
 		return;
 	}
-	VERBOSE(("STR: VM86"));
+	VERBOSE(("STR: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -197,7 +197,7 @@ LIDT_Ms(UINT32 op)
 	UINT16 limit;
 
 	if (op < 0xc0) {
-		if (!CPU_STAT_PM || !CPU_STAT_VM86 || CPU_STAT_CPL == 0) {
+		if (!CPU_STAT_PM || (CPU_STAT_CPL == 0 && !CPU_STAT_VM86)) {
 			CPU_WORKCLOCK(11);
 			madr = calc_ea_dst(op);
 			limit = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr);
@@ -296,7 +296,7 @@ MOV_CdRd(void)
 			VERBOSE(("MOV_CdRd: %04x:%08x: cr0: 0x%08x <- 0x%08x(%s)", CPU_CS, CPU_PREV_EIP, reg, CPU_CR0, reg32_str[op & 7]));
 
 			if ((reg ^ CPU_CR0) & (CPU_CR0_PE|CPU_CR0_PG)) {
-				tlb_flush(TRUE);
+				tlb_flush(1);
 			}
 			if ((reg ^ CPU_CR0) & CPU_CR0_PE) {
 				if (CPU_CR0 & CPU_CR0_PE) {
@@ -332,7 +332,7 @@ MOV_CdRd(void)
 			 * 3 = PWT (page level write throgh)
 			 */
 			reg = CPU_CR3;
-			set_CR3(src);
+			set_cr3(src);
 			VERBOSE(("MOV_CdRd: %04x:%08x: cr3: 0x%08x <- 0x%08x(%s)", CPU_CS, CPU_PREV_EIP, reg, CPU_CR3, reg32_str[op & 7]));
 			break;
 
@@ -367,7 +367,7 @@ MOV_CdRd(void)
 			VERBOSE(("MOV_CdRd: %04x:%08x: cr4: 0x%08x <- 0x%08x(%s)", CPU_CS, CPU_PREV_EIP, reg, CPU_CR4, reg32_str[op & 7]));
 
 			if ((reg ^ CPU_CR4) & (CPU_CR4_PSE|CPU_CR4_PGE|CPU_CR4_PAE)) {
-				tlb_flush(TRUE);
+				tlb_flush(1);
 			}
 			break;
 
@@ -462,7 +462,11 @@ SMSW_Ew(UINT32 op)
 
 	if (op >= 0xc0) {
 		CPU_WORKCLOCK(2);
-		*(reg16_b20[op]) = (UINT16)CPU_CR0;
+		if (CPU_INST_OP32) {
+			*(reg32_b20[op]) = (UINT16)CPU_CR0;
+		} else {
+			*(reg16_b20[op]) = (UINT16)CPU_CR0;
+		}
 	} else {
 		CPU_WORKCLOCK(3);
 		madr = calc_ea_dst(op);
@@ -516,7 +520,7 @@ ARPL_EwGw(void)
 		}
 		return;
 	}
-	VERBOSE(("ARPL: VM86"));
+	VERBOSE(("ARPL: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -542,10 +546,11 @@ LAR_GwEw(void)
 			return;
 		}
 
-		if (sel.desc.s) {
+		if (!SEG_IS_SYSTEM(&sel.desc)) {
 			/* code or data segment */
-			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
-				/* not conforming code segment */
+			if ((SEG_IS_DATA(&sel.desc)
+			 || !SEG_IS_CONFORMING_CODE(&sel.desc))) {
+				/* data or non-conforming code segment */
 				if ((sel.desc.dpl < CPU_STAT_CPL)
 				 || (sel.desc.dpl < sel.rpl)) {
 					CPU_FLAGL &= ~Z_FLAG;
@@ -576,7 +581,7 @@ LAR_GwEw(void)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
-	VERBOSE(("LAR: VM86"));
+	VERBOSE(("LAR: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -599,10 +604,11 @@ LAR_GdEw(void)
 			return;
 		}
 
-		if (sel.desc.s) {
+		if (!SEG_IS_SYSTEM(&sel.desc)) {
 			/* code or data segment */
-			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
-				/* not conforming code segment */
+			if ((SEG_IS_DATA(&sel.desc)
+			 || !SEG_IS_CONFORMING_CODE(&sel.desc))) {
+				/* data or non-conforming code segment */
 				if ((sel.desc.dpl < CPU_STAT_CPL)
 				 || (sel.desc.dpl < sel.rpl)) {
 					CPU_FLAGL &= ~Z_FLAG;
@@ -633,7 +639,7 @@ LAR_GdEw(void)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
-	VERBOSE(("LAR: VM86"));
+	VERBOSE(("LAR: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -655,10 +661,11 @@ LSL_GwEw(void)
 			return;
 		}
 
-		if (sel.desc.s) {
+		if (!SEG_IS_SYSTEM(&sel.desc)) {
 			/* code or data segment */
-			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
-				/* not conforming code segment */
+			if ((SEG_IS_DATA(&sel.desc)
+			 || !SEG_IS_CONFORMING_CODE(&sel.desc))) {
+				/* data or non-conforming code segment */
 				if ((sel.desc.dpl < CPU_STAT_CPL)
 				 || (sel.desc.dpl < sel.rpl)) {
 					CPU_FLAGL &= ~Z_FLAG;
@@ -685,7 +692,7 @@ LSL_GwEw(void)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
-	VERBOSE(("LSL: VM86"));
+	VERBOSE(("LSL: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -707,10 +714,11 @@ LSL_GdEw(void)
 			return;
 		}
 
-		if (sel.desc.s) {
+		if (!SEG_IS_SYSTEM(&sel.desc)) {
 			/* code or data segment */
-			if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
-				/* not conforming code segment */
+			if ((SEG_IS_DATA(&sel.desc)
+			 || !SEG_IS_CONFORMING_CODE(&sel.desc))) {
+				/* data or non-conforming code segment */
 				if ((sel.desc.dpl < CPU_STAT_CPL)
 				 || (sel.desc.dpl < sel.rpl)) {
 					CPU_FLAGL &= ~Z_FLAG;
@@ -737,7 +745,7 @@ LSL_GdEw(void)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
-	VERBOSE(("LSL: VM86"));
+	VERBOSE(("LSL: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -766,13 +774,14 @@ VERR_Ew(UINT32 op)
 		}
 
 		/* system segment */
-		if (!sel.desc.s) {
+		if (SEG_IS_SYSTEM(&sel.desc)) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
-		/* not conforming code segment && (CPL > DPL || RPL > DPL) */
-		if (!(sel.desc.u.seg.c && sel.desc.u.seg.ec)) {
-			/* not conforming code segment */
+
+		/* data or non-conforming code segment */
+		if ((SEG_IS_DATA(&sel.desc)
+		 || !SEG_IS_CONFORMING_CODE(&sel.desc))) {
 			if ((sel.desc.dpl < CPU_STAT_CPL)
 			 || (sel.desc.dpl < sel.rpl)) {
 				CPU_FLAGL &= ~Z_FLAG;
@@ -780,7 +789,8 @@ VERR_Ew(UINT32 op)
 			}
 		}
 		/* code segment is not readable */
-		if (sel.desc.u.seg.c && !sel.desc.u.seg.wr) {
+		if (SEG_IS_CODE(&sel.desc)
+		 && !SEG_IS_READABLE_CODE(&sel.desc)) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
@@ -788,7 +798,7 @@ VERR_Ew(UINT32 op)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
-	VERBOSE(("VERR: VM86"));
+	VERBOSE(("VERR: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -817,12 +827,12 @@ VERW_Ew(UINT32 op)
 		}
 
 		/* system segment || code segment */
-		if (!sel.desc.s || sel.desc.u.seg.c) {
+		if (SEG_IS_SYSTEM(&sel.desc) || SEG_IS_CODE(&sel.desc)) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
 		/* data segment is not writable */
-		if (!sel.desc.u.seg.wr) {
+		if (!SEG_IS_WRITABLE_DATA(&sel.desc)) {
 			CPU_FLAGL &= ~Z_FLAG;
 			return;
 		}
@@ -835,7 +845,7 @@ VERW_Ew(UINT32 op)
 		CPU_FLAGL |= Z_FLAG;
 		return;
 	}
-	VERBOSE(("VERW: VM86"));
+	VERBOSE(("VERW: real-mode or VM86"));
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
@@ -875,22 +885,10 @@ MOV_DdRd(void)
 			CPU_DR(idx) = src;
 			break;
 
-#if CPU_FAMILY >= 5
-		case 4:
-			if (CPU_CR4 & CPU_CR4_DE) {
-				EXCEPTION(UD_EXCEPTION, 0);
-			}
-#endif
 		case 6:
 			CPU_DR6 = src;
 			break;
 
-#if CPU_FAMILY >= 5
-		case 5:
-			if (CPU_CR4 & CPU_CR4_DE) {
-				EXCEPTION(UD_EXCEPTION, 0);
-			}
-#endif
 		case 7:
 			CPU_DR7 = src;
 			CPU_STAT_BP = 0;
@@ -947,25 +945,10 @@ MOV_RdDd(void)
 			break;
 
 		case 4:
-#if CPU_FAMILY >= 5
-			if (CPU_CR4 & CPU_CR4_DE) {
-				EXCEPTION(UD_EXCEPTION, 0);
-			}
-#endif
 		case 6:
-#if CPU_FAMILY == 4
 			*out = (CPU_DR6 & 0x0000f00f) | 0xffff0ff0;
-#elif CPU_FAMILY >= 5
-			*out = (CPU_DR6 & 0x0000e00f) | 0xffff0ff0;
-#endif
 			break;
 
-#if CPU_FAMILY >= 5
-		case 5:
-			if (CPU_CR4 & CPU_CR4_DE) {
-				EXCEPTION(UD_EXCEPTION, 0);
-			}
-#endif
 		case 7:
 			*out = CPU_DR7;
 			break;
@@ -1005,10 +988,9 @@ WBINVD(void)
 void
 INVLPG(UINT32 op)
 {
-	descriptor_t *sd;
+	descriptor_t *sdp;
 	UINT32 madr;
 	int idx;
-	int exc;
 
 	if (CPU_STAT_PM && (CPU_STAT_VM86 || CPU_STAT_CPL != 0)) {
 		VERBOSE(("INVLPG: VM86(%s) or CPL(%d) != 0", CPU_STAT_VM86 ? "true" : "false", CPU_STAT_CPL));
@@ -1020,38 +1002,29 @@ INVLPG(UINT32 op)
 		madr = calc_ea_dst(op);
 
 		idx = CPU_INST_SEGREG_INDEX;
-		sd = &CPU_STAT_SREG(idx);
-		if (!sd->valid) {
-			exc = GP_EXCEPTION;
-			goto err;
+		sdp = &CPU_STAT_SREG(idx);
+		if (!SEG_IS_VALID(sdp)) {
+			EXCEPTION(GP_EXCEPTION, 0);
 		}
-		switch (sd->type) {
+		switch (sdp->type) {
 		case 4: case 5: case 6: case 7:
-			if (madr <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
+			if (madr <= sdp->u.seg.limit) {
+				EXCEPTION((idx == CPU_SS_INDEX) ?
+				    SS_EXCEPTION: GP_EXCEPTION, 0);
 			}
 			break;
 
 		default:
-			if (madr > sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
+			if (madr > sdp->u.seg.limit) {
+				EXCEPTION((idx == CPU_SS_INDEX) ?
+				    SS_EXCEPTION: GP_EXCEPTION, 0);
 			}
 			break;
 		}
-		tlb_flush_page(sd->u.seg.segbase + madr);
+		tlb_flush_page(sdp->u.seg.segbase + madr);
 		return;
 	}
-	exc = UD_EXCEPTION;
-err:
-	EXCEPTION(exc, 0);
+	EXCEPTION(UD_EXCEPTION, 0);
 }
 
 void
@@ -1071,7 +1044,7 @@ HLT(void)
 	}
 
 	CPU_HALT();
-	CPU_EIP--;
+	CPU_EIP = CPU_PREV_EIP;
 	CPU_STAT_HLT = 1;
 }
 
@@ -1112,7 +1085,7 @@ WRMSR(void)
 
 	idx = CPU_ECX;
 	switch (idx) {
-		/* MTRR への書き込み時 tlb_flush(TRUE); */
+		/* MTRR への書き込み時 tlb_flush(1); */
 
 	default:
 		EXCEPTION(GP_EXCEPTION, 0);