--- np2/i386c/ia32/instructions/system_inst.c	2008/03/22 04:03:08	1.33
+++ np2/i386c/ia32/instructions/system_inst.c	2012/01/24 17:17:13	1.39
@@ -1,5 +1,3 @@
-/*	$Id: system_inst.c,v 1.33 2008/03/22 04:03:08 monaka Exp $	*/
-
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
  * All rights reserved.
@@ -32,7 +30,7 @@
 #include "system_inst.h"
 
 
-void
+void CPUCALL
 LGDT_Ms(UINT32 op)
 {
 	UINT32 madr;
@@ -63,7 +61,7 @@ LGDT_Ms(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 SGDT_Ms(UINT32 op)
 {
 	UINT32 madr;
@@ -85,7 +83,7 @@ SGDT_Ms(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 LLDT_Ew(UINT32 op)
 {
 	UINT32 madr;
@@ -111,7 +109,7 @@ LLDT_Ew(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 SLDT_Ew(UINT32 op)
 {
 	UINT32 madr;
@@ -137,7 +135,7 @@ SLDT_Ew(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 LTR_Ew(UINT32 op)
 {
 	UINT32 madr;
@@ -163,7 +161,7 @@ LTR_Ew(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 STR_Ew(UINT32 op)
 {
 	UINT32 madr;
@@ -189,7 +187,7 @@ STR_Ew(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 LIDT_Ms(UINT32 op)
 {
 	UINT32 madr;
@@ -220,7 +218,7 @@ LIDT_Ms(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 SIDT_Ms(UINT32 op)
 {
 	UINT32 madr;
@@ -276,7 +274,7 @@ MOV_CdRd(void)
 			 * 31 = PG (pageing)
 			 */
 
-			/* 下巻 p.182 割り込み 13 - 一般保護例外 */
+			/* 筝 p.182 割り込み 13 - 一般保護例外 */
 			if ((src & (CPU_CR0_PE|CPU_CR0_PG)) == (UINT32)CPU_CR0_PG) {
 				EXCEPTION(GP_EXCEPTION, 0);
 			}
@@ -288,6 +286,7 @@ MOV_CdRd(void)
 			src &= CPU_CR0_ALL;
 #if defined(USE_FPU)
 			src |= CPU_CR0_ET;	/* FPU present */
+			src &= ~CPU_CR0_EM;
 #else
 			src |= CPU_CR0_EM | CPU_CR0_NE;
 			src &= ~(CPU_CR0_MP | CPU_CR0_ET);
@@ -427,7 +426,7 @@ MOV_RdCd(void)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 LMSW_Ew(UINT32 op)
 {
 	UINT32 src, madr;
@@ -455,7 +454,7 @@ LMSW_Ew(UINT32 op)
 	EXCEPTION(GP_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 SMSW_Ew(UINT32 op)
 {
 	UINT32 madr;
@@ -749,7 +748,7 @@ LSL_GdEw(void)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 VERR_Ew(UINT32 op)
 {
 	selector_t sel;
@@ -802,7 +801,7 @@ VERR_Ew(UINT32 op)
 	EXCEPTION(UD_EXCEPTION, 0);
 }
 
-void
+void CPUCALL
 VERW_Ew(UINT32 op)
 {
 	selector_t sel;
@@ -855,9 +854,6 @@ MOV_DdRd(void)
 	UINT32 src;
 	UINT op;
 	int idx;
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	int i;
-#endif
 
 	CPU_WORKCLOCK(11);
 	GET_PCBYTE(op);
@@ -892,13 +888,6 @@ MOV_DdRd(void)
 		case 7:
 			CPU_DR7 = src;
 			CPU_STAT_BP = 0;
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-			for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
-				if (CPU_DR7 & (CPU_DR7_L(i)|CPU_DR7_G(i))) {
-					CPU_STAT_BP |= (1 << i);
-				}
-			}
-#endif	/* IA32_SUPPORT_DEBUG_REGISTER */
 			break;
 
 		default:
@@ -985,7 +974,7 @@ WBINVD(void)
 	}
 }
 
-void
+void CPUCALL
 INVLPG(UINT32 op)
 {
 	descriptor_t *sdp;
@@ -1043,6 +1032,7 @@ HLT(void)
 		EXCEPTION(GP_EXCEPTION, 0);
 	}
 
+	VERBOSE(("HLT: do HLT."));
 	CPU_HALT();
 	CPU_EIP = CPU_PREV_EIP;
 	CPU_STAT_HLT = 1;
@@ -1085,7 +1075,7 @@ WRMSR(void)
 
 	idx = CPU_ECX;
 	switch (idx) {
-		/* MTRR への書き込み時 tlb_flush(1); */
+		/* MTRR への書き込み時 tlb_flush(1); */
 
 	default:
 		EXCEPTION(GP_EXCEPTION, 0);