| version 1.1, 2003/12/08 00:55:31 | version 1.4, 2003/12/25 20:30:22 | 
| Line 37 | Line 37 | 
 | void | void | 
 | ia32reset(void) | ia32reset(void) | 
 | { | { | 
| //      cpu_init(); | int i; | 
| #ifdef USE_FPU          // ->ia32_init |  | 
| //      fpu_init(); | memset(&i386core.s, 0, sizeof(i386core.s));                     // yui | 
| #endif | CPU_STATSAVE.cpu_inst_default.seg_base = (DWORD)-1; | 
|  |  | 
|  | CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING; | 
|  | CPU_EFLAG = 2; | 
|  | CPU_CR0 = CPU_CR0_CD | CPU_CR0_NW | CPU_CR0_ET; | 
|  | CPU_MXCSR = 0x1f80; | 
|  | CPU_GDTR_LIMIT = 0xffff; | 
|  | CPU_IDTR_LIMIT = 0xffff; | 
|  |  | 
|  | for (i = 0; i < CPU_SEGREG_NUM; ++i) { | 
|  | CPU_STAT_SREG_INIT(i); | 
|  | } | 
|  | CPU_LDTR_LIMIT = 0xffff; | 
|  | CPU_TR_LIMIT = 0xffff; | 
|  |  | 
|  | //      CPU_SET_SEGREG(CPU_ES_INDEX, 0x0000); | 
|  | CPU_SET_SEGREG(CPU_CS_INDEX, 0xf000); | 
|  | //      CPU_SET_SEGREG(CPU_SS_INDEX, 0x0000); | 
|  | //      CPU_SET_SEGREG(CPU_DS_INDEX, 0x0000); | 
|  | CPU_EIP = 0xfff0; | 
|  | CPU_ADRSMASK = 0xfffff; | 
|  | } | 
|  |  | 
|  | void | 
|  | ia32shut(void) | 
|  | { | 
|  | SINT32  remainclock;                                    // 結局ハマるのか漏れ… | 
|  | SINT32  baseclock; | 
|  | UINT32  clock; | 
|  |  | 
|  | remainclock = CPU_REMCLOCK; | 
|  | baseclock = CPU_BASECLOCK; | 
|  | clock = CPU_CLOCK; | 
|  |  | 
|  | ia32reset(); | 
 |  |  | 
| CPU_SET_SEGREG(CPU_CS_INDEX, 0x1fc0); | CPU_REMCLOCK = remainclock; | 
|  | CPU_BASECLOCK = baseclock; | 
|  | CPU_CLOCK = clock; | 
 | } | } | 
 |  |  | 
 | void | void | 
| Line 50  ia32(void) | Line 86  ia32(void) | 
 | { | { | 
 | int rv; | int rv; | 
 |  |  | 
 |  | #if defined(WIN32) | 
 |  | rv = setjmp(exec_1step_jmpbuf); | 
 |  | #else | 
 | rv = sigsetjmp(exec_1step_jmpbuf, 1); | rv = sigsetjmp(exec_1step_jmpbuf, 1); | 
 |  | #endif | 
 | switch (rv) { | switch (rv) { | 
 | case 0: | case 0: | 
 | break; | break; | 
| Line 70  ia32withtrap(void) | Line 110  ia32withtrap(void) | 
 | { | { | 
 | int rv; | int rv; | 
 |  |  | 
 |  | #if defined(WIN32) | 
 |  | rv = setjmp(exec_1step_jmpbuf); | 
 |  | #else | 
 | rv = sigsetjmp(exec_1step_jmpbuf, 1); | rv = sigsetjmp(exec_1step_jmpbuf, 1); | 
 |  | #endif | 
 | switch (rv) { | switch (rv) { | 
 | case 0: | case 0: | 
 | break; | break; | 
| Line 94  ia32withdma(void) | Line 138  ia32withdma(void) | 
 | { | { | 
 | int rv; | int rv; | 
 |  |  | 
 |  | #if defined(WIN32) | 
 |  | rv = setjmp(exec_1step_jmpbuf); | 
 |  | #else | 
 | rv = sigsetjmp(exec_1step_jmpbuf, 1); | rv = sigsetjmp(exec_1step_jmpbuf, 1); | 
 |  | #endif | 
 | switch (rv) { | switch (rv) { | 
 | case 0: | case 0: | 
 | break; | break; | 
| Line 116  ia32_step(void) | Line 164  ia32_step(void) | 
 | { | { | 
 | int rv; | int rv; | 
 |  |  | 
 |  | #if defined(WIN32) | 
 |  | rv = setjmp(exec_1step_jmpbuf); | 
 |  | #else | 
 | rv = sigsetjmp(exec_1step_jmpbuf, 1); | rv = sigsetjmp(exec_1step_jmpbuf, 1); | 
 |  | #endif | 
 | switch (rv) { | switch (rv) { | 
 | case 0: | case 0: | 
 | break; | break; |