| version 1.11, 2004/02/05 16:41:32 | version 1.14, 2004/03/05 14:17:35 | 
| Line 43  ia32_initreg(void) | Line 43  ia32_initreg(void) | 
 | { | { | 
 | int i; | int i; | 
 |  |  | 
| CPU_STATSAVE.cpu_inst_default.seg_base = (DWORD)-1; | CPU_STATSAVE.cpu_inst_default.seg_base = (UINT32)-1; | 
 |  |  | 
 | CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING; | CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING; | 
 | CPU_EFLAG = 2; | CPU_EFLAG = 2; | 
| Line 72  ia32_initreg(void) | Line 72  ia32_initreg(void) | 
 | CPU_SET_SEGREG(CPU_CS_INDEX, 0xf000); | CPU_SET_SEGREG(CPU_CS_INDEX, 0xf000); | 
 | CPU_EIP = 0xfff0; | CPU_EIP = 0xfff0; | 
 | CPU_ADRSMASK = 0x000fffff; | CPU_ADRSMASK = 0x000fffff; | 
 |  |  | 
 |  | tlb_init(); | 
 | } | } | 
 |  |  | 
 | void | void | 
| Line 211  ia32_step(void) | Line 213  ia32_step(void) | 
 | } | } | 
 |  |  | 
 | void CPUCALL | void CPUCALL | 
| ia32_interrupt(BYTE vect) | ia32_interrupt(int vect) | 
 | { | { | 
 |  |  | 
 | INTERRUPT(vect, 0, 0, 0); | INTERRUPT(vect, 0, 0, 0); | 
| Line 280  ia32_printf(const char *str, ...) | Line 282  ia32_printf(const char *str, ...) | 
 | void | void | 
 | ia32_bioscall(void) | ia32_bioscall(void) | 
 | { | { | 
| DWORD adrs; | UINT32 adrs; | 
 |  |  | 
 | if (!CPU_STAT_PM || CPU_STAT_VM86) { | if (!CPU_STAT_PM || CPU_STAT_VM86) { | 
| adrs = (CPU_EIP - 1) + CPU_STAT_SREGBASE(CPU_CS_INDEX); | adrs = (CPU_EIP - 1) + CPU_STAT_CS_BASE; | 
 | if ((adrs >= 0xf8000) && (adrs < 0x100000)) { | if ((adrs >= 0xf8000) && (adrs < 0x100000)) { | 
 | biosfunc(adrs); | biosfunc(adrs); | 
 | if (!CPU_STAT_PM || CPU_STAT_VM86) { | if (!CPU_STAT_PM || CPU_STAT_VM86) { |