| version 1.12, 2004/02/18 20:11:37 | version 1.16, 2004/03/06 18:25:36 | 
| Line 31 | Line 31 | 
 | #include "cpu.h" | #include "cpu.h" | 
 | #include "ia32.mcr" | #include "ia32.mcr" | 
 |  |  | 
 |  | #include "pccore.h" | 
 |  | #include "iocore.h" | 
 | #include "dmap.h" | #include "dmap.h" | 
 | #include "bios.h" | #include "bios.h" | 
 | #if defined(IA32_REBOOT_ON_PANIC) | #if defined(IA32_REBOOT_ON_PANIC) | 
| Line 43  ia32_initreg(void) | Line 45  ia32_initreg(void) | 
 | { | { | 
 | int i; | int i; | 
 |  |  | 
| CPU_STATSAVE.cpu_inst_default.seg_base = (DWORD)-1; | CPU_STATSAVE.cpu_inst_default.seg_base = (UINT32)-1; | 
 |  |  | 
 | CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING; | CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING; | 
 | CPU_EFLAG = 2; | CPU_EFLAG = 2; | 
| Line 72  ia32_initreg(void) | Line 74  ia32_initreg(void) | 
 | CPU_SET_SEGREG(CPU_CS_INDEX, 0xf000); | CPU_SET_SEGREG(CPU_CS_INDEX, 0xf000); | 
 | CPU_EIP = 0xfff0; | CPU_EIP = 0xfff0; | 
 | CPU_ADRSMASK = 0x000fffff; | CPU_ADRSMASK = 0x000fffff; | 
 |  |  | 
 |  | tlb_init(); | 
 | } | } | 
 |  |  | 
 | void | void | 
| Line 113  ia32(void) | Line 117  ia32(void) | 
 | break; | break; | 
 | } | } | 
 |  |  | 
| do { | if (CPU_TRAP) { | 
| exec_1step(); | do { | 
| } while (CPU_REMCLOCK > 0); | exec_1step(); | 
| } | if (CPU_TRAP) { | 
|  | ia32_interrupt(1); | 
| void | } | 
| ia32withtrap(void) | dmap(); | 
| { | } while (CPU_REMCLOCK > 0); | 
| int rv; | } else if (dmac.working) { | 
|  | do { | 
| rv = sigsetjmp(exec_1step_jmpbuf, 1); | exec_1step(); | 
| switch (rv) { | dmap(); | 
| case 0: | } while (CPU_REMCLOCK > 0); | 
| break; | } else { | 
|  | do { | 
| case 1: | exec_1step(); | 
| VERBOSE(("ia32withtrap: return from exception")); | } while (CPU_REMCLOCK > 0); | 
| break; |  | 
|  |  | 
| case 2: |  | 
| VERBOSE(("ia32withtrap: return from panic")); |  | 
| return; |  | 
|  |  | 
| default: |  | 
| VERBOSE(("ia32withtrap: return from unknown cause")); |  | 
| break; |  | 
| } |  | 
|  |  | 
| do { |  | 
| exec_1step(); |  | 
| if (CPU_TRAP) { |  | 
| ia32_interrupt(1); |  | 
| } |  | 
| } while (CPU_REMCLOCK > 0); |  | 
| } |  | 
|  |  | 
| void |  | 
| ia32withdma(void) |  | 
| { |  | 
| int rv; |  | 
|  |  | 
| rv = sigsetjmp(exec_1step_jmpbuf, 1); |  | 
| switch (rv) { |  | 
| case 0: |  | 
| break; |  | 
|  |  | 
| case 1: |  | 
| VERBOSE(("ia32withdma: return from exception")); |  | 
| break; |  | 
|  |  | 
| case 2: |  | 
| VERBOSE(("ia32withdma: return from panic")); |  | 
| return; |  | 
|  |  | 
| default: |  | 
| VERBOSE(("ia32withdma: return from unknown cause")); |  | 
| break; |  | 
 | } | } | 
 |  |  | 
 | do { |  | 
 | exec_1step(); |  | 
 | dmap_i286(); |  | 
 | } while (CPU_REMCLOCK > 0); |  | 
 | } | } | 
 |  |  | 
 | void | void | 
| Line 206  ia32_step(void) | Line 165  ia32_step(void) | 
 | if (CPU_TRAP) { | if (CPU_TRAP) { | 
 | ia32_interrupt(1); | ia32_interrupt(1); | 
 | } | } | 
| dmap_i286(); | dmap(); | 
 | } while (CPU_REMCLOCK > 0); | } while (CPU_REMCLOCK > 0); | 
 | } | } | 
 |  |  | 
 | void CPUCALL | void CPUCALL | 
| ia32_interrupt(REG8 vect) | ia32_interrupt(int vect) | 
 | { | { | 
 |  |  | 
 | INTERRUPT(vect, 0, 0, 0); | INTERRUPT(vect, 0, 0, 0); | 
| Line 280  ia32_printf(const char *str, ...) | Line 239  ia32_printf(const char *str, ...) | 
 | void | void | 
 | ia32_bioscall(void) | ia32_bioscall(void) | 
 | { | { | 
| DWORD adrs; | UINT32 adrs; | 
 |  |  | 
 | if (!CPU_STAT_PM || CPU_STAT_VM86) { | if (!CPU_STAT_PM || CPU_STAT_VM86) { | 
| adrs = (CPU_EIP - 1) + CPU_STAT_SREGBASE(CPU_CS_INDEX); | adrs = (CPU_EIP - 1) + CPU_STAT_CS_BASE; | 
 | if ((adrs >= 0xf8000) && (adrs < 0x100000)) { | if ((adrs >= 0xf8000) && (adrs < 0x100000)) { | 
 | biosfunc(adrs); | biosfunc(adrs); | 
 | if (!CPU_STAT_PM || CPU_STAT_VM86) { | if (!CPU_STAT_PM || CPU_STAT_VM86) { |