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version 1.18, 2004/03/09 18:52:12
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version 1.21, 2004/05/23 15:01:45
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Line 95 ia32shut(void)
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Line 95 ia32shut(void)
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| } |
} |
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| void |
void |
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ia32a20enable(BOOL enable) |
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{ |
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#if (CPU_FAMILY == 3) |
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CPU_ADRSMASK = (enable)?0x00ffffff:0x00ffffff; |
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#else |
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CPU_ADRSMASK = (enable)?0xffffffff:0x00ffffff; |
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#endif |
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} |
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void |
| ia32(void) |
ia32(void) |
| { |
{ |
| int rv; |
int rv; |
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Line 185 ia32_step(void)
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Line 195 ia32_step(void)
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| } |
} |
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| void CPUCALL |
void CPUCALL |
| ia32_interrupt(int vect) |
ia32_interrupt(int vect, int soft) |
| { |
{ |
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| INTERRUPT(vect, FALSE, FALSE, 0); |
// TRACEOUT(("int (%x, %x) PE=%d VM=%d", vect, soft, CPU_STAT_PM, CPU_STAT_VM86)); |
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if (!soft) { |
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INTERRUPT(vect, FALSE, FALSE, 0); |
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} |
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else { |
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if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (soft == -1)) { |
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TRACEOUT(("BIOS interrupt: VM86 && IOPL < 3 && INTn")); |
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} |
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INTERRUPT(vect, TRUE, FALSE, 0); |
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} |
| } |
} |
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Line 262 ia32_bioscall(void)
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Line 281 ia32_bioscall(void)
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| adrs = (CPU_EIP - 1) + CPU_STAT_CS_BASE; |
adrs = (CPU_EIP - 1) + CPU_STAT_CS_BASE; |
| #endif |
#endif |
| if ((adrs >= 0xf8000) && (adrs < 0x100000)) { |
if ((adrs >= 0xf8000) && (adrs < 0x100000)) { |
| biosfunc(adrs); |
if (biosfunc(adrs)) { |
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CPU_PREFETCH_CLEAR(); |
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} |
| if (!CPU_STAT_PM || CPU_STAT_VM86) { |
if (!CPU_STAT_PM || CPU_STAT_VM86) { |
| CPU_SET_SEGREG(CPU_ES_INDEX, CPU_ES); |
CPU_SET_SEGREG(CPU_ES_INDEX, CPU_ES); |
| CPU_SET_SEGREG(CPU_CS_INDEX, CPU_CS); |
CPU_SET_SEGREG(CPU_CS_INDEX, CPU_CS); |
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