--- np2/i386c/ia32/interface.c	2004/01/23 14:33:26	1.7
+++ np2/i386c/ia32/interface.c	2004/03/06 18:07:37	1.15
@@ -1,4 +1,4 @@
-/*	$Id: interface.c,v 1.7 2004/01/23 14:33:26 monaka Exp $	*/
+/*	$Id: interface.c,v 1.15 2004/03/06 18:07:37 monaka Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -31,17 +31,21 @@
 #include "cpu.h"
 #include "ia32.mcr"
 
+#include "pccore.h"
+#include "iocore.h"
 #include "dmap.h"
 #include "bios.h"
+#if defined(IA32_REBOOT_ON_PANIC)
+#include "pccore.h"
+#endif
 
 
 void
-ia32reset(void)
+ia32_initreg(void)
 {
 	int i;
 
-	memset(&i386core.s, 0, sizeof(i386core.s));
-	CPU_STATSAVE.cpu_inst_default.seg_base = (DWORD)-1;
+	CPU_STATSAVE.cpu_inst_default.seg_base = (UINT32)-1;
 
 	CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING;
 	CPU_EFLAG = 2;
@@ -70,79 +74,28 @@ ia32reset(void)
 	CPU_SET_SEGREG(CPU_CS_INDEX, 0xf000);
 	CPU_EIP = 0xfff0;
 	CPU_ADRSMASK = 0x000fffff;
-}
 
-void
-ia32shut(void)
-{
-	SINT32	remainclock;			/* 結局ハマるのか漏れ… */
-	SINT32	baseclock;
-	UINT32	clock;
-
-	remainclock = CPU_REMCLOCK;
-	baseclock = CPU_BASECLOCK;
-	clock = CPU_CLOCK;
-
-	ia32reset();
-
-	CPU_REMCLOCK = remainclock;
-	CPU_BASECLOCK = baseclock;
-	CPU_CLOCK = clock;
+	tlb_init();
 }
 
 void
-ia32(void)
+ia32reset(void)
 {
-	int rv;
-
-	rv = sigsetjmp(exec_1step_jmpbuf, 1);
-	switch (rv) {
-	case 0:
-		break;
 
-	case 1:
-		VERBOSE(("ia32: return from exception"));
-		break;
-
-	default:
-		VERBOSE(("ia32: return from unknown cause"));
-		break;
-	}
-
-	do {
-		exec_1step();
-	} while (CPU_REMCLOCK > 0);
+	memset(&i386core.s, 0, sizeof(i386core.s));
+	ia32_initreg();
 }
 
 void
-ia32withtrap(void)
+ia32shut(void)
 {
-	int rv;
 
-	rv = sigsetjmp(exec_1step_jmpbuf, 1);
-	switch (rv) {
-	case 0:
-		break;
-
-	case 1:
-		VERBOSE(("ia32withtrap: return from exception"));
-		break;
-
-	default:
-		VERBOSE(("ia32withtrap: return from unknown cause"));
-		break;
-	}
-
-	do {
-		exec_1step();
-		if (CPU_TRAP) {
-			ia32_interrupt(1);
-		}
-	} while (CPU_REMCLOCK > 0);
+	memset(&i386core.s, 0, offsetof(I386STAT, cpu_type));
+	ia32_initreg();
 }
 
 void
-ia32withdma(void)
+ia32(void)
 {
 	int rv;
 
@@ -152,18 +105,36 @@ ia32withdma(void)
 		break;
 
 	case 1:
-		VERBOSE(("ia32withdma: return from exception"));
+		VERBOSE(("ia32: return from exception"));
 		break;
 
+	case 2:
+		VERBOSE(("ia32: return from panic"));
+		return;
+
 	default:
-		VERBOSE(("ia32withdma: return from unknown cause"));
+		VERBOSE(("ia32: return from unknown cause"));
 		break;
 	}
 
-	do {
-		exec_1step();
-		dmap_i286();
-	} while (CPU_REMCLOCK > 0);
+	if (CPU_TRAP) {
+		do {
+			exec_1step();
+			if (CPU_TRAP) {
+				ia32_interrupt(1);
+			}
+			dmap_i286();
+		} while (CPU_REMCLOCK > 0);
+	} else if (dmac.working) {
+		do {
+			exec_1step();
+			dmap_i286();
+		} while (CPU_REMCLOCK > 0);
+	} else {
+		do {
+			exec_1step();
+		} while (CPU_REMCLOCK > 0);
+	}
 }
 
 void
@@ -180,6 +151,10 @@ ia32_step(void)
 		VERBOSE(("ia32_step: return from exception"));
 		break;
 
+	case 2:
+		VERBOSE(("ia32_step: return from panic"));
+		return;
+
 	default:
 		VERBOSE(("ia32_step: return from unknown cause"));
 		break;
@@ -195,7 +170,7 @@ ia32_step(void)
 }
 
 void CPUCALL
-ia32_interrupt(BYTE vect)
+ia32_interrupt(int vect)
 {
 
 	INTERRUPT(vect, 0, 0, 0);
@@ -220,8 +195,15 @@ ia32_panic(const char *str, ...)
 
 	msgbox("ia32_panic", buf);
 
+#if defined(IA32_REBOOT_ON_PANIC)
+	VERBOSE(("ia32_panic: reboot"));
+	pccore_cfgupdate();
+	pccore_reset();
+	siglongjmp(exec_1step_jmpbuf, 2);
+#else
 	__ASSERT(0);
 	exit(1);
+#endif
 }
 
 void
@@ -257,16 +239,18 @@ ia32_printf(const char *str, ...)
 void
 ia32_bioscall(void)
 {
-	DWORD adrs;
+	UINT32 adrs;
 
-	if (!CPU_STAT_PM && !CPU_INST_OP32 && !CPU_INST_AS32) {
-		adrs = ((CPU_IP-1) & 0xffff) + CPU_STAT_SREGBASE(CPU_CS_INDEX);
+	if (!CPU_STAT_PM || CPU_STAT_VM86) {
+		adrs = (CPU_EIP - 1) + CPU_STAT_CS_BASE;
 		if ((adrs >= 0xf8000) && (adrs < 0x100000)) {
 			biosfunc(adrs);
-			CPU_SET_SEGREG(CPU_ES_INDEX, CPU_ES);
-			CPU_SET_SEGREG(CPU_CS_INDEX, CPU_CS);
-			CPU_SET_SEGREG(CPU_SS_INDEX, CPU_SS);
-			CPU_SET_SEGREG(CPU_DS_INDEX, CPU_DS);
+			if (!CPU_STAT_PM || CPU_STAT_VM86) {
+				CPU_SET_SEGREG(CPU_ES_INDEX, CPU_ES);
+				CPU_SET_SEGREG(CPU_CS_INDEX, CPU_CS);
+				CPU_SET_SEGREG(CPU_SS_INDEX, CPU_SS);
+				CPU_SET_SEGREG(CPU_DS_INDEX, CPU_DS);
+			}
 		}
 	}
 }