--- np2/i386c/ia32/interface.c	2004/03/09 18:52:12	1.18
+++ np2/i386c/ia32/interface.c	2005/02/08 09:57:26	1.22
@@ -1,4 +1,4 @@
-/*	$Id: interface.c,v 1.18 2004/03/09 18:52:12 yui Exp $	*/
+/*	$Id: interface.c,v 1.22 2005/02/08 09:57:26 yui Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -33,7 +33,7 @@
 
 #include "pccore.h"
 #include "iocore.h"
-#include "dmap.h"
+#include "dmax86.h"
 #include "bios.h"
 #if defined(IA32_REBOOT_ON_PANIC)
 #include "pccore.h"
@@ -95,6 +95,16 @@ ia32shut(void)
 }
 
 void
+ia32a20enable(BOOL enable)
+{
+#if (CPU_FAMILY == 3)
+	CPU_ADRSMASK = (enable)?0x00ffffff:0x00ffffff;
+#else
+	CPU_ADRSMASK = (enable)?0xffffffff:0x00ffffff;
+#endif
+}
+
+void
 ia32(void)
 {
 	int rv;
@@ -121,7 +131,7 @@ ia32(void)
 	do {
 		exec_1step();
 		if (dmac.working) {
-			dmap();
+			dmax86();
 		}
 	} while (CPU_REMCLOCK > 0);
 #else
@@ -132,12 +142,12 @@ ia32(void)
 				CPU_DR6 |= CPU_DR6_BS;
 				INTERRUPT(1, TRUE, FALSE, 0);
 			}
-			dmap();
+			dmax86();
 		} while (CPU_REMCLOCK > 0);
 	} else if (dmac.working) {
 		do {
 			exec_1step();
-			dmap();
+			dmax86();
 		} while (CPU_REMCLOCK > 0);
 	} else {
 		do {
@@ -179,16 +189,25 @@ ia32_step(void)
 		}
 #endif
 		if (dmac.working) {
-			dmap();
+			dmax86();
 		}
 	} while (CPU_REMCLOCK > 0);
 }
 
 void CPUCALL
-ia32_interrupt(int vect)
+ia32_interrupt(int vect, int soft)
 {
 
-	INTERRUPT(vect, FALSE, FALSE, 0);
+//	TRACEOUT(("int (%x, %x) PE=%d VM=%d",  vect, soft, CPU_STAT_PM, CPU_STAT_VM86));
+	if (!soft) {
+		INTERRUPT(vect, FALSE, FALSE, 0);
+	}
+	else {
+		if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (soft == -1)) {
+			TRACEOUT(("BIOS interrupt: VM86 && IOPL < 3 && INTn"));
+		}
+		INTERRUPT(vect, TRUE, FALSE, 0);
+	}
 }
 
 
@@ -262,7 +281,9 @@ ia32_bioscall(void)
 		adrs = (CPU_EIP - 1) + CPU_STAT_CS_BASE;
 #endif
 		if ((adrs >= 0xf8000) && (adrs < 0x100000)) {
-			biosfunc(adrs);
+			if (biosfunc(adrs)) {
+				CPU_PREFETCH_CLEAR();
+			}
 			if (!CPU_STAT_PM || CPU_STAT_VM86) {
 				CPU_SET_SEGREG(CPU_ES_INDEX, CPU_ES);
 				CPU_SET_SEGREG(CPU_CS_INDEX, CPU_CS);