np2/i386c/ia32/paging.c - diff

Return to paging.c CVS log

Up to [RetroPC.NET] / np2 / i386c / ia32

Diff for /np2/i386c/ia32/paging.c between versions 1.30 and 1.35

version 1.30, 2008/03/22 04:03:07	version 1.35, 2011/12/29 13:32:12
Line 1	Line 1
/* $Id$ */

/*	/*
* Copyright (c) 2003-2004 NONAKA Kimihiro	* Copyright (c) 2003-2004 NONAKA Kimihiro
* All rights reserved.	* All rights reserved.
Line 30	Line 28
#include "ia32.mcr"	#include "ia32.mcr"

/*	/*
* ’伊﹝扑’弁’交’孕’鬺生石瘚□	* 樍婍汙槻弁樍忴井樍巧樍唳本嗥﹜ *
* 4-31: 芺沶碧心	* 4-31: 鈭碧心
* 3: RSVD: 0 = 白巧伙玄及葆奢反芺沶申永玄啜�匹反卅井勻凶‘	* 3: RSVD: 0 = 白巧伙玄及葆奢反芺沶申永玄啜�匹反卅井勻凶‘
* 1 = 矢□斥’白巧伙玄及葆奢反﹞啜�午穴□弁今木凶 PTE 引凶反	* 1 = 矢□斥’白巧伙玄及葆奢反﹞啜�午穴□弁今木凶 PTE 引凶反
* PDE 及芺沶申永玄匏譆及丹切域勾匹﹞1 互腹請今木凶仇午匹丐月‘	* PDE 及芺沶申永玄匏譆及丹切域勾匹﹞1 互腹請今木凶仇午匹丐月‘
* 2: U/S: 0 = 白巧伙玄及葆奢午卅勻凶失弁本旦反皿伕本永扔互旦□由田奶扒’	* 2: U/S: 0 = 白巧伙玄及葆奢午卅勻凶失弁本旦反皿伕本永扔互旦□由田奶扒’
* 乒□玉匹撢墊醱卞墊歹木凶‘	* 乒□玉匹撢墊醱卞墊歹木凶‘
* 1 = 白巧伙玄及葆奢午卅勻凶失弁本旦反皿伕本永扔互交□扒’乒□玉匹	* 1 = 白巧伙玄及葆奢午卅勻凶失弁本旦反皿伕本永扔互交□扒’乒□玉匹
* 撢墊醱卞墊歹木凶‘	* 撢墊醱卞墊歹木凶‘
* 1: W/R: 0 = 白巧伙玄及葆奢午卅勻凶失弁本旦互厶心潸曰匹丐勻凶‘	* 1: W/R: 0 = 白巧伙玄及葆奢午卅勻凶失弁本旦互厶心潸曰匹丐勻凶‘
* 1 = 白巧伙玄及葆奢午卅勻凶失弁本旦互踏五慇心匹丐勻凶‘	* 1 = 白巧伙玄及葆奢午卅勻凶失弁本旦互踏五慇心匹丐勻凶‘
* 0: P: 0 = 白巧伙玄及葆奢互尕箕矢□斥匹丐勻凶‘	* 0: P: 0 = 白巧伙玄及葆奢互尕箕矢□斥匹丐勻凶‘
* 1 = 白巧伙玄及葆奢互矢□斥’伊矛伙忡賃啜�匹丐勻凶‘	* 1 = 白巧伙玄及葆奢互矢□斥’伊矛伙忡賃啜�匹丐勻凶‘
*/	*/

/*	/*
* 票摒 4.12. 矢□斥忡賃午本弘丟件玄忡賃及賺心寧歹六	* 銝 4.12. 矢□斥忡賃午本弘丟件玄忡賃及賺心寧歹六
* ＞刓 4-2. 矢□斥’犯奴伊弁玄伉午矢□斥’氾□皮伙及忡賃及賺心寧歹六＝	* ＞刓 4-2. 矢□斥’犯奴伊弁玄伉午矢□斥’氾□皮伙及忡賃及賺心寧歹六＝
*	*
* +------------+------------+------------+	* +------------+------------+------------+
* \| PDE \| PTE \| merge \|	* \| PDE \| PTE \| merge \|
Line 73	Line 71
* \| s \| rw \| s \| rw \| s \| rw \|	* \| s \| rw \| s \| rw \| s \| rw \|
* +-----+------+-----+------+-----+------+	* +-----+------+-----+------+-----+------+
*	*
* ＞奴 rw/p : CR0 ﹜石 WP ’乒’氾’生﹜乓 ON ﹜石本艭謢甲﹜穴 ro	* 蜬扔 rw/p : CR0 槦亦 WP 樍］乓樍啣∫ ON 槦亦磝巨潞啣╲槦永 ro
*/	*/

/*	/*
* ’漰銣籈＞’永’扔’弗/PxE(本篞亙扔奶本生)/CPL/CR0 ﹜生’伊﹝扑’弁’＞’永’扔’弗弁＞﹜石巨伉平弁	* 樍﹝樍＞樍尼槻＞槻永槻扔槻弗/PxE(頨湊奴剚賤翴央)/CPL/CR0 槦奴樍婍汙槻弁槻＞槻永槻扔槻弗鴘孕槦亦壚＞餑 *
* +-----+-----+-----+-----+-----+---+	* +-----+-----+-----+-----+-----+---+
* \| CR0 \| CPL \| PxE \| PxE \| ope \| \|	* \| CR0 \| CPL \| PxE \| PxE \| ope \| \|
Line 157 static const UINT8 page_access_bit[32] =	Line 155 static const UINT8 page_access_bit[32] =

/*	/*
*--	*--
* 32bit 坁咥失玉伊旦 4k 矢□斥	* 32bit 臄孕艛砍中樍脣旨槻弗 4k 樍婍汙槻弁
*	*
* ’籈甲’＞﹝仲’＞’用’孎弗	* 樍尼樍嗅中樍扔槻＞樍脣旨槻弗
* 31 22 21 12 11 0	* 31 22 21 12 11 0
* +------------------------+----------------------+--------------------------+	* +------------------------+----------------------+--------------------------+
* \| ’伊﹝扑’弁﹝仲’甘’＝’孎永’生’ \| 矢□斥’氾□皮伙 \| 左白本永玄 \|	* \| 樍婍汙槻弁樍扔樍桀丰樍乓槻永樍啣收 \| 樍婍汙槻弁樍扔樍砍汙樍极早 \| 槻尼樍忴公樍血亥 \|
* +------------------------+----------------------+--------------------------+	* +------------------------+----------------------+--------------------------+
* \| \| \|	* \| \| \|
* +-----------+ +-----------+ +----------+	* +-----------+ +-----------+ +----------+
* \| \| \|	* \| \| \|
* \| ’伊﹝扑’弁﹝仲’甘’＝’孎永’生’ \| 矢□斥’氾□皮伙矢□斥 \|	* \| 矢□斥’犯奴伊弁玄伉 \| 矢□斥’氾□皮伙矢□斥 \|
* \| +--------------------+ \| +-------------------+ +------------------+ \|	* \| +--------------------+ \| +-------------------+ +------------------+ \|
* \| \| \| \| \| \| \| \| \|	* \| \| \| \| \| \| \| \| \|
* \| \| \| \| +-------------------+ \| \| \|	* \| \| \| \| +-------------------+ \| \| \|
Line 179 static const UINT8 page_access_bit[32] =	Line 177 static const UINT8 page_access_bit[32] =
* \| \| \| \| \| \| \| \|	* \| \| \| \| \| \| \| \|
* +>+--------------------+ +>+-------------------+ +>+------------------+	* +>+--------------------+ +>+-------------------+ +>+------------------+
* \|	* \|
* +- CR3()	* +- CR3(坁咥失玉伊旦)
*/	*/

static UINT32 MEMCALL paging(const UINT32 laddr, const int ucrw);	static UINT32 MEMCALL paging(const UINT32 laddr, const int ucrw);
#if defined(IA32_SUPPORT_TLB)
static void MEMCALL tlb_update(const UINT32 laddr, const UINT entry, const int ucrw);	static void MEMCALL tlb_update(const UINT32 laddr, const UINT entry, const int ucrw);
#endif

#define PAGE_SIZE 0x1000	#define PAGE_SIZE 0x1000
#define PAGE_MASK (PAGE_SIZE - 1)	#define PAGE_MASK (PAGE_SIZE - 1)

UINT8 MEMCALL	UINT8 MEMCALL
cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (func)(UINT32, void ), void *arg)	cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (CPUCALL func)(UINT32, void ), void *arg)
{	{
const int ucrw = CPU_PAGE_WRITE_DATA\|CPU_STAT_USER_MODE;	const int ucrw = CPU_PAGE_WRITE_DATA\|CPU_STAT_USER_MODE;
UINT32 result, value;	UINT32 result, value;
Line 206 cpu_memory_access_la_RMW_b(UINT32 laddr,	Line 202 cpu_memory_access_la_RMW_b(UINT32 laddr,
}	}

UINT16 MEMCALL	UINT16 MEMCALL
cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (func)(UINT32, void ), void *arg)	cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (CPUCALL func)(UINT32, void ), void *arg)
{	{
const int ucrw = CPU_PAGE_WRITE_DATA\|CPU_STAT_USER_MODE;	const int ucrw = CPU_PAGE_WRITE_DATA\|CPU_STAT_USER_MODE;
UINT32 result, value;	UINT32 result, value;
Line 229 cpu_memory_access_la_RMW_w(UINT32 laddr,	Line 225 cpu_memory_access_la_RMW_w(UINT32 laddr,
}	}

UINT32 MEMCALL	UINT32 MEMCALL
cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (func)(UINT32, void ), void *arg)	cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (CPUCALL func)(UINT32, void ), void *arg)
{	{
const int ucrw = CPU_PAGE_WRITE_DATA\|CPU_STAT_USER_MODE;	const int ucrw = CPU_PAGE_WRITE_DATA\|CPU_STAT_USER_MODE;
UINT32 result, value;	UINT32 result, value;
Line 641 paging(const UINT32 laddr, const int ucr	Line 637 paging(const UINT32 laddr, const int ucr
UINT32 pte; /* page table entry */	UINT32 pte; /* page table entry */
UINT bit;	UINT bit;
UINT err;	UINT err;
#if defined(IA32_SUPPORT_TLB)
TLB_ENTRY_T *ep;	TLB_ENTRY_T *ep;

ep = tlb_lookup(laddr, ucrw);	ep = tlb_lookup(laddr, ucrw);
if (ep != NULL)	if (ep != NULL)
return ep->paddr + (laddr & PAGE_MASK);	return ep->paddr + (laddr & PAGE_MASK);
#endif

pde_addr = CPU_STAT_PDE_BASE + ((laddr >> 20) & 0xffc);	pde_addr = CPU_STAT_PDE_BASE + ((laddr >> 20) & 0xffc);
pde = cpu_memoryread_d(pde_addr);	pde = cpu_memoryread_d(pde_addr);
Line 703 paging(const UINT32 laddr, const int ucr	Line 697 paging(const UINT32 laddr, const int ucr
cpu_memorywrite_d(pte_addr, pte);	cpu_memorywrite_d(pte_addr, pte);
}	}

#if defined(IA32_SUPPORT_TLB)
tlb_update(laddr, pte, (bit & (CPU_PTE_WRITABLE\|CPU_PTE_USER_MODE)) + ((ucrw & CPU_PAGE_CODE) >> 1));	tlb_update(laddr, pte, (bit & (CPU_PTE_WRITABLE\|CPU_PTE_USER_MODE)) + ((ucrw & CPU_PAGE_CODE) >> 1));
#endif
return paddr;	return paddr;

pf_exception:	pf_exception:
Line 716 pf_exception:	Line 709 pf_exception:
return 0; /* compiler happy */	return 0; /* compiler happy */
}	}


#if defined(IA32_SUPPORT_TLB)
/*	/*
* TLB	* TLB
*/	*/
Line 789 tlb_init(void)	Line 780 tlb_init(void)

memset(tlb, 0, sizeof(tlb));	memset(tlb, 0, sizeof(tlb));
#if defined(IA32_PROFILE_TLB)	#if defined(IA32_PROFILE_TLB)
memset(tlb_profile, 0, sizeof(tlb_profile));	memset(&tlb_profile, 0, sizeof(tlb_profile));
#endif /* IA32_PROFILE_TLB */	#endif /* IA32_PROFILE_TLB */
}	}

Line 906 tlb_update(const UINT32 laddr, const UIN	Line 897 tlb_update(const UINT32 laddr, const UIN
}	}
ep->memp = NULL;	ep->memp = NULL;
}	}
#endif /* IA32_SUPPORT_TLB */

RetroPC.NET-CVS <cvs@retropc.net>

Removed from v.1.30
changed lines
	Added in v.1.35