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| version 1.5, 2004/01/23 16:17:51 | version 1.6, 2004/01/26 15:22:16 |
|---|---|
| Line 285 cpu_linear_memory_write(DWORD laddr, DWO | Line 285 cpu_linear_memory_write(DWORD laddr, DWO |
| case 3: | case 3: |
| cpu_memorywrite_w(paddr, value & 0xffff); | cpu_memorywrite_w(paddr, value & 0xffff); |
| value >>= 16; | value >>= 16; |
| cpu_memorywrite(paddr, value & 0xff); | cpu_memorywrite(paddr + 2, value & 0xff); |
| value >>= 8; | value >>= 8; |
| break; | break; |
| Line 347 paging(DWORD laddr, int crw, int user_mo | Line 347 paging(DWORD laddr, int crw, int user_mo |
| DWORD pte_addr; /* page table entry address */ | DWORD pte_addr; /* page table entry address */ |
| DWORD pte; /* page table entry */ | DWORD pte; /* page table entry */ |
| DWORD bit; | DWORD bit; |
| DWORD err = 0; | DWORD err; |
| #if defined(IA32_SUPPORT_TLB) | #if defined(IA32_SUPPORT_TLB) |
| if (tlb_lookup(laddr, crw, &paddr)) | if (tlb_lookup(laddr, crw, &paddr)) |