| version 1.7, 2004/01/27 15:56:57 | version 1.8, 2004/02/03 14:27:07 | 
| Line 112 | Line 112 | 
 | * +-----+-----------+-----+-----+---+ | * +-----+-----------+-----+-----+---+ | 
 | */ | */ | 
 | #if !defined(USE_PAGE_ACCESS_TABLE) | #if !defined(USE_PAGE_ACCESS_TABLE) | 
| static const DWORD page_access = 0xd0cdd0ff; | #define page_access     0xd0ddd0ff | 
 | #else   /* USE_PAGE_ACCESS_TABLE */ | #else   /* USE_PAGE_ACCESS_TABLE */ | 
 | static const BYTE page_access_bit[32] = { | static const BYTE page_access_bit[32] = { | 
 | 1,      /* CR0: n, CPL: s, PTE: s, PTE: r, ope: r */ | 1,      /* CR0: n, CPL: s, PTE: s, PTE: r, ope: r */ | 
| Line 143  static const BYTE page_access_bit[32] = | Line 143  static const BYTE page_access_bit[32] = | 
 | 1,      /* CR0: p, CPL: s, PTE: u, PTE: r, ope: r */ | 1,      /* CR0: p, CPL: s, PTE: u, PTE: r, ope: r */ | 
 | 0,      /* CR0: p, CPL: s, PTE: u, PTE: r, ope: w */ | 0,      /* CR0: p, CPL: s, PTE: u, PTE: r, ope: w */ | 
 | 1,      /* CR0: p, CPL: s, PTE: u, PTE: w, ope: r */ | 1,      /* CR0: p, CPL: s, PTE: u, PTE: w, ope: r */ | 
| 0,      /* CR0: p, CPL: s, PTE: u, PTE: w, ope: w */ | 1,      /* CR0: p, CPL: s, PTE: u, PTE: w, ope: w */ | 
 |  |  | 
 | 0,      /* CR0: p, CPL: u, PTE: s, PTE: r, ope: r */ | 0,      /* CR0: p, CPL: u, PTE: s, PTE: r, ope: r */ | 
 | 0,      /* CR0: p, CPL: u, PTE: s, PTE: r, ope: w */ | 0,      /* CR0: p, CPL: u, PTE: s, PTE: r, ope: w */ | 
| Line 375  paging(DWORD laddr, int crw, int user_mo | Line 375  paging(DWORD laddr, int crw, int user_mo | 
 | cpu_memorywrite_d(pde_addr, pde); | cpu_memorywrite_d(pde_addr, pde); | 
 | } | } | 
 |  |  | 
 |  | #if CPU_FAMILY >= 5 | 
 | /* no support PAE */ | /* no support PAE */ | 
 | __ASSERT(!(CPU_CR4 & CPU_CR4_PAE)); | __ASSERT(!(CPU_CR4 & CPU_CR4_PAE)); | 
 |  |  | 
| Line 387  paging(DWORD laddr, int crw, int user_mo | Line 388  paging(DWORD laddr, int crw, int user_mo | 
 |  |  | 
 | /* make physical address */ | /* make physical address */ | 
 | paddr = (pde & CPU_PDE_4M_BASEADDR_MASK) | (laddr & 0x003fffff); | paddr = (pde & CPU_PDE_4M_BASEADDR_MASK) | (laddr & 0x003fffff); | 
| } else { | } else | 
|  | #endif  /* CPU_FAMILY >= 5 */ | 
|  | { | 
 | /* 4KB page size */ | /* 4KB page size */ | 
 | pte_addr = (pde & CPU_PDE_BASEADDR_MASK) | ((laddr >> 10) & 0xffc); | pte_addr = (pde & CPU_PDE_BASEADDR_MASK) | ((laddr >> 10) & 0xffc); | 
 | pte = cpu_memoryread_d(pte_addr); | pte = cpu_memoryread_d(pte_addr); |