--- np2/i386c/ia32/paging.c 2004/03/23 18:38:07 1.18 +++ np2/i386c/ia32/paging.c 2004/03/24 14:34:23 1.22 @@ -1,4 +1,4 @@ -/* $Id: paging.c,v 1.18 2004/03/23 18:38:07 yui Exp $ */ +/* $Id: paging.c,v 1.22 2004/03/24 14:34:23 monaka Exp $ */ /* * Copyright (c) 2003-2004 NONAKA Kimihiro @@ -184,61 +184,242 @@ static const UINT8 page_access_bit[32] = * +- CR3(物理アドレス) */ -static UINT32 paging(const UINT32 laddr, const int crw, const int user_mode); +static UINT32 paging(const UINT32 laddr, const int ucrw); #if defined(IA32_SUPPORT_TLB) static BOOL tlb_lookup(const UINT32 vaddr, const int crw, UINT32 *paddr); static void tlb_update(const UINT32 laddr, const UINT entry, const int crw); #endif - -void MEMCALL -cpu_memory_access_la_region(UINT32 laddr, UINT length, const int crw, const int user_mode, BYTE *data) +#if defined(IA32_PAGING_EACHSIZE) +UINT8 MEMCALL +cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) { + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|CPU_STAT_USER_MODE; + UINT32 result, value; UINT32 paddr; - UINT remain; /* page remain */ - UINT r; - if (length == 0) - return; + paddr = paging(laddr, ucrw); + value = cpu_memoryread(paddr); + result = (*func)(value, arg); + cpu_memorywrite(paddr, (UINT8)result); + + return value; +} + +UINT16 MEMCALL +cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) +{ + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|CPU_STAT_USER_MODE; + UINT32 result, value; + UINT32 paddr[2]; + + paddr[0] = paging(laddr, ucrw); + if ((laddr + 1) & 0x00000fff) { + value = cpu_memoryread_w(paddr[0]); + result = (*func)(value, arg); + cpu_memorywrite_w(paddr[0], (UINT16)result); + } else { + paddr[1] = paging(laddr + 1, ucrw); + value = cpu_memoryread_b(paddr[0]); + value += (UINT16)cpu_memoryread_b(paddr[1]) << 8; + result = (*func)(value, arg); + cpu_memorywrite(paddr[0], (UINT8)result); + cpu_memorywrite(paddr[1], (UINT8)(result >> 8)); + } + return value; +} +UINT32 MEMCALL +cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) +{ + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|CPU_STAT_USER_MODE; + UINT32 result, value; + UINT32 paddr[2]; + UINT remain; + + paddr[0] = paging(laddr, ucrw); remain = 0x1000 - (laddr & 0x00000fff); - for (;;) { - if (!CPU_STAT_PAGING) { - paddr = laddr; - } else { - paddr = paging(laddr, crw, user_mode); + if (remain >= 4) { + value = cpu_memoryread_d(paddr[0]); + result = (*func)(value, arg); + cpu_memorywrite_d(paddr[0], result); + } else { + paddr[1] = paging(laddr + remain, ucrw); + switch (remain) { + case 3: + value = cpu_memoryread(paddr[0]); + value += (UINT32)cpu_memoryread_w(paddr[0] + 1) << 8; + value += (UINT32)cpu_memoryread(paddr[1]) << 24; + result = (*func)(value, arg); + cpu_memorywrite(paddr[0], (UINT8)result); + cpu_memorywrite_w(paddr[0] + 1, (UINT16)(result >> 8)); + cpu_memorywrite(paddr[1], (UINT8)(result >> 24)); + break; + + case 2: + value = cpu_memoryread_w(paddr[0]); + value += (UINT32)cpu_memoryread_w(paddr[1]) << 16; + result = (*func)(value, arg); + cpu_memorywrite_w(paddr[0], (UINT16)result); + cpu_memorywrite_w(paddr[1], (UINT16)(result >> 16)); + break; + + case 1: + value = cpu_memoryread(paddr[0]); + value += (UINT32)cpu_memoryread_w(paddr[1]) << 8; + value += (UINT32)cpu_memoryread(paddr[1] + 2) << 24; + result = (*func)(value, arg); + cpu_memorywrite(paddr[0], (UINT8)result); + cpu_memorywrite_w(paddr[1], (UINT16)(result >> 8)); + cpu_memorywrite(paddr[1] + 2, (UINT8)(result >> 24)); + break; + + default: + ia32_panic("cpu_memory_access_la_RMW_d(): out of range (remain = %d)\n", remain); + value = 0; /* compiler happy */ + break; } + } + return value; +} - r = (remain > length) ? length : remain; - if (!(crw & CPU_PAGE_WRITE)) { - cpu_memoryread_region(paddr, data, r); - } else { - cpu_memorywrite_region(paddr, data, r); +UINT8 MEMCALL +cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) +{ + UINT32 addr; + + addr = paging(laddr, ucrw); + return cpu_memoryread(addr); +} + +UINT16 MEMCALL +cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) +{ + UINT32 addr, addr2; + UINT16 value; + + addr = paging(laddr, ucrw); + if ((laddr + 1) & 0x00000fff) { + return cpu_memoryread_w(addr); + } else { + addr2 = paging(laddr + 1, ucrw); + value = cpu_memoryread_b(addr); + value += (UINT16)cpu_memoryread_b(addr2) << 8; + return value; + } +} + +UINT32 MEMCALL +cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) +{ + UINT32 addr, addr2; + UINT32 value; + UINT remain; + + addr = paging(laddr, ucrw); + remain = 0x1000 - (laddr & 0x00000fff); + if (remain >= 4) { + return cpu_memoryread_d(addr); + } else { + addr2 = paging(laddr + remain, ucrw); + switch (remain) { + case 3: + value = cpu_memoryread(addr); + value += (UINT32)cpu_memoryread_w(addr + 1) << 8; + value += (UINT32)cpu_memoryread(addr2) << 24; + break; + + case 2: + value = cpu_memoryread_w(addr); + value += (UINT32)cpu_memoryread_w(addr2) << 16; + break; + + case 1: + value = cpu_memoryread(addr); + value += (UINT32)cpu_memoryread(addr2) << 8; + value += (UINT32)cpu_memoryread_w(addr2 + 1) << 16; + break; + + default: + ia32_panic("cpu_linear_memory_read_d(): out of range (remain = %d)\n", remain); + value = 0; /* compiler happy */ + break; } + return value; + } +} - length -= r; - if (length == 0) +void MEMCALL +cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) +{ + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|user_mode; + UINT32 addr; + + addr = paging(laddr, ucrw); + cpu_memorywrite(addr, value); +} + +void MEMCALL +cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) +{ + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|user_mode; + UINT32 addr, addr2; + + addr = paging(laddr, ucrw); + if ((laddr + 1) & 0x00000fff) { + cpu_memorywrite_w(addr, value); + } else { + addr2 = paging(laddr + 1, ucrw); + cpu_memorywrite(addr, (UINT8)value); + cpu_memorywrite(addr2, (UINT8)(value >> 8)); + } +} + +void MEMCALL +cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) +{ + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|user_mode; + UINT32 addr, addr2; + UINT remain; + + addr = paging(laddr, ucrw); + remain = 0x1000 - (laddr & 0x00000fff); + if (remain >= 4) { + cpu_memorywrite_d(addr, value); + } else { + addr2 = paging(laddr + remain, ucrw); + switch (remain) { + case 3: + cpu_memorywrite(addr, (UINT8)value); + cpu_memorywrite_w(addr + 1, (UINT16)(value >> 8)); + cpu_memorywrite(addr2, (UINT8)(value >> 24)); break; - data += r; - laddr += r; - remain -= r; - if (remain <= 0) { - /* next page */ - remain += 0x1000; + case 2: + cpu_memorywrite_w(addr, (UINT16)value); + cpu_memorywrite_w(addr2, (UINT16)(value >> 16)); + break; + + case 1: + cpu_memorywrite(addr, (UINT8)value); + cpu_memorywrite(addr2, (UINT8)(value >> 8)); + cpu_memorywrite_w(addr2 + 1, (UINT16)(value >> 16)); + break; } } } +#else /* !IA32_PAGING_EACHSIZE */ + UINT32 MEMCALL -cpu_memory_access_la_RMW(UINT32 laddr, UINT length, const int user_mode, UINT32 (*func)(UINT32, void *), void *arg) +cpu_memory_access_la_RMW(UINT32 laddr, UINT length, UINT32 (*func)(UINT32, void *), void *arg) { - const int crw = (CPU_PAGE_WRITE|CPU_PAGE_DATA); + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|CPU_STAT_USER_MODE; UINT32 result, value; UINT32 paddr[2]; UINT remain; - paddr[0] = paging(laddr, crw, user_mode); + paddr[0] = paging(laddr, ucrw); remain = 0x1000 - (laddr & 0x00000fff); if (remain >= length) { /* fast mode */ @@ -270,7 +451,7 @@ cpu_memory_access_la_RMW(UINT32 laddr, U } /* slow mode */ - paddr[1] = paging(laddr + remain, crw, user_mode); + paddr[1] = paging(laddr + remain, ucrw); switch (remain) { case 3: value = cpu_memoryread(paddr[0]); @@ -279,7 +460,7 @@ cpu_memory_access_la_RMW(UINT32 laddr, U result = (*func)(value, arg); cpu_memorywrite(paddr[0], (UINT8)result); cpu_memorywrite_w(paddr[0] + 1, (UINT16)(result >> 8)); - cpu_memorywrite(paddr[1], (BYTE)(result >> 24)); + cpu_memorywrite(paddr[1], (UINT8)(result >> 24)); break; case 2: @@ -313,13 +494,13 @@ cpu_memory_access_la_RMW(UINT32 laddr, U } UINT32 MEMCALL -cpu_linear_memory_read(UINT32 laddr, UINT length, const int crw, const int user_mode) +cpu_linear_memory_read(UINT32 laddr, UINT length, const int ucrw) { UINT32 value; UINT32 paddr[2]; UINT remain; - paddr[0] = paging(laddr, crw, user_mode); + paddr[0] = paging(laddr, ucrw); remain = 0x1000 - (laddr & 0x00000fff); if (remain >= length) { /* fast mode */ @@ -345,7 +526,7 @@ cpu_linear_memory_read(UINT32 laddr, UIN } /* slow mode */ - paddr[1] = paging(laddr + remain, crw, user_mode); + paddr[1] = paging(laddr + remain, ucrw); switch (remain) { case 3: value = cpu_memoryread(paddr[0]); @@ -377,11 +558,11 @@ cpu_linear_memory_read(UINT32 laddr, UIN void MEMCALL cpu_linear_memory_write(UINT32 laddr, UINT32 value, UINT length, const int user_mode) { - const int crw = (CPU_PAGE_WRITE|CPU_PAGE_DATA); + const int ucrw = CPU_PAGE_WRITE|CPU_PAGE_DATA|user_mode; UINT32 paddr[2]; UINT remain; - paddr[0] = paging(laddr, crw, user_mode); + paddr[0] = paging(laddr, ucrw); remain = 0x1000 - (laddr & 0x00000fff); if (remain >= length) { /* fast mode */ @@ -406,12 +587,12 @@ cpu_linear_memory_write(UINT32 laddr, UI } /* slow mode */ - paddr[1] = paging(laddr + remain, crw, user_mode); + paddr[1] = paging(laddr + remain, ucrw); switch (remain) { case 3: cpu_memorywrite(paddr[0], (UINT8)value); cpu_memorywrite_w(paddr[0] + 1, (UINT16)(value >> 8)); - cpu_memorywrite(paddr[1], (BYTE)(value >> 24)); + cpu_memorywrite(paddr[1], (UINT8)(value >> 24)); break; case 2: @@ -432,17 +613,57 @@ cpu_linear_memory_write(UINT32 laddr, UI break; } } +#endif /* IA32_PAGING_EACHSIZE */ void MEMCALL -paging_check(UINT32 laddr, UINT length, const int crw, const int user_mode) +cpu_memory_access_la_region(UINT32 laddr, UINT length, const int ucrw, BYTE *data) { UINT32 paddr; UINT remain; /* page remain */ UINT r; + if (length == 0) + return; + remain = 0x1000 - (laddr & 0x00000fff); for (;;) { - paddr = paging(laddr, crw, user_mode); + if (!CPU_STAT_PAGING) { + paddr = laddr; + } else { + paddr = paging(laddr, ucrw); + } + + r = (remain > length) ? length : remain; + if (!(ucrw & CPU_PAGE_WRITE)) { + cpu_memoryread_region(paddr, data, r); + } else { + cpu_memorywrite_region(paddr, data, r); + } + + length -= r; + if (length == 0) + break; + + data += r; + laddr += r; + remain -= r; + if (remain <= 0) { + /* next page */ + remain += 0x1000; + } + } +} + +void MEMCALL +paging_check(UINT32 laddr, UINT length, const int ucrw) +{ + UINT32 paddr; + UINT remain; /* page remain */ + UINT r; + + remain = 0x1000 - (laddr & 0x00000fff); + for (;;) { + paddr = paging(laddr, ucrw); r = (remain > length) ? length : remain; @@ -460,7 +681,7 @@ paging_check(UINT32 laddr, UINT length, } static UINT32 -paging(const UINT32 laddr, const int crw, const int user_mode) +paging(const UINT32 laddr, const int ucrw) { UINT32 paddr; /* physical address */ UINT32 pde_addr; /* page directory entry address */ @@ -506,9 +727,9 @@ paging(const UINT32 laddr, const int crw /* make physical address */ paddr = (pte & CPU_PTE_BASEADDR_MASK) + (laddr & 0x00000fff); - bit = crw & CPU_PAGE_WRITE; + bit = ucrw & CPU_PAGE_WRITE; bit |= (pde & pte & (CPU_PTE_WRITABLE|CPU_PTE_USER_MODE)); - bit |= (user_mode << 3); + bit |= ucrw & CPU_PAGE_USER_MODE; bit |= CPU_STAT_WP; #if !defined(USE_PAGE_ACCESS_TABLE) @@ -525,29 +746,30 @@ paging(const UINT32 laddr, const int crw goto pf_exception; } - if ((crw & CPU_PAGE_WRITE) && !(pte & CPU_PTE_DIRTY)) { + if ((ucrw & CPU_PAGE_WRITE) && !(pte & CPU_PTE_DIRTY)) { pte |= CPU_PTE_DIRTY; cpu_memorywrite_d(pte_addr, pte); } #if defined(IA32_SUPPORT_TLB) - tlb_update(laddr, pte, crw); + tlb_update(laddr, pte, ucrw); #endif /* IA32_SUPPORT_TLB */ return paddr; pf_exception: CPU_CR2 = laddr; - err |= ((crw & CPU_PAGE_WRITE) << 1) | (user_mode << 2); + err |= (ucrw & CPU_PAGE_WRITE) << 1; + err |= (ucrw & CPU_PAGE_USER_MODE) >> 1; EXCEPTION(PF_EXCEPTION, err); return 0; /* compiler happy */ } + #if defined(IA32_SUPPORT_TLB) /* * TLB */ - #if defined(IA32_PROFILE_TLB) /* profiling */ typedef struct {