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Diff for /np2/i386c/ia32/paging.h between versions 1.14 and 1.17

version 1.14, 2004/03/23 19:32:37 version 1.17, 2004/03/25 15:08:32
Line 128  extern "C" { Line 128  extern "C" {
 /*  /*
  * linear address memory access function   * linear address memory access function
  */   */
 void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int crw, const int user_mode, BYTE *data);  void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int ucrw, BYTE *data);
 UINT32 MEMCALL cpu_memory_access_la_RMW(UINT32 laddr, UINT length, const int user_mode, UINT32 (*func)(UINT32, void *), void *arg);  void MEMCALL paging_check(UINT32 laddr, UINT length, const int ucrw);
   
 #if defined(IA32_PAGING_EACHSIZE)  
 UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int crw, const int user_mode);  
 UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int crw, const int user_mode);  
 UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int crw, const int user_mode);  
 void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode);  
 void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode);  
 void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode);  
 #else   // IA32_PAGING_EACHSIZE  
 UINT32 MEMCALL cpu_linear_memory_read(UINT32 address, UINT length, const int crw, const int user_mode);  
 void MEMCALL cpu_linear_memory_write(UINT32 address, UINT32 value, UINT length, const int user_mode);  
 #endif  // IA32_PAGING_EACHSIZE  
 void MEMCALL paging_check(UINT32 laddr, UINT length, const int crw, const int user_mode);  
   
 /* crw */  /* crw */
 #define CPU_PAGE_READ           (0 << 0)  #define CPU_PAGE_READ           (0 << 0)
 #define CPU_PAGE_WRITE          (1 << 0)  #define CPU_PAGE_WRITE          (1 << 0)
 #define CPU_PAGE_CODE           (1 << 1)  #define CPU_PAGE_CODE           (1 << 1)
 #define CPU_PAGE_DATA           (1 << 2)  #define CPU_PAGE_DATA           (1 << 2)
   #define CPU_PAGE_USER_MODE      (1 << 3)        /* == CPU_MODE_USER */
 #define CPU_PAGE_READ_CODE      (CPU_PAGE_READ|CPU_PAGE_CODE)  #define CPU_PAGE_READ_CODE      (CPU_PAGE_READ|CPU_PAGE_CODE)
 #define CPU_PAGE_READ_DATA      (CPU_PAGE_READ|CPU_PAGE_DATA)  #define CPU_PAGE_READ_DATA      (CPU_PAGE_READ|CPU_PAGE_DATA)
 #define CPU_PAGE_WRITE_DATA     (CPU_PAGE_WRITE|CPU_PAGE_DATA)  #define CPU_PAGE_WRITE_DATA     (CPU_PAGE_WRITE|CPU_PAGE_DATA)
   
 #if defined(IA32_PAGING_EACHSIZE)  #if defined(IA32_PAGING_EACHSIZE)
   
   UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;
   UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;
   UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;
   UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;
   UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;
   UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;
   void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) GCC_ATTR_REGPARM;
   void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) GCC_ATTR_REGPARM;
   void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) GCC_ATTR_REGPARM;
   
 #define cpu_lmemoryread(a,pl) \  #define cpu_lmemoryread(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread(a) : cpu_linear_memory_read_b(a,CPU_PAGE_READ_DATA,pl)           cpu_memoryread(a) : \
            cpu_linear_memory_read_b(a,CPU_PAGE_READ_DATA | (pl))
 #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl)  #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl)
 #define cpu_lmemoryread_w(a,pl) \  #define cpu_lmemoryread_w(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_w(a) : cpu_linear_memory_read_w(a,CPU_PAGE_READ_DATA,pl)           cpu_memoryread_w(a) : \
            cpu_linear_memory_read_w(a,CPU_PAGE_READ_DATA | (pl))
 #define cpu_lmemoryread_d(a,pl) \  #define cpu_lmemoryread_d(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_d(a) : cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA,pl)           cpu_memoryread_d(a) : \
            cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA | (pl))
   
 #define cpu_lmemorywrite(a,v,pl) \  #define cpu_lmemorywrite(a,v,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
Line 175  void MEMCALL paging_check(UINT32 laddr,  Line 177  void MEMCALL paging_check(UINT32 laddr, 
 #define cpu_lmemorywrite_d(a,v,pl) \  #define cpu_lmemorywrite_d(a,v,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl)           cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl)
 #else   // IA32_PAGING_EACHSIZE  
   /* code */
   #define cpu_lcmemoryread(a) \
           (!CPU_STAT_PAGING) ? \
            cpu_memoryread(a) : \
            cpu_linear_memory_read_b(a,CPU_PAGE_READ_CODE|CPU_STAT_USER_MODE)
   #define cpu_lcmemoryread_w(a) \
           (!CPU_STAT_PAGING) ? \
            cpu_memoryread_w(a) : \
            cpu_linear_memory_read_w(a,CPU_PAGE_READ_CODE|CPU_STAT_USER_MODE)
   #define cpu_lcmemoryread_d(a) \
           (!CPU_STAT_PAGING) ? \
            cpu_memoryread_d(a) : \
            cpu_linear_memory_read_d(a,CPU_PAGE_READ_CODE|CPU_STAT_USER_MODE)
   
   #else   /* !IA32_PAGING_EACHSIZE */
   
   UINT32 MEMCALL cpu_memory_access_la_RMW(UINT32 laddr, UINT length, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;
   #define cpu_memory_access_la_RMW_b(l,f,a) cpu_memory_access_la_RMW(l,1,f,a)
   #define cpu_memory_access_la_RMW_w(l,f,a) cpu_memory_access_la_RMW(l,2,f,a)
   #define cpu_memory_access_la_RMW_d(l,f,a) cpu_memory_access_la_RMW(l,4,f,a)
   
   UINT32 MEMCALL cpu_linear_memory_read(UINT32 address, UINT length, const int ucrw) GCC_ATTR_REGPARM;
   #define cpu_linear_memory_read_b(a,pl) cpu_linear_memory_read(a,1,pl)
   #define cpu_linear_memory_read_w(a,pl) cpu_linear_memory_read(a,2,pl)
   #define cpu_linear_memory_read_d(a,pl) cpu_linear_memory_read(a,4,pl)
   
   void MEMCALL cpu_linear_memory_write(UINT32 address, UINT32 value, UINT length, const int user_mode) GCC_ATTR_REGPARM;
   #define cpu_linear_memory_write_b(a,v,pl) cpu_linear_memory_write(a,v,1,pl)
   #define cpu_linear_memory_write_w(a,v,pl) cpu_linear_memory_write(a,v,2,pl)
   #define cpu_linear_memory_write_d(a,v,pl) cpu_linear_memory_write(a,v,4,pl)
   
 #define cpu_lmemoryread(a,pl) \  #define cpu_lmemoryread(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread(a) : \           cpu_memoryread(a) : \
          (UINT8)cpu_linear_memory_read(a,1,CPU_PAGE_READ_DATA,pl)           (UINT8)cpu_linear_memory_read(a,1,CPU_PAGE_READ_DATA | (pl))
 #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl)  #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl)
 #define cpu_lmemoryread_w(a,pl) \  #define cpu_lmemoryread_w(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_w(a) : \           cpu_memoryread_w(a) : \
          (UINT16)cpu_linear_memory_read(a,2,CPU_PAGE_READ_DATA,pl)           (UINT16)cpu_linear_memory_read(a,2,CPU_PAGE_READ_DATA | (pl))
 #define cpu_lmemoryread_d(a,pl) \  #define cpu_lmemoryread_d(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_d(a) : \           cpu_memoryread_d(a) : \
          cpu_linear_memory_read(a,4,CPU_PAGE_READ_DATA,pl)           cpu_linear_memory_read(a,4,CPU_PAGE_READ_DATA | (pl))
   
 #define cpu_lmemorywrite(a,v,pl) \  #define cpu_lmemorywrite(a,v,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
Line 203  void MEMCALL paging_check(UINT32 laddr,  Line 236  void MEMCALL paging_check(UINT32 laddr, 
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memorywrite_d(a,v) : \           cpu_memorywrite_d(a,v) : \
          cpu_linear_memory_write(a,v,4,pl)           cpu_linear_memory_write(a,v,4,pl)
 #endif  // IA32_PAGING_EACHSIZE  
   
 /*  /* code */
  * code segment  
  */  
 #if defined(IA32_PAGING_EACHSIZE)  
 #define cpu_lcmemoryread(a) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memoryread(a) : \  
          cpu_linear_memory_read_b(a,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE)  
 #define cpu_lcmemoryread_w(a) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memoryread_w(a) : \  
          cpu_linear_memory_read_w(a,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE)  
 #define cpu_lcmemoryread_d(a) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memoryread_d(a) : \  
          cpu_linear_memory_read_d(a,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE)  
 #else   // IA32_PAGING_EACHSIZE  
 #define cpu_lcmemoryread(a) \  #define cpu_lcmemoryread(a) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread(a) : \           cpu_memoryread(a) : \
          (UINT8)cpu_linear_memory_read(a,1,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE)           (UINT8)cpu_linear_memory_read(a,1,CPU_PAGE_READ_CODE|CPU_STAT_USER_MODE)
 #define cpu_lcmemoryread_w(a) \  #define cpu_lcmemoryread_w(a) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_w(a) : \           cpu_memoryread_w(a) : \
          (UINT16)cpu_linear_memory_read(a,2,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE)           (UINT16)cpu_linear_memory_read(a,2,CPU_PAGE_READ_CODE|CPU_STAT_USER_MODE)
 #define cpu_lcmemoryread_d(a) \  #define cpu_lcmemoryread_d(a) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_d(a) : \           cpu_memoryread_d(a) : \
          cpu_linear_memory_read(a,4,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE)           cpu_linear_memory_read(a,4,CPU_PAGE_READ_CODE|CPU_STAT_USER_MODE)
 #endif  // IA32_PAGING_EACHSIZE  
   #endif  /* IA32_PAGING_EACHSIZE */
   
 /*  /*
  * linear address memory access with superviser mode   * linear address memory access with superviser mode
Removed from v.1.14  
changed lines
  Added in v.1.17

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