Diff for /np2/i386c/ia32/paging.h between versions 1.18 and 1.23

version 1.18, 2004/06/15 13:50:13 version 1.23, 2011/01/15 17:17:23
Line 1 Line 1
 /*      $Id$    */  
   
 /*  /*
  * Copyright (c) 2003 NONAKA Kimihiro   * Copyright (c) 2003 NONAKA Kimihiro
  * All rights reserved.   * All rights reserved.
Line 12 Line 10
  * 2. Redistributions in binary form must reproduce the above copyright   * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the   *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.   *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products  
  *    derived from this software without specific prior written permission.  
  *   *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES   * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 128  extern "C" { Line 124  extern "C" {
 /*  /*
  * linear address memory access function   * linear address memory access function
  */   */
 void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int ucrw, BYTE *data);  void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int ucrw, UINT8 *data);
 void MEMCALL paging_check(UINT32 laddr, UINT length, const int ucrw);  UINT32 MEMCALL laddr2paddr(const UINT32 laddr, const int ucrw);
   #define laddr_to_paddr(laddr, ucrw) \
           (!CPU_STAT_PAGING) ? (laddr) : (laddr2paddr((laddr), (ucrw)))
   
   
 /* ucrw */  /* ucrw */
 #define CPU_PAGE_WRITE          (1 << 0)  #define CPU_PAGE_WRITE          (1 << 0)
Line 140  void MEMCALL paging_check(UINT32 laddr,  Line 139  void MEMCALL paging_check(UINT32 laddr, 
 #define CPU_PAGE_READ_DATA      (CPU_PAGE_DATA)  #define CPU_PAGE_READ_DATA      (CPU_PAGE_DATA)
 #define CPU_PAGE_WRITE_DATA     (CPU_PAGE_WRITE|CPU_PAGE_DATA)  #define CPU_PAGE_WRITE_DATA     (CPU_PAGE_WRITE|CPU_PAGE_DATA)
   
 #if defined(IA32_PAGING_EACHSIZE)  UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg);
   UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg);
 UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;  UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg);
 UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;  UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw);
 UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;  UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw);
 UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;  UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw);
 UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;  UINT64 MEMCALL cpu_linear_memory_read_q(UINT32 laddr, const int ucrw);
 UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;  REG80 MEMCALL cpu_linear_memory_read_f(UINT32 laddr, const int ucrw);
 void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) GCC_ATTR_REGPARM;  void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode);
 void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) GCC_ATTR_REGPARM;  void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode);
 void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) GCC_ATTR_REGPARM;  void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode);
   void MEMCALL cpu_linear_memory_write_q(UINT32 laddr, UINT64 value, const int user_mode);
   void MEMCALL cpu_linear_memory_write_f(UINT32 laddr, const REG80 *value, const int user_mode);
   
 #define cpu_lmemoryread(a,pl) \  #define cpu_lmemoryread(a,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
Line 165  void MEMCALL cpu_linear_memory_write_d(U Line 166  void MEMCALL cpu_linear_memory_write_d(U
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_d(a) : \           cpu_memoryread_d(a) : \
          cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA | (pl))           cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA | (pl))
   #define cpu_lmemoryread_q(a,pl) \
           (!CPU_STAT_PAGING) ? \
            cpu_memoryread_q(a) : \
            cpu_linear_memory_read_q(a,CPU_PAGE_READ_DATA | (pl))
   
 #define cpu_lmemorywrite(a,v,pl) \  #define cpu_lmemorywrite(a,v,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
Line 176  void MEMCALL cpu_linear_memory_write_d(U Line 181  void MEMCALL cpu_linear_memory_write_d(U
 #define cpu_lmemorywrite_d(a,v,pl) \  #define cpu_lmemorywrite_d(a,v,pl) \
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl)           cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl)
   #define cpu_lmemorywrite_q(a,v,pl) \
 #else   /* !IA32_PAGING_EACHSIZE */  
   
 UINT32 MEMCALL cpu_memory_access_la_RMW(UINT32 laddr, UINT length, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM;  
 #define cpu_memory_access_la_RMW_b(l,f,a) cpu_memory_access_la_RMW(l,1,f,a)  
 #define cpu_memory_access_la_RMW_w(l,f,a) cpu_memory_access_la_RMW(l,2,f,a)  
 #define cpu_memory_access_la_RMW_d(l,f,a) cpu_memory_access_la_RMW(l,4,f,a)  
   
 UINT32 MEMCALL cpu_linear_memory_read(UINT32 address, UINT length, const int ucrw) GCC_ATTR_REGPARM;  
 #define cpu_linear_memory_read_b(a,pl) cpu_linear_memory_read(a,1,pl)  
 #define cpu_linear_memory_read_w(a,pl) cpu_linear_memory_read(a,2,pl)  
 #define cpu_linear_memory_read_d(a,pl) cpu_linear_memory_read(a,4,pl)  
   
 void MEMCALL cpu_linear_memory_write(UINT32 address, UINT32 value, UINT length, const int user_mode) GCC_ATTR_REGPARM;  
 #define cpu_linear_memory_write_b(a,v,pl) cpu_linear_memory_write(a,v,1,pl)  
 #define cpu_linear_memory_write_w(a,v,pl) cpu_linear_memory_write(a,v,2,pl)  
 #define cpu_linear_memory_write_d(a,v,pl) cpu_linear_memory_write(a,v,4,pl)  
   
 #define cpu_lmemoryread(a,pl) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memoryread(a) : \  
          (UINT8)cpu_linear_memory_read(a,1,CPU_PAGE_READ_DATA | (pl))  
 #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl)  
 #define cpu_lmemoryread_w(a,pl) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memoryread_w(a) : \  
          (UINT16)cpu_linear_memory_read(a,2,CPU_PAGE_READ_DATA | (pl))  
 #define cpu_lmemoryread_d(a,pl) \  
         (!CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
          cpu_memoryread_d(a) : \           cpu_memorywrite_q(a,v) : cpu_linear_memory_write_q(a,v,pl)
          cpu_linear_memory_read(a,4,CPU_PAGE_READ_DATA | (pl))  
   
 #define cpu_lmemorywrite(a,v,pl) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memorywrite(a,v) : \  
          cpu_linear_memory_write(a,v,1,pl)  
 #define cpu_lmemorywrite_b(a,v,pl) cpu_lmemorywrite(a,v,pl)  
 #define cpu_lmemorywrite_w(a,v,pl) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memorywrite_w(a,v) : \  
          cpu_linear_memory_write(a,v,2,pl)  
 #define cpu_lmemorywrite_d(a,v,pl) \  
         (!CPU_STAT_PAGING) ? \  
          cpu_memorywrite_d(a,v) : \  
          cpu_linear_memory_write(a,v,4,pl)  
   
 #endif  /* IA32_PAGING_EACHSIZE */  
   
 /*  /*
  * linear address memory access with superviser mode   * linear address memory access with superviser mode
Line 236  void MEMCALL cpu_linear_memory_write(UIN Line 197  void MEMCALL cpu_linear_memory_write(UIN
   
   
 /*  /*
  * CR3 (Page Directory Entry base physical address)  
  */  
 #define set_CR3(cr3) \  
 do { \  
         VERBOSE(("set_CR3: old = %08x, new = 0x%08x", CPU_CR3, (cr3) & CPU_CR3_MASK)); \  
         CPU_CR3 = (cr3) & CPU_CR3_MASK; \  
         CPU_STAT_PDE_BASE = CPU_CR3 & CPU_CR3_PD_MASK; \  
         tlb_flush(FALSE); \  
 } while (/*CONSTCOND*/ 0)  
   
   
 /*  
  * TLB function   * TLB function
  */   */
 typedef struct {  typedef struct {
Line 267  typedef struct { Line 216  typedef struct {
   
 #if defined(IA32_SUPPORT_TLB)  #if defined(IA32_SUPPORT_TLB)
 void tlb_init(void);  void tlb_init(void);
 void MEMCALL tlb_flush(BOOL allflush) GCC_ATTR_REGPARM;  void MEMCALL tlb_flush(BOOL allflush);
 void MEMCALL tlb_flush_page(UINT32 laddr) GCC_ATTR_REGPARM;  void MEMCALL tlb_flush_page(UINT32 laddr);
 TLB_ENTRY_T* MEMCALL tlb_lookup(const UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM;  TLB_ENTRY_T* MEMCALL tlb_lookup(const UINT32 laddr, const int ucrw);
 #else  #else
 #define tlb_init()  #define tlb_init()
 #define tlb_flush(allflush)     (void)(allflush)  #define tlb_flush(allflush)     (void)(allflush)

Removed from v.1.18  
changed lines
  Added in v.1.23


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