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| version 1.18, 2004/06/15 13:50:13 | version 1.20, 2005/03/12 12:32:54 |
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| Line 12 | Line 12 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 140 void MEMCALL paging_check(UINT32 laddr, | Line 138 void MEMCALL paging_check(UINT32 laddr, |
| #define CPU_PAGE_READ_DATA (CPU_PAGE_DATA) | #define CPU_PAGE_READ_DATA (CPU_PAGE_DATA) |
| #define CPU_PAGE_WRITE_DATA (CPU_PAGE_WRITE|CPU_PAGE_DATA) | #define CPU_PAGE_WRITE_DATA (CPU_PAGE_WRITE|CPU_PAGE_DATA) |
| #if defined(IA32_PAGING_EACHSIZE) | |
| UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; |
| UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; |
| UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; |
| UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; |
| UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; |
| UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; |
| UINT64 MEMCALL cpu_linear_memory_read_q(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| REG80 MEMCALL cpu_linear_memory_read_f(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) GCC_ATTR_REGPARM; | void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) GCC_ATTR_REGPARM; |
| void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) GCC_ATTR_REGPARM; | void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) GCC_ATTR_REGPARM; |
| void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) GCC_ATTR_REGPARM; | void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) GCC_ATTR_REGPARM; |
| void MEMCALL cpu_linear_memory_write_q(UINT32 laddr, UINT64 value, const int user_mode) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_f(UINT32 laddr, const REG80 *value, const int user_mode) GCC_ATTR_REGPARM; | |
| #define cpu_lmemoryread(a,pl) \ | #define cpu_lmemoryread(a,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| Line 165 void MEMCALL cpu_linear_memory_write_d(U | Line 165 void MEMCALL cpu_linear_memory_write_d(U |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memoryread_d(a) : \ | cpu_memoryread_d(a) : \ |
| cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA | (pl)) | cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA | (pl)) |
| #define cpu_lmemoryread_q(a,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memoryread_q(a) : \ | |
| cpu_linear_memory_read_q(a,CPU_PAGE_READ_DATA | (pl)) | |
| #define cpu_lmemorywrite(a,v,pl) \ | #define cpu_lmemorywrite(a,v,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| Line 176 void MEMCALL cpu_linear_memory_write_d(U | Line 180 void MEMCALL cpu_linear_memory_write_d(U |
| #define cpu_lmemorywrite_d(a,v,pl) \ | #define cpu_lmemorywrite_d(a,v,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl) | cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl) |
| #define cpu_lmemorywrite_q(a,v,pl) \ | |
| #else /* !IA32_PAGING_EACHSIZE */ | |
| UINT32 MEMCALL cpu_memory_access_la_RMW(UINT32 laddr, UINT length, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | |
| #define cpu_memory_access_la_RMW_b(l,f,a) cpu_memory_access_la_RMW(l,1,f,a) | |
| #define cpu_memory_access_la_RMW_w(l,f,a) cpu_memory_access_la_RMW(l,2,f,a) | |
| #define cpu_memory_access_la_RMW_d(l,f,a) cpu_memory_access_la_RMW(l,4,f,a) | |
| UINT32 MEMCALL cpu_linear_memory_read(UINT32 address, UINT length, const int ucrw) GCC_ATTR_REGPARM; | |
| #define cpu_linear_memory_read_b(a,pl) cpu_linear_memory_read(a,1,pl) | |
| #define cpu_linear_memory_read_w(a,pl) cpu_linear_memory_read(a,2,pl) | |
| #define cpu_linear_memory_read_d(a,pl) cpu_linear_memory_read(a,4,pl) | |
| void MEMCALL cpu_linear_memory_write(UINT32 address, UINT32 value, UINT length, const int user_mode) GCC_ATTR_REGPARM; | |
| #define cpu_linear_memory_write_b(a,v,pl) cpu_linear_memory_write(a,v,1,pl) | |
| #define cpu_linear_memory_write_w(a,v,pl) cpu_linear_memory_write(a,v,2,pl) | |
| #define cpu_linear_memory_write_d(a,v,pl) cpu_linear_memory_write(a,v,4,pl) | |
| #define cpu_lmemoryread(a,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memoryread(a) : \ | cpu_memorywrite_q(a,v) : cpu_linear_memory_write_q(a,v,pl) |
| (UINT8)cpu_linear_memory_read(a,1,CPU_PAGE_READ_DATA | (pl)) | |
| #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl) | |
| #define cpu_lmemoryread_w(a,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memoryread_w(a) : \ | |
| (UINT16)cpu_linear_memory_read(a,2,CPU_PAGE_READ_DATA | (pl)) | |
| #define cpu_lmemoryread_d(a,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memoryread_d(a) : \ | |
| cpu_linear_memory_read(a,4,CPU_PAGE_READ_DATA | (pl)) | |
| #define cpu_lmemorywrite(a,v,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memorywrite(a,v) : \ | |
| cpu_linear_memory_write(a,v,1,pl) | |
| #define cpu_lmemorywrite_b(a,v,pl) cpu_lmemorywrite(a,v,pl) | |
| #define cpu_lmemorywrite_w(a,v,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memorywrite_w(a,v) : \ | |
| cpu_linear_memory_write(a,v,2,pl) | |
| #define cpu_lmemorywrite_d(a,v,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memorywrite_d(a,v) : \ | |
| cpu_linear_memory_write(a,v,4,pl) | |
| #endif /* IA32_PAGING_EACHSIZE */ | |
| /* | /* |
| * linear address memory access with superviser mode | * linear address memory access with superviser mode |