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| version 1.9, 2004/02/09 16:13:13 | version 1.20, 2005/03/12 12:32:54 |
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| Line 12 | Line 12 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 128 extern "C" { | Line 126 extern "C" { |
| /* | /* |
| * linear address memory access function | * linear address memory access function |
| */ | */ |
| DWORD MEMCALL cpu_linear_memory_read(DWORD address, DWORD length, int code, int user_mode); | void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int ucrw, BYTE *data); |
| void MEMCALL cpu_linear_memory_write(DWORD address, DWORD value, DWORD length, int user_mode); | void MEMCALL paging_check(UINT32 laddr, UINT length, const int ucrw); |
| void MEMCALL paging_check(DWORD laddr, DWORD length, int crw, int user_mode); | |
| /* crw */ | /* ucrw */ |
| #define CPU_PAGE_READ (0 << 0) | |
| #define CPU_PAGE_WRITE (1 << 0) | #define CPU_PAGE_WRITE (1 << 0) |
| #define CPU_PAGE_CODE (1 << 1) | #define CPU_PAGE_CODE (1 << 1) |
| #define CPU_PAGE_DATA (1 << 2) | #define CPU_PAGE_DATA (1 << 2) |
| #define CPU_PAGE_READ_CODE (CPU_PAGE_READ|CPU_PAGE_CODE) | #define CPU_PAGE_USER_MODE (1 << 3) /* == CPU_MODE_USER */ |
| #define CPU_PAGE_READ_DATA (CPU_PAGE_READ|CPU_PAGE_DATA) | #define CPU_PAGE_READ_CODE (CPU_PAGE_CODE) |
| #define CPU_PAGE_READ_DATA (CPU_PAGE_DATA) | |
| #define CPU_PAGE_WRITE_DATA (CPU_PAGE_WRITE|CPU_PAGE_DATA) | #define CPU_PAGE_WRITE_DATA (CPU_PAGE_WRITE|CPU_PAGE_DATA) |
| UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | |
| UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | |
| UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; | |
| UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| UINT64 MEMCALL cpu_linear_memory_read_q(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| REG80 MEMCALL cpu_linear_memory_read_f(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_q(UINT32 laddr, UINT64 value, const int user_mode) GCC_ATTR_REGPARM; | |
| void MEMCALL cpu_linear_memory_write_f(UINT32 laddr, const REG80 *value, const int user_mode) GCC_ATTR_REGPARM; | |
| #define cpu_lmemoryread(a,pl) \ | #define cpu_lmemoryread(a,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memoryread(a) : \ | cpu_memoryread(a) : \ |
| (BYTE)cpu_linear_memory_read(a,1,CPU_PAGE_READ_DATA,pl) | cpu_linear_memory_read_b(a,CPU_PAGE_READ_DATA | (pl)) |
| #define cpu_lmemoryread_b(a,pl) cpu_lmemoryread(a,pl) | |
| #define cpu_lmemoryread_w(a,pl) \ | #define cpu_lmemoryread_w(a,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memoryread_w(a) : \ | cpu_memoryread_w(a) : \ |
| (WORD)cpu_linear_memory_read(a,2,CPU_PAGE_READ_DATA,pl) | cpu_linear_memory_read_w(a,CPU_PAGE_READ_DATA | (pl)) |
| #define cpu_lmemoryread_d(a,pl) \ | #define cpu_lmemoryread_d(a,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memoryread_d(a) : \ | cpu_memoryread_d(a) : \ |
| cpu_linear_memory_read(a,4,CPU_PAGE_READ_DATA,pl) | cpu_linear_memory_read_d(a,CPU_PAGE_READ_DATA | (pl)) |
| #define cpu_lmemoryread_q(a,pl) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memoryread_q(a) : \ | |
| cpu_linear_memory_read_q(a,CPU_PAGE_READ_DATA | (pl)) | |
| #define cpu_lmemorywrite(a,v,pl) \ | #define cpu_lmemorywrite(a,v,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memorywrite(a,v) : \ | cpu_memorywrite(a,v) : cpu_linear_memory_write_b(a,v,pl) |
| cpu_linear_memory_write(a,v,1,pl) | #define cpu_lmemorywrite_b(a,v,pl) cpu_lmemorywrite(a,v,pl) |
| #define cpu_lmemorywrite_w(a,v,pl) \ | #define cpu_lmemorywrite_w(a,v,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memorywrite_w(a,v) : \ | cpu_memorywrite_w(a,v) : cpu_linear_memory_write_w(a,v,pl) |
| cpu_linear_memory_write(a,v,2,pl) | |
| #define cpu_lmemorywrite_d(a,v,pl) \ | #define cpu_lmemorywrite_d(a,v,pl) \ |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memorywrite_d(a,v) : \ | cpu_memorywrite_d(a,v) : cpu_linear_memory_write_d(a,v,pl) |
| cpu_linear_memory_write(a,v,4,pl) | #define cpu_lmemorywrite_q(a,v,pl) \ |
| /* | |
| * code segment | |
| */ | |
| #define cpu_lcmemoryread(a) \ | |
| (!CPU_STAT_PAGING) ? \ | (!CPU_STAT_PAGING) ? \ |
| cpu_memoryread(a) : \ | cpu_memorywrite_q(a,v) : cpu_linear_memory_write_q(a,v,pl) |
| (BYTE)cpu_linear_memory_read(a,1,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE) | |
| #define cpu_lcmemoryread_w(a) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memoryread_w(a) : \ | |
| (WORD)cpu_linear_memory_read(a,2,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE) | |
| #define cpu_lcmemoryread_d(a) \ | |
| (!CPU_STAT_PAGING) ? \ | |
| cpu_memoryread_d(a) : \ | |
| cpu_linear_memory_read(a,4,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE) | |
| /* | /* |
| * linear address memory access with superviser mode | * linear address memory access with superviser mode |
| Line 210 do { \ | Line 210 do { \ |
| /* | /* |
| * TLB function | * TLB function |
| */ | */ |
| typedef struct { | |
| UINT32 tag; /* linear address */ | |
| #define TLB_ENTRY_TAG_VALID (1 << 0) | |
| /* pde & pte & CPU_PTE_WRITABLE (1 << 1) */ | |
| /* pde & pte & CPU_PTE_USER_MODE (1 << 2) */ | |
| #define TLB_ENTRY_TAG_DIRTY CPU_PTE_DIRTY /* (1 << 6) */ | |
| #define TLB_ENTRY_TAG_GLOBAL CPU_PTE_GLOBAL_PAGE /* (1 << 8) */ | |
| #define TLB_ENTRY_TAG_MAX_SHIFT 12 | |
| UINT32 paddr; /* physical address */ | |
| UINT8 *memp; /* shortcut for pre-fetch queue */ | |
| } TLB_ENTRY_T; | |
| #if defined(IA32_SUPPORT_TLB) | #if defined(IA32_SUPPORT_TLB) |
| void tlb_init(); | void tlb_init(void); |
| void tlb_flush(BOOL allflush); | void MEMCALL tlb_flush(BOOL allflush) GCC_ATTR_REGPARM; |
| void tlb_flush_page(DWORD vaddr); | void MEMCALL tlb_flush_page(UINT32 laddr) GCC_ATTR_REGPARM; |
| TLB_ENTRY_T* MEMCALL tlb_lookup(const UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; | |
| #else | #else |
| #define tlb_init() | #define tlb_init() |
| #define tlb_flush(allflush) (void)allflush | #define tlb_flush(allflush) (void)(allflush) |
| #define tlb_flush_page(vaddr) (void)vaddr | #define tlb_flush_page(la) (void)(la) |
| #define tlb_lookup(la, ucrw) NULL | |
| #endif | #endif |
| #ifdef __cplusplus | #ifdef __cplusplus |