[BACK]Return to paging.h CVS log [TXT] [DIR] Up to [RetroPC.NET] / np2 / i386c / ia32

Diff for /np2/i386c/ia32/paging.h between versions 1.4 and 1.7

version 1.4, 2004/01/23 14:33:26 version 1.7, 2004/02/04 13:24:35
Line 121  extern "C" { Line 121  extern "C" {
 #define CPU_PTE_WRITABLE        (1 << 1)  #define CPU_PTE_WRITABLE        (1 << 1)
 #define CPU_PTE_PRESENT         (1 << 0)  #define CPU_PTE_PRESENT         (1 << 0)
   
   
 /* enter/leave paging mode */  
 void FASTCALL change_pg(int onoff);  
   
 /* paging check */  
 void MEMCALL paging_check(DWORD laddr, DWORD length, int rw);  
   
 /* paging_check(): rw */  /* paging_check(): rw */
 #define CPU_PAGING_PAGE_READ    (0 << 0)  #define CPU_PAGE_READ           (0 << 0)
 #define CPU_PAGING_PAGE_WRITE   (1 << 0)  #define CPU_PAGE_WRITE          (1 << 0)
   #define CPU_PAGE_CODE           (1 << 1)
   #define CPU_PAGE_DATA           (1 << 2)
   #define CPU_PAGE_READ_CODE      (CPU_PAGE_READ|CPU_PAGE_CODE)
   #define CPU_PAGE_READ_DATA      (CPU_PAGE_READ|CPU_PAGE_DATA)
   #define CPU_PAGE_WRITE_DATA     (CPU_PAGE_WRITE|CPU_PAGE_DATA)
   
   
 /*  /*
  * linear address function   * linear address function
  */   */
 DWORD MEMCALL cpu_linear_memory_read(DWORD address, DWORD length, int code);  DWORD MEMCALL cpu_linear_memory_read(DWORD address, DWORD length, int code, int user_mode);
 void MEMCALL cpu_linear_memory_write(DWORD address, DWORD length, DWORD value);  void MEMCALL cpu_linear_memory_write(DWORD address, DWORD value, DWORD length, int user_mode);
   void MEMCALL paging_check(DWORD laddr, DWORD length, int crw, int user_mode);
 /* cpu_linear_memory_read(): code */  
 #define CPU_PAGING_PAGE_CODE    (1 << 1)  #define cpu_lmemoryread(a,pl) \
 #define CPU_PAGING_PAGE_DATA    (1 << 2)          (!CPU_STAT_PAGING) ? \
            cpu_memoryread(a) : \
 #define cpu_lmemoryread(a) \           (BYTE)cpu_linear_memory_read(a,1,CPU_PAGE_READ_DATA,pl)
         (CPU_STAT_PAGING) ? \  #define cpu_lmemoryread_w(a,pl) \
                 (BYTE)cpu_linear_memory_read(a, 1, FALSE) : \          (!CPU_STAT_PAGING) ? \
                 cpu_memoryread(a);           cpu_memoryread_w(a) : \
 #define cpu_lmemoryread_w(a) \           (WORD)cpu_linear_memory_read(a,2,CPU_PAGE_READ_DATA,pl)
         (CPU_STAT_PAGING) ? \  #define cpu_lmemoryread_d(a,pl) \
                 (WORD)cpu_linear_memory_read(a, 2, FALSE) : \          (!CPU_STAT_PAGING) ? \
                 cpu_memoryread_w(a);           cpu_memoryread_d(a) : \
 #define cpu_lmemoryread_d(a) \           cpu_linear_memory_read(a,4,CPU_PAGE_READ_DATA,pl)
         (CPU_STAT_PAGING) ? \  
                 cpu_linear_memory_read(a, 4, FALSE) : \  #define cpu_lmemorywrite(a,v,pl) \
                 cpu_memoryread_d(a);          (!CPU_STAT_PAGING) ? \
            cpu_memorywrite(a,v) : \
 #define cpu_lmemorywrite(a,v) \           cpu_linear_memory_write(a,v,1,pl)
         (CPU_STAT_PAGING) ? \  #define cpu_lmemorywrite_w(a,v,pl) \
                 cpu_linear_memory_write(a, 1, v) : \          (!CPU_STAT_PAGING) ? \
                 cpu_memorywrite(a,v);           cpu_memorywrite_w(a,v) : \
 #define cpu_lmemorywrite_w(a,v) \           cpu_linear_memory_write(a,v,2,pl)
         (CPU_STAT_PAGING) ? \  #define cpu_lmemorywrite_d(a,v,pl) \
                 cpu_linear_memory_write(a, 2, v) : \          (!CPU_STAT_PAGING) ? \
                 cpu_memorywrite_w(a,v);           cpu_memorywrite_d(a,v) : \
 #define cpu_lmemorywrite_d(a,v) \           cpu_linear_memory_write(a,v,4,pl)
         (CPU_STAT_PAGING) ? \  
                 cpu_linear_memory_write(a, 4, v) : \  
                 cpu_memorywrite_d(a,v);  
   
   /*
    * access code segment linear memory
    */
 #define cpu_lcmemoryread(a) \  #define cpu_lcmemoryread(a) \
         (CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
                 (BYTE)cpu_linear_memory_read(a, 1, TRUE) : \           cpu_memoryread(a) : \
                 cpu_memoryread(a);           (BYTE)cpu_linear_memory_read(a,1,CPU_PAGE_READ_CODE,CPU_IS_USER_MODE())
 #define cpu_lcmemoryread_w(a) \  #define cpu_lcmemoryread_w(a) \
         (CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
                 (WORD)cpu_linear_memory_read(a, 2, TRUE) : \           cpu_memoryread_w(a) : \
                 cpu_memoryread_w(a);           (WORD)cpu_linear_memory_read(a,2,CPU_PAGE_READ_CODE,CPU_IS_USER_MODE())
 #define cpu_lcmemoryread_d(a) \  #define cpu_lcmemoryread_d(a) \
         (CPU_STAT_PAGING) ? \          (!CPU_STAT_PAGING) ? \
                 cpu_linear_memory_read(a, 4, TRUE) : \           cpu_memoryread_d(a) : \
                 cpu_memoryread_d(a);           cpu_linear_memory_read(a,4,CPU_PAGE_READ_CODE,CPU_IS_USER_MODE())
   
   /*
    * access linear memory with superviser mode
    */
   #define cpu_kmemoryread(a)      cpu_lmemoryread(a,CPU_MODE_SUPERVISER)
   #define cpu_kmemoryread_w(a)    cpu_lmemoryread_w(a,CPU_MODE_SUPERVISER)
   #define cpu_kmemoryread_d(a)    cpu_lmemoryread_d(a,CPU_MODE_SUPERVISER)
   #define cpu_kmemorywrite(a,v)   cpu_lmemorywrite(a,v,CPU_MODE_SUPERVISER)
   #define cpu_kmemorywrite_w(a,v) cpu_lmemorywrite_w(a,v,CPU_MODE_SUPERVISER)
   #define cpu_kmemorywrite_d(a,v) cpu_lmemorywrite_d(a,v,CPU_MODE_SUPERVISER)
   
   
   /*
    * CR3 (Page Directory Entry base physical address)
    */
 #define set_CR3(cr3) \  #define set_CR3(cr3) \
 do { \  do { \
         CPU_CR3 = (cr3) & CPU_CR3_MASK; \          CPU_CR3 = (cr3) & CPU_CR3_MASK; \
           CPU_STAT_PDE_BASE = CPU_CR3 & CPU_CR3_PD_MASK; \
         tlb_flush(FALSE); \          tlb_flush(FALSE); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
Line 191  do { \ Line 205  do { \
 /*  /*
  * TLB function   * TLB function
  */   */
   #if defined(IA32_SUPPORT_TLB)
 void tlb_init();  void tlb_init();
 void tlb_flush(BOOL allflush);  void tlb_flush(BOOL allflush);
 void tlb_flush_page(DWORD vaddr);  void tlb_flush_page(DWORD vaddr);
   #else
   #define tlb_init()
   #define tlb_flush(allflush)     (void)allflush
   #define tlb_flush_page(vaddr)   (void)vaddr
   #endif
   
 #ifdef __cplusplus  #ifdef __cplusplus
 }  }
Removed from v.1.4  
changed lines
  Added in v.1.7

RetroPC.NET-CVS <cvs@retropc.net>