--- np2/i386c/ia32/paging.h 2005/03/05 16:47:04 1.19 +++ np2/i386c/ia32/paging.h 2011/01/15 17:17:23 1.23 @@ -1,5 +1,3 @@ -/* $Id: paging.h,v 1.19 2005/03/05 16:47:04 monaka Exp $ */ - /* * Copyright (c) 2003 NONAKA Kimihiro * All rights reserved. @@ -12,8 +10,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES @@ -128,8 +124,11 @@ extern "C" { /* * linear address memory access function */ -void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int ucrw, BYTE *data); -void MEMCALL paging_check(UINT32 laddr, UINT length, const int ucrw); +void MEMCALL cpu_memory_access_la_region(UINT32 address, UINT length, const int ucrw, UINT8 *data); +UINT32 MEMCALL laddr2paddr(const UINT32 laddr, const int ucrw); +#define laddr_to_paddr(laddr, ucrw) \ + (!CPU_STAT_PAGING) ? (laddr) : (laddr2paddr((laddr), (ucrw))) + /* ucrw */ #define CPU_PAGE_WRITE (1 << 0) @@ -140,19 +139,19 @@ void MEMCALL paging_check(UINT32 laddr, #define CPU_PAGE_READ_DATA (CPU_PAGE_DATA) #define CPU_PAGE_WRITE_DATA (CPU_PAGE_WRITE|CPU_PAGE_DATA) -UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; -UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; -UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg) GCC_ATTR_REGPARM; -UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; -UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; -UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; -UINT64 MEMCALL cpu_linear_memory_read_q(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; -REG80 MEMCALL cpu_linear_memory_read_f(UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; -void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode) GCC_ATTR_REGPARM; -void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode) GCC_ATTR_REGPARM; -void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode) GCC_ATTR_REGPARM; -void MEMCALL cpu_linear_memory_write_q(UINT32 laddr, UINT64 value, const int user_mode) GCC_ATTR_REGPARM; -void MEMCALL cpu_linear_memory_write_f(UINT32 laddr, const REG80 *value, const int user_mode) GCC_ATTR_REGPARM; +UINT8 MEMCALL cpu_memory_access_la_RMW_b(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg); +UINT16 MEMCALL cpu_memory_access_la_RMW_w(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg); +UINT32 MEMCALL cpu_memory_access_la_RMW_d(UINT32 laddr, UINT32 (*func)(UINT32, void *), void *arg); +UINT8 MEMCALL cpu_linear_memory_read_b(UINT32 laddr, const int ucrw); +UINT16 MEMCALL cpu_linear_memory_read_w(UINT32 laddr, const int ucrw); +UINT32 MEMCALL cpu_linear_memory_read_d(UINT32 laddr, const int ucrw); +UINT64 MEMCALL cpu_linear_memory_read_q(UINT32 laddr, const int ucrw); +REG80 MEMCALL cpu_linear_memory_read_f(UINT32 laddr, const int ucrw); +void MEMCALL cpu_linear_memory_write_b(UINT32 laddr, UINT8 value, const int user_mode); +void MEMCALL cpu_linear_memory_write_w(UINT32 laddr, UINT16 value, const int user_mode); +void MEMCALL cpu_linear_memory_write_d(UINT32 laddr, UINT32 value, const int user_mode); +void MEMCALL cpu_linear_memory_write_q(UINT32 laddr, UINT64 value, const int user_mode); +void MEMCALL cpu_linear_memory_write_f(UINT32 laddr, const REG80 *value, const int user_mode); #define cpu_lmemoryread(a,pl) \ (!CPU_STAT_PAGING) ? \ @@ -198,18 +197,6 @@ void MEMCALL cpu_linear_memory_write_f(U /* - * CR3 (Page Directory Entry base physical address) - */ -#define set_CR3(cr3) \ -do { \ - VERBOSE(("set_CR3: old = %08x, new = 0x%08x", CPU_CR3, (cr3) & CPU_CR3_MASK)); \ - CPU_CR3 = (cr3) & CPU_CR3_MASK; \ - CPU_STAT_PDE_BASE = CPU_CR3 & CPU_CR3_PD_MASK; \ - tlb_flush(FALSE); \ -} while (/*CONSTCOND*/ 0) - - -/* * TLB function */ typedef struct { @@ -229,9 +216,9 @@ typedef struct { #if defined(IA32_SUPPORT_TLB) void tlb_init(void); -void MEMCALL tlb_flush(BOOL allflush) GCC_ATTR_REGPARM; -void MEMCALL tlb_flush_page(UINT32 laddr) GCC_ATTR_REGPARM; -TLB_ENTRY_T* MEMCALL tlb_lookup(const UINT32 laddr, const int ucrw) GCC_ATTR_REGPARM; +void MEMCALL tlb_flush(BOOL allflush); +void MEMCALL tlb_flush_page(UINT32 laddr); +TLB_ENTRY_T* MEMCALL tlb_lookup(const UINT32 laddr, const int ucrw); #else #define tlb_init() #define tlb_flush(allflush) (void)(allflush)