--- np2/i386c/ia32/paging.h 2004/02/04 13:24:35 1.7 +++ np2/i386c/ia32/paging.h 2004/02/09 16:13:13 1.9 @@ -1,4 +1,4 @@ -/* $Id: paging.h,v 1.7 2004/02/04 13:24:35 monaka Exp $ */ +/* $Id: paging.h,v 1.9 2004/02/09 16:13:13 monaka Exp $ */ /* * Copyright (c) 2003 NONAKA Kimihiro @@ -39,13 +39,13 @@ extern "C" { * * 31 12 11 9 8 7 6 5 4 3 2 1 0 * +----------------------------------------+------+-+--+-+-+---+---+---+---+-+ - * | ページ・テーブルのベース・アドレス |使用可|G|PS|0|A|PCD|PWT|U/S|R/W|P| + * | ページ・テーブルのベース・アドレス |使用可|G|PS|-|A|PCD|PWT|U/S|R/W|P| * +----------------------------------------+------+-+--+-+-+---+---+---+---+-+ * | | | | | | | | | | * 9-11: システム・プログラマが使用可能 --------+ | | | | | | | | | * 8: グローバル・ページ(無視される) ------------+ | | | | | | | | * 7: ページ・サイズ (0 = 4k バイトページ) ---------+ | | | | | | | - * 6: 予約 (0) ---------------------------------------+ | | | | | | + * 6: 予約 (-) ---------------------------------------+ | | | | | | * 5: アクセス -----------------------------------------+ | | | | | * 4: キャッシュ無効 --------------------------------------+ | | | | * 3: ライトスルー --------------------------------------------+ | | | @@ -54,7 +54,9 @@ extern "C" { * 0: ページ存在 ---------------------------------------------------------+ */ #define CPU_PDE_BASEADDR_MASK 0xfffff000 +#define CPU_PDE_GLOBAL_PAGE (1 << 8) #define CPU_PDE_PAGE_SIZE (1 << 7) +#define CPU_PDE_DIRTY (1 << 6) #define CPU_PDE_ACCESS (1 << 5) #define CPU_PDE_CACHE_DISABLE (1 << 4) #define CPU_PDE_WRITE_THROUGH (1 << 3) @@ -97,12 +99,12 @@ extern "C" { * * 31 12 11 9 8 7 6 5 4 3 2 1 0 * +----------------------------------------+------+-+-+-+-+---+---+---+---+-+ - * | ページのベース・アドレス |使用可|G|0|D|A|PCD|PWT|U/S|R/W|P| + * | ページのベース・アドレス |使用可|G|-|D|A|PCD|PWT|U/S|R/W|P| * +----------------------------------------+------+-+-+-+-+---+---+---+---+-+ * | | | | | | | | | | * 9-11: システム・プログラマが使用可能 -------+ | | | | | | | | | * 8: グローバル・ページ -----------------------+ | | | | | | | | - * 7: 予約 (0) -----------------------------------+ | | | | | | | + * 7: 予約 (-) -----------------------------------+ | | | | | | | * 6: ダーティ -------------------------------------+ | | | | | | * 5: アクセス ---------------------------------------+ | | | | | * 4: キャッシュ無効 ------------------------------------+ | | | | @@ -113,6 +115,7 @@ extern "C" { */ #define CPU_PTE_BASEADDR_MASK 0xfffff000 #define CPU_PTE_GLOBAL_PAGE (1 << 8) +#define CPU_PTE_PAGE_SIZE (1 << 7) #define CPU_PTE_DIRTY (1 << 6) #define CPU_PTE_ACCESS (1 << 5) #define CPU_PTE_CACHE_DISABLE (1 << 4) @@ -121,7 +124,15 @@ extern "C" { #define CPU_PTE_WRITABLE (1 << 1) #define CPU_PTE_PRESENT (1 << 0) -/* paging_check(): rw */ + +/* + * linear address memory access function + */ +DWORD MEMCALL cpu_linear_memory_read(DWORD address, DWORD length, int code, int user_mode); +void MEMCALL cpu_linear_memory_write(DWORD address, DWORD value, DWORD length, int user_mode); +void MEMCALL paging_check(DWORD laddr, DWORD length, int crw, int user_mode); + +/* crw */ #define CPU_PAGE_READ (0 << 0) #define CPU_PAGE_WRITE (1 << 0) #define CPU_PAGE_CODE (1 << 1) @@ -131,13 +142,6 @@ extern "C" { #define CPU_PAGE_WRITE_DATA (CPU_PAGE_WRITE|CPU_PAGE_DATA) -/* - * linear address function - */ -DWORD MEMCALL cpu_linear_memory_read(DWORD address, DWORD length, int code, int user_mode); -void MEMCALL cpu_linear_memory_write(DWORD address, DWORD value, DWORD length, int user_mode); -void MEMCALL paging_check(DWORD laddr, DWORD length, int crw, int user_mode); - #define cpu_lmemoryread(a,pl) \ (!CPU_STAT_PAGING) ? \ cpu_memoryread(a) : \ @@ -165,23 +169,23 @@ void MEMCALL paging_check(DWORD laddr, D cpu_linear_memory_write(a,v,4,pl) /* - * access code segment linear memory + * code segment */ #define cpu_lcmemoryread(a) \ (!CPU_STAT_PAGING) ? \ cpu_memoryread(a) : \ - (BYTE)cpu_linear_memory_read(a,1,CPU_PAGE_READ_CODE,CPU_IS_USER_MODE()) + (BYTE)cpu_linear_memory_read(a,1,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE) #define cpu_lcmemoryread_w(a) \ (!CPU_STAT_PAGING) ? \ cpu_memoryread_w(a) : \ - (WORD)cpu_linear_memory_read(a,2,CPU_PAGE_READ_CODE,CPU_IS_USER_MODE()) + (WORD)cpu_linear_memory_read(a,2,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE) #define cpu_lcmemoryread_d(a) \ (!CPU_STAT_PAGING) ? \ cpu_memoryread_d(a) : \ - cpu_linear_memory_read(a,4,CPU_PAGE_READ_CODE,CPU_IS_USER_MODE()) + cpu_linear_memory_read(a,4,CPU_PAGE_READ_CODE,CPU_STAT_USER_MODE) /* - * access linear memory with superviser mode + * linear address memory access with superviser mode */ #define cpu_kmemoryread(a) cpu_lmemoryread(a,CPU_MODE_SUPERVISER) #define cpu_kmemoryread_w(a) cpu_lmemoryread_w(a,CPU_MODE_SUPERVISER) @@ -196,6 +200,7 @@ void MEMCALL paging_check(DWORD laddr, D */ #define set_CR3(cr3) \ do { \ + VERBOSE(("set_CR3: old = %08x, new = 0x%08x", CPU_CR3, (cr3) & CPU_CR3_MASK)); \ CPU_CR3 = (cr3) & CPU_CR3_MASK; \ CPU_STAT_PDE_BASE = CPU_CR3 & CPU_CR3_PD_MASK; \ tlb_flush(FALSE); \