| version 1.8, 2004/01/27 15:56:57 | version 1.11, 2004/02/05 16:43:44 | 
| Line 47  load_segreg(int idx, WORD selector, int | Line 47  load_segreg(int idx, WORD selector, int | 
 | CPU_REGS_SREG(idx) = selector; | CPU_REGS_SREG(idx) = selector; | 
 |  |  | 
 | memset(&sd, 0, sizeof(sd)); | memset(&sd, 0, sizeof(sd)); | 
 |  | if (idx == CPU_CS_INDEX) { | 
 |  | sd.rpl = CPU_STAT_CPL; | 
 |  | } | 
 | sd.u.seg.limit = CPU_STAT_SREGLIMIT(idx); | sd.u.seg.limit = CPU_STAT_SREGLIMIT(idx); | 
 | CPU_SET_SEGDESC_DEFAULT(&sd, idx, selector); | CPU_SET_SEGDESC_DEFAULT(&sd, idx, selector); | 
 | CPU_STAT_SREG(idx) = sd; | CPU_STAT_SREG(idx) = sd; | 
 |  |  | 
 | if (idx == CPU_CS_INDEX) { |  | 
 | CPU_INST_OP32 = CPU_INST_AS32 = |  | 
 | CPU_STATSAVE.cpu_inst_default.op_32 = |  | 
 | CPU_STATSAVE.cpu_inst_default.as_32 = 0; |  | 
 | } else if (idx == CPU_SS_INDEX) { |  | 
 | CPU_STAT_SS32 = 0; |  | 
 | } |  | 
 | return; | return; | 
 | } | } | 
 |  |  | 
| Line 134  load_segreg(int idx, WORD selector, int | Line 129  load_segreg(int idx, WORD selector, int | 
 | * load SS register | * load SS register | 
 | */ | */ | 
 | void | void | 
| load_ss(WORD selector, descriptor_t* sdp, BYTE cpl) | load_ss(WORD selector, descriptor_t* sdp, DWORD cpl) | 
 | { | { | 
 |  |  | 
 | CPU_STAT_SS32 = sdp->d; | CPU_STAT_SS32 = sdp->d; | 
| Line 146  load_ss(WORD selector, descriptor_t* sdp | Line 141  load_ss(WORD selector, descriptor_t* sdp | 
 | * load CS register | * load CS register | 
 | */ | */ | 
 | void | void | 
| load_cs(WORD selector, descriptor_t* sdp, BYTE cpl) | load_cs(WORD selector, descriptor_t* sdp, DWORD cpl) | 
 | { | { | 
 |  |  | 
 | CPU_INST_OP32 = CPU_INST_AS32 = | CPU_INST_OP32 = CPU_INST_AS32 = | 
| Line 154  load_cs(WORD selector, descriptor_t* sdp | Line 149  load_cs(WORD selector, descriptor_t* sdp | 
 | CPU_STATSAVE.cpu_inst_default.as_32 = sdp->d; | CPU_STATSAVE.cpu_inst_default.as_32 = sdp->d; | 
 | CPU_REGS_SREG(CPU_CS_INDEX) = (selector & ~3) | (cpl & 3); | CPU_REGS_SREG(CPU_CS_INDEX) = (selector & ~3) | (cpl & 3); | 
 | CPU_STAT_SREG(CPU_CS_INDEX) = *sdp; | CPU_STAT_SREG(CPU_CS_INDEX) = *sdp; | 
| CPU_STAT_CPL = cpl & 3; | CPU_SET_CPL(cpl & 3); | 
 | } | } | 
 |  |  | 
 | /* | /* | 
| Line 204  load_ldtr(WORD selector, int exc) | Line 199  load_ldtr(WORD selector, int exc) | 
 | void | void | 
 | load_descriptor(descriptor_t *descp, DWORD addr) | load_descriptor(descriptor_t *descp, DWORD addr) | 
 | { | { | 
 |  | DWORD l, h; | 
 |  |  | 
 | memset(descp, 0, sizeof(*descp)); | memset(descp, 0, sizeof(*descp)); | 
 |  |  | 
| descp->addr = addr; | l = cpu_kmemoryread_d(addr); | 
| descp->l = cpu_lmemoryread_d(descp->addr); | h = cpu_kmemoryread_d(addr + 4); | 
| descp->h = cpu_lmemoryread_d(descp->addr + 4); | VERBOSE(("load_descriptor: descriptor address = 0x%08x, h = 0x%08x, l = %08x", addr, h, l)); | 
| VERBOSE(("load_descriptor: descriptor address = 0x%08x, h = 0x%08x, l = %08x", descp->addr, descp->h, descp->l)); |  | 
 |  |  | 
 | descp->flag = 0; | descp->flag = 0; | 
 |  |  | 
| descp->p = (descp->h & CPU_DESC_H_P) == CPU_DESC_H_P; | descp->p = (h & CPU_DESC_H_P) == CPU_DESC_H_P; | 
| descp->type = (descp->h & CPU_DESC_H_TYPE) >> 8; | descp->type = (h & CPU_DESC_H_TYPE) >> 8; | 
| descp->dpl = (descp->h & CPU_DESC_H_DPL) >> 13; | descp->dpl = (h & CPU_DESC_H_DPL) >> 13; | 
| descp->s = (descp->h & CPU_DESC_H_S) == CPU_DESC_H_S; | descp->s = (h & CPU_DESC_H_S) == CPU_DESC_H_S; | 
 |  |  | 
 | VERBOSE(("load_descriptor: present = %s, type = %d, DPL = %d", descp->p ? "true" : "false", descp->type, descp->dpl)); | VERBOSE(("load_descriptor: present = %s, type = %d, DPL = %d", descp->p ? "true" : "false", descp->type, descp->dpl)); | 
 |  |  | 
 | if (descp->s) { | if (descp->s) { | 
 | /* code/data */ | /* code/data */ | 
 | descp->valid = 1; | descp->valid = 1; | 
| descp->d = (descp->h & CPU_SEGDESC_H_D) ? 1 : 0; | descp->d = (h & CPU_SEGDESC_H_D) ? 1 : 0; | 
 |  |  | 
| descp->u.seg.c = (descp->h & CPU_SEGDESC_H_D_C) ? 1 : 0; | descp->u.seg.c = (h & CPU_SEGDESC_H_D_C) ? 1 : 0; | 
| descp->u.seg.g = (descp->h & CPU_SEGDESC_H_G) ? 1 : 0; | descp->u.seg.g = (h & CPU_SEGDESC_H_G) ? 1 : 0; | 
 | descp->u.seg.wr = (descp->type & CPU_SEGDESC_TYPE_WR) ? 1 : 0; | descp->u.seg.wr = (descp->type & CPU_SEGDESC_TYPE_WR) ? 1 : 0; | 
 | descp->u.seg.ec = (descp->type & CPU_SEGDESC_TYPE_EC) ? 1 : 0; | descp->u.seg.ec = (descp->type & CPU_SEGDESC_TYPE_EC) ? 1 : 0; | 
 |  |  | 
| descp->u.seg.segbase  = (descp->l >> 16) & 0xffff; | descp->u.seg.segbase  = (l >> 16) & 0xffff; | 
| descp->u.seg.segbase |= (descp->h & 0xff) << 16; | descp->u.seg.segbase |= (h & 0xff) << 16; | 
| descp->u.seg.segbase |= descp->h & 0xff000000; | descp->u.seg.segbase |= h & 0xff000000; | 
| descp->u.seg.limit = (descp->h & 0xf0000) | (descp->l & 0xffff); | descp->u.seg.limit = (h & 0xf0000) | (l & 0xffff); | 
 | if (descp->u.seg.g) { | if (descp->u.seg.g) { | 
 | descp->u.seg.limit <<= 12; | descp->u.seg.limit <<= 12; | 
 | descp->u.seg.limit |= 0xfff; | descp->u.seg.limit |= 0xfff; | 
| Line 250  load_descriptor(descriptor_t *descp, DWO | Line 245  load_descriptor(descriptor_t *descp, DWO | 
 | switch (descp->type) { | switch (descp->type) { | 
 | case CPU_SYSDESC_TYPE_LDT:              /* LDT */ | case CPU_SYSDESC_TYPE_LDT:              /* LDT */ | 
 | descp->valid = 1; | descp->valid = 1; | 
| descp->u.seg.g = (descp->h & CPU_SEGDESC_H_G) ? 1 : 0; | descp->u.seg.g = (h & CPU_SEGDESC_H_G) ? 1 : 0; | 
 |  |  | 
| descp->u.seg.segbase  = descp->h & 0xff000000; | descp->u.seg.segbase  = h & 0xff000000; | 
| descp->u.seg.segbase |= (descp->h & 0xff) << 16; | descp->u.seg.segbase |= (h & 0xff) << 16; | 
| descp->u.seg.segbase |= descp->l >> 16; | descp->u.seg.segbase |= l >> 16; | 
| descp->u.seg.limit  = descp->h & 0xf0000; | descp->u.seg.limit  = h & 0xf0000; | 
| descp->u.seg.limit |= descp->l & 0xffff; | descp->u.seg.limit |= l & 0xffff; | 
 | if (descp->u.seg.g) { | if (descp->u.seg.g) { | 
 | descp->u.seg.limit <<= 12; | descp->u.seg.limit <<= 12; | 
 | descp->u.seg.limit |= 0xfff; | descp->u.seg.limit |= 0xfff; | 
| Line 269  load_descriptor(descriptor_t *descp, DWO | Line 264  load_descriptor(descriptor_t *descp, DWO | 
 |  |  | 
 | case CPU_SYSDESC_TYPE_TASK:             /* task gate */ | case CPU_SYSDESC_TYPE_TASK:             /* task gate */ | 
 | descp->valid = 1; | descp->valid = 1; | 
| descp->u.gate.selector = descp->l >> 16; | descp->u.gate.selector = l >> 16; | 
 |  |  | 
 | VERBOSE(("load_descriptor: task descriptor: selector = 0x%04x", descp->u.gate.selector)); | VERBOSE(("load_descriptor: task descriptor: selector = 0x%04x", descp->u.gate.selector)); | 
 | break; | break; | 
| Line 279  load_descriptor(descriptor_t *descp, DWO | Line 274  load_descriptor(descriptor_t *descp, DWO | 
 | case CPU_SYSDESC_TYPE_TSS_32:           /* 386 TSS */ | case CPU_SYSDESC_TYPE_TSS_32:           /* 386 TSS */ | 
 | case CPU_SYSDESC_TYPE_TSS_BUSY_32:      /* 386 TSS Busy */ | case CPU_SYSDESC_TYPE_TSS_BUSY_32:      /* 386 TSS Busy */ | 
 | descp->valid = 1; | descp->valid = 1; | 
| descp->d = (descp->h & CPU_GATEDESC_H_D) ? 1 : 0; | descp->d = (h & CPU_GATEDESC_H_D) ? 1 : 0; | 
| descp->u.seg.g = (descp->h & CPU_SEGDESC_H_G) ? 1 : 0; | descp->u.seg.g = (h & CPU_SEGDESC_H_G) ? 1 : 0; | 
 |  |  | 
| descp->u.seg.segbase  = descp->h & 0xff000000; | descp->u.seg.segbase  = h & 0xff000000; | 
| descp->u.seg.segbase |= (descp->h & 0xff) << 16; | descp->u.seg.segbase |= (h & 0xff) << 16; | 
| descp->u.seg.segbase |= descp->l >> 16; | descp->u.seg.segbase |= l >> 16; | 
| descp->u.seg.limit  = descp->h & 0xf0000; | descp->u.seg.limit  = h & 0xf0000; | 
| descp->u.seg.limit |= descp->l & 0xffff; | descp->u.seg.limit |= l & 0xffff; | 
 | if (descp->u.seg.g) { | if (descp->u.seg.g) { | 
 | descp->u.seg.limit <<= 12; | descp->u.seg.limit <<= 12; | 
 | descp->u.seg.limit |= 0xfff; | descp->u.seg.limit |= 0xfff; | 
 | } | } | 
 | descp->u.seg.segend = descp->u.seg.segbase + descp->u.seg.limit; | descp->u.seg.segend = descp->u.seg.segbase + descp->u.seg.limit; | 
 |  |  | 
| VERBOSE(("load_descriptor: %dbit %sTSS descriptor", descp->d ? 32 : 16, (descp->type & CPU_SYSDESC_TYPE_TSS_BUSY) ? "busy " : "")); | VERBOSE(("load_descriptor: %dbit %sTSS descriptor", descp->d ? 32 : 16, (descp->type & CPU_SYSDESC_TYPE_TSS_BUSY_IND) ? "busy " : "")); | 
 | VERBOSE(("load_descriptor: TSS base address = 0x%08x, limit = 0x%08x", descp->u.seg.segbase, descp->u.seg.limit)); | VERBOSE(("load_descriptor: TSS base address = 0x%08x, limit = 0x%08x", descp->u.seg.segbase, descp->u.seg.limit)); | 
 | VERBOSE(("load_descriptor: d = %s, g = %s", descp->d ? "on" : "off", descp->u.seg.g ? "on" : "off")); | VERBOSE(("load_descriptor: d = %s, g = %s", descp->d ? "on" : "off", descp->u.seg.g ? "on" : "off")); | 
 | break; | break; | 
| Line 304  load_descriptor(descriptor_t *descp, DWO | Line 299  load_descriptor(descriptor_t *descp, DWO | 
 | case CPU_SYSDESC_TYPE_CALL_32:          /* 386 call gate */ | case CPU_SYSDESC_TYPE_CALL_32:          /* 386 call gate */ | 
 | case CPU_SYSDESC_TYPE_INTR_32:          /* 386 interrupt gate */ | case CPU_SYSDESC_TYPE_INTR_32:          /* 386 interrupt gate */ | 
 | case CPU_SYSDESC_TYPE_TRAP_32:          /* 386 trap gate */ | case CPU_SYSDESC_TYPE_TRAP_32:          /* 386 trap gate */ | 
| if ((descp->h & 0x0000000e0) == 0) { | if ((h & 0x0000000e0) == 0) { | 
 | descp->valid = 1; | descp->valid = 1; | 
| descp->d = (descp->h & CPU_GATEDESC_H_D) ? 1:0; | descp->d = (h & CPU_GATEDESC_H_D) ? 1:0; | 
| descp->u.gate.selector = descp->l >> 16; | descp->u.gate.selector = l >> 16; | 
| descp->u.gate.offset  = descp->h & 0xffff0000; | descp->u.gate.offset  = h & 0xffff0000; | 
| descp->u.gate.offset |= descp->l & 0xffff; | descp->u.gate.offset |= l & 0xffff; | 
| descp->u.gate.count = descp->h & 0x1f; | descp->u.gate.count = h & 0x1f; | 
 |  |  | 
 | VERBOSE(("load_descriptor: %dbit %s gate descriptor", descp->d ? 32 : 16, ((descp->type & CPU_SYSDESC_TYPE_MASKBIT) == CPU_SYSDESC_TYPE_CALL) ? "call" : (((descp->type & CPU_SYSDESC_TYPE_MASKBIT) == CPU_SYSDESC_TYPE_INTR) ? "interrupt" : "trap"))); | VERBOSE(("load_descriptor: %dbit %s gate descriptor", descp->d ? 32 : 16, ((descp->type & CPU_SYSDESC_TYPE_MASKBIT) == CPU_SYSDESC_TYPE_CALL) ? "call" : (((descp->type & CPU_SYSDESC_TYPE_MASKBIT) == CPU_SYSDESC_TYPE_INTR) ? "interrupt" : "trap"))); | 
 | VERBOSE(("load_descriptor: selector = 0x%04x, offset = 0x%08x, count = %d, d = %s", descp->u.gate.selector, descp->u.gate.offset, descp->u.gate.count, descp->d ? "on" : "off")); | VERBOSE(("load_descriptor: selector = 0x%04x, offset = 0x%08x, count = %d, d = %s", descp->u.gate.selector, descp->u.gate.offset, descp->u.gate.count, descp->d ? "on" : "off")); | 
| Line 343  parse_selector(selector_t* ssp, WORD sel | Line 338  parse_selector(selector_t* ssp, WORD sel | 
 | VERBOSE(("parse_selector: selector = %04x, index = %d, RPL = %d, %cDT", ssp->selector, ssp->idx >> 3, ssp->rpl, ssp->ldt ? 'L' : 'G')); | VERBOSE(("parse_selector: selector = %04x, index = %d, RPL = %d, %cDT", ssp->selector, ssp->idx >> 3, ssp->rpl, ssp->ldt ? 'L' : 'G')); | 
 |  |  | 
 | /* descriptor table */ | /* descriptor table */ | 
| idx = selector & ~7; | idx = selector & CPU_SEGMENT_SELECTOR_INDEX_MASK; | 
 | if (ssp->ldt) { | if (ssp->ldt) { | 
 | /* LDT */ | /* LDT */ | 
 | if (!CPU_LDTR_DESC.valid) { | if (!CPU_LDTR_DESC.valid) { | 
| Line 365  parse_selector(selector_t* ssp, WORD sel | Line 360  parse_selector(selector_t* ssp, WORD sel | 
 | VERBOSE(("parse_selector: segment limit check failed")); | VERBOSE(("parse_selector: segment limit check failed")); | 
 | return -3; | return -3; | 
 | } | } | 
 |  |  | 
 | /* load descriptor */ | /* load descriptor */ | 
| CPU_SET_SEGDESC(&ssp->desc, base + idx); | ssp->addr = base + idx; | 
|  | load_descriptor(&ssp->desc, ssp->addr); | 
 | if (!ssp->desc.valid) { | if (!ssp->desc.valid) { | 
 | VERBOSE(("parse_selector: segment descriptor is invalid")); | VERBOSE(("parse_selector: segment descriptor is invalid")); | 
 | return -4; | return -4; | 
 | } | } | 
 |  |  | 
 | return 0; | return 0; | 
 | } | } | 
 |  |  | 
 | int | int | 
| selector_is_not_present(selector_t* ssp) | selector_is_not_present(selector_t *ssp) | 
 | { | { | 
 |  | DWORD h; | 
 |  |  | 
 | /* not present */ | /* not present */ | 
 | if (!ssp->desc.p) { | if (!ssp->desc.p) { | 
 | VERBOSE(("selector_is_not_present: not present")); | VERBOSE(("selector_is_not_present: not present")); | 
 | return -1; | return -1; | 
 | } | } | 
| CPU_SET_SEGDESC_POSTPART(&ssp->desc); |  | 
|  | /* set access bit if code/data segment descriptor */ | 
|  | if (ssp->desc.s) { | 
|  | h = cpu_kmemoryread_d(ssp->addr + 4); | 
|  | if (!(h & CPU_SEGDESC_H_A)) { | 
|  | h |= CPU_SEGDESC_H_A; | 
|  | cpu_kmemorywrite_d(ssp->addr + 4, h); | 
|  | } | 
|  | } | 
|  |  | 
 | return 0; | return 0; | 
 | } | } |