--- np2/i386c/ia32/segments.c 2003/12/22 18:00:31 1.3 +++ np2/i386c/ia32/segments.c 2012/02/05 06:16:08 1.26 @@ -1,5 +1,3 @@ -/* $Id: segments.c,v 1.3 2003/12/22 18:00:31 monaka Exp $ */ - /* * Copyright (c) 2003 NONAKA Kimihiro * All rights reserved. @@ -12,8 +10,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES @@ -31,34 +27,34 @@ #include "cpu.h" #include "ia32.mcr" +static void CPUCALL segdesc_set_default(int, UINT16, descriptor_t *); -void -load_segreg(int idx, WORD selector, int exc) +void CPUCALL +load_segreg(int idx, UINT16 selector, UINT16 *sregp, descriptor_t *sdp, int exc) { selector_t sel; int rv; __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); + __ASSERT((sregp != NULL)); + __ASSERT((sdp != NULL)); if (!CPU_STAT_PM || CPU_STAT_VM86) { - descriptor_t sd; - /* real-mode or vm86 mode */ - CPU_REGS_SREG(idx) = selector; - - sd.u.seg.limit = CPU_STAT_SREGLIMIT(idx); - CPU_SET_SEGDESC_DEFAULT(&sd, idx, selector); - CPU_STAT_SREG(idx) = sd; + *sregp = selector; + segdesc_clear(&sel.desc); + segdesc_set_default(idx, selector, &sel.desc); + *sdp = sel.desc; return; } + VERBOSE(("load_segreg: EIP = %04x:%08x, idx = %d, selector = %04x, sregp = %p, dp = %p, exc = %d", CPU_CS, CPU_PREV_EIP, idx, selector, sregp, sdp, exc)); + /* * protected mode */ - VERBOSE(("load_segreg: idx = %d, selector = %04x, exc = %d", idx, selector, exc)); - if (idx == CPU_CS_INDEX) { - ia32_panic("load_segreg: sreg(%d)", idx); + ia32_panic("load_segreg: CS"); } rv = parse_selector(&sel, selector); @@ -66,16 +62,18 @@ load_segreg(int idx, WORD selector, int if ((rv != -2) || (idx == CPU_SS_INDEX)) { EXCEPTION(exc, sel.idx); } - CPU_REGS_SREG(idx) = sel.selector; - CPU_STAT_SREG_CLEAR(idx); + *sregp = sel.selector; + segdesc_clear(sdp); return; } switch (idx) { case CPU_SS_INDEX: - if ((CPU_STAT_CPL != sel.rpl) || - !sel.desc.s || sel.desc.u.seg.c || !sel.desc.u.seg.wr || - (CPU_STAT_CPL != sel.desc.dpl)) { + if ((CPU_STAT_CPL != sel.rpl) + || (CPU_STAT_CPL != sel.desc.dpl) + || SEG_IS_SYSTEM(&sel.desc) + || SEG_IS_CODE(&sel.desc) + || !SEG_IS_WRITABLE_DATA(&sel.desc)) { EXCEPTION(exc, sel.idx); } @@ -85,24 +83,22 @@ load_segreg(int idx, WORD selector, int EXCEPTION(SS_EXCEPTION, sel.idx); } - CPU_STAT_SS32 = sel.desc.d; - CPU_REGS_SREG(idx) = sel.selector; - CPU_STAT_SREG(idx) = sel.desc; + load_ss(sel.selector, &sel.desc, CPU_STAT_CPL); break; case CPU_ES_INDEX: case CPU_DS_INDEX: case CPU_FS_INDEX: case CPU_GS_INDEX: - /* !(system segment || non-readble code segment */ - if (!sel.desc.s - || (sel.desc.u.seg.c && !sel.desc.u.seg.wr)) { + if (SEG_IS_SYSTEM(&sel.desc) + || (SEG_IS_CODE(&sel.desc) && !SEG_IS_READABLE_CODE(&sel.desc))) { EXCEPTION(exc, sel.idx); } - /* data segment || non-conforming code segment */ - if (!sel.desc.u.seg.c || !sel.desc.u.seg.ec) { + if (SEG_IS_DATA(&sel.desc) + || !SEG_IS_CONFORMING_CODE(&sel.desc)) { /* check privilege level */ - if ((sel.rpl > sel.desc.dpl) || (CPU_STAT_CPL > sel.desc.dpl)) { + if ((sel.rpl > sel.desc.dpl) + || (CPU_STAT_CPL > sel.desc.dpl)) { EXCEPTION(exc, sel.idx); } } @@ -113,8 +109,8 @@ load_segreg(int idx, WORD selector, int EXCEPTION(NP_EXCEPTION, sel.idx); } - CPU_REGS_SREG(idx) = sel.selector; - CPU_STAT_SREG(idx) = sel.desc; + *sregp = sel.selector; + *sdp = sel.desc; break; default: @@ -126,42 +122,47 @@ load_segreg(int idx, WORD selector, int /* * load SS register */ -void -load_ss(WORD selector, descriptor_t* sdp, BYTE cpl) +void CPUCALL +load_ss(UINT16 selector, const descriptor_t *sdp, int cpl) { CPU_STAT_SS32 = sdp->d; - CPU_REGS_SREG(CPU_SS_INDEX) = (selector & ~3) | (cpl & 3); - CPU_STAT_SREG(CPU_SS_INDEX) = *sdp; + CPU_SS = (UINT16)((selector & ~3) | (cpl & 3)); + CPU_SS_DESC = *sdp; } /* * load CS register */ -void -load_cs(WORD selector, descriptor_t* sdp, BYTE cpl) +void CPUCALL +load_cs(UINT16 selector, const descriptor_t *sdp, int new_cpl) { + int cpl = new_cpl & 3; - CPU_STATSAVE.cpu_inst_default.op_32 - = CPU_STATSAVE.cpu_inst_default.as_32 = sdp->d; - CPU_REGS_SREG(CPU_CS_INDEX) = (selector & ~3) | (cpl & 3); - CPU_STAT_SREG(CPU_CS_INDEX) = *sdp; - CPU_STAT_CPL = cpl & 3; + CPU_INST_OP32 = CPU_INST_AS32 = + CPU_STATSAVE.cpu_inst_default.op_32 = + CPU_STATSAVE.cpu_inst_default.as_32 = sdp->d; + CPU_CS = (UINT16)((selector & ~3) | cpl); + CPU_CS_DESC = *sdp; + set_cpl(cpl); } /* * load LDT register */ -void -load_ldtr(WORD selector, int exc) +void CPUCALL +load_ldtr(UINT16 selector, int exc) { selector_t sel; int rv; + memset(&sel, 0, sizeof(sel)); + rv = parse_selector(&sel, selector); if (rv < 0 || sel.ldt) { if (rv == -2) { /* null segment */ + VERBOSE(("load_ldtr: null segment")); CPU_LDTR = 0; memset(&CPU_LDTR_DESC, 0, sizeof(CPU_LDTR_DESC)); return; @@ -170,163 +171,158 @@ load_ldtr(WORD selector, int exc) } /* check descriptor type */ - if (sel.desc.s || (sel.desc.type != CPU_SYSDESC_TYPE_LDT)) { + if (!SEG_IS_SYSTEM(&sel.desc) + || (sel.desc.type != CPU_SYSDESC_TYPE_LDT)) { EXCEPTION(exc, sel.selector); } - /* check limit */ - if (sel.desc.u.seg.limit < 7) { - ia32_panic("load_ldtr: LDTR descriptor limit < 7"); - } - /* not present */ rv = selector_is_not_present(&sel); if (rv < 0) { EXCEPTION((exc == TS_EXCEPTION) ? TS_EXCEPTION : NP_EXCEPTION, sel.selector); } +#if defined(MORE_DEBUG) + ldtr_dump(sel.desc.u.seg.segbase, sel.desc.u.seg.limit); +#endif + CPU_LDTR = sel.selector; CPU_LDTR_DESC = sel.desc; } -void -load_descriptor(descriptor_t *descp, DWORD addr) +void CPUCALL +load_descriptor(descriptor_t *sdp, UINT32 addr) { + UINT32 l, h; - descp->addr = addr; - descp->l = cpu_lmemoryread_d(descp->addr); - descp->h = cpu_lmemoryread_d(descp->addr + 4); - - descp->flag = 0; - - descp->p = (descp->h & CPU_DESC_H_P) == CPU_DESC_H_P; - descp->type = (descp->h & CPU_DESC_H_TYPE) >> 8; - descp->dpl = (descp->h & CPU_DESC_H_DPL) >> 13; - descp->s = (descp->h & CPU_DESC_H_S) == CPU_DESC_H_S; + __ASSERT(sdp != NULL); - if (descp->s) { - /* code/data */ - descp->valid = 1; + VERBOSE(("load_descriptor: address = 0x%08x", addr)); - descp->d = (descp->h & CPU_SEGDESC_H_D) ? 1 : 0; - descp->u.seg.c = (descp->h & CPU_SEGDESC_H_D_C) ? 1 : 0; - descp->u.seg.g = (descp->h & CPU_SEGDESC_H_G) ? 1 : 0; - descp->u.seg.wr = (descp->type & CPU_SEGDESC_TYPE_WR) ? 1 : 0; - descp->u.seg.ec = (descp->type & CPU_SEGDESC_TYPE_EC) ? 1 : 0; + l = cpu_kmemoryread_d(addr); + h = cpu_kmemoryread_d(addr + 4); + VERBOSE(("descriptor value = 0x%08x%08x", h, l)); - descp->u.seg.segbase = (descp->l >> 16) & 0xffff; - descp->u.seg.segbase |= (descp->h & 0xff) << 16; - descp->u.seg.segbase |= descp->h & 0xff000000; + segdesc_clear(sdp); + sdp->flag = 0; - descp->u.seg.limit = (descp->h & 0xf0000) | (descp->l & 0xffff); - if (descp->u.seg.g) { - descp->u.seg.limit <<= 12; - descp->u.seg.limit |= 0xfff; - } + sdp->p = (h & CPU_DESC_H_P) ? 1 : 0; + sdp->type = (UINT8)((h & CPU_DESC_H_TYPE) >> CPU_DESC_H_TYPE_SHIFT); + sdp->dpl = (UINT8)((h & CPU_DESC_H_DPL) >> CPU_DESC_H_DPL_SHIFT); + sdp->s = (h & CPU_DESC_H_S) ? 1 : 0; - descp->u.seg.segend = descp->u.seg.segbase + descp->u.seg.limit; + if (!SEG_IS_SYSTEM(sdp)) { + /* code/data */ + sdp->valid = 1; + sdp->d = (h & CPU_SEGDESC_H_D) ? 1 : 0; - VERBOSE(("load_descriptor: %s segment descriptor: addr = 0x%08x, h = 0x%04x, l = %04x, type = %d, DPL = %d, base = 0x%08x, limit = 0x%08x, d = %s, g = %s, %s, %s", descp->u.seg.c ? "code" : "data", descp->addr, descp->h, descp->l, descp->type, descp->dpl, descp->u.seg.segbase, descp->u.seg.limit, descp->d ? "on" : "off", descp->u.seg.g ? "on" : "off", descp->u.seg.c ? (descp->u.seg.wr ? "executable/readable" : "execute-only") : (descp->u.seg.wr ? "writable" : "read-only"), (descp->u.seg.c ? (descp->u.seg.ec ? "conforming" : "non-conforming") : (descp->u.seg.ec ? "expand-down" : "expand-up")))); + sdp->u.seg.c = (h & CPU_SEGDESC_H_D_C) ? 1 : 0; + sdp->u.seg.g = (h & CPU_SEGDESC_H_G) ? 1 : 0; + sdp->u.seg.wr = (sdp->type & CPU_SEGDESC_TYPE_WR) ? 1 : 0; + sdp->u.seg.ec = (sdp->type & CPU_SEGDESC_TYPE_EC) ? 1 : 0; + + sdp->u.seg.segbase = (l >> 16) & 0xffff; + sdp->u.seg.segbase |= (h & 0xff) << 16; + sdp->u.seg.segbase |= h & 0xff000000; + sdp->u.seg.limit = (h & 0xf0000) | (l & 0xffff); + if (sdp->u.seg.g) { + sdp->u.seg.limit <<= 12; + if (SEG_IS_CODE(sdp) || !SEG_IS_EXPANDDOWN_DATA(sdp)) { + /* expand-up segment */ + sdp->u.seg.limit |= 0xfff; + } + } } else { /* system */ - switch (descp->type) { + switch (sdp->type) { case CPU_SYSDESC_TYPE_LDT: /* LDT */ - descp->valid = 1; - VERBOSE(("load_descriptor: LDT descriptor")); + sdp->valid = 1; + sdp->u.seg.g = (h & CPU_SEGDESC_H_G) ? 1 : 0; + + sdp->u.seg.segbase = h & 0xff000000; + sdp->u.seg.segbase |= (h & 0xff) << 16; + sdp->u.seg.segbase |= l >> 16; + sdp->u.seg.limit = h & 0xf0000; + sdp->u.seg.limit |= l & 0xffff; + if (sdp->u.seg.g) { + sdp->u.seg.limit <<= 12; + sdp->u.seg.limit |= 0xfff; + } break; - case CPU_SYSDESC_TYPE_TASK: - descp->valid = 1; - descp->u.gate.selector = descp->l >> 16; - VERBOSE(("load_descriptor: task descriptor: selector = 0x%04x", descp->u.gate.selector)); + case CPU_SYSDESC_TYPE_TASK: /* task gate */ + sdp->valid = 1; + sdp->u.gate.selector = (UINT16)(l >> 16); break; case CPU_SYSDESC_TYPE_TSS_16: /* 286 TSS */ case CPU_SYSDESC_TYPE_TSS_BUSY_16: /* 286 TSS Busy */ - descp->valid = 1; - descp->u.seg.segbase |= (descp->h & 0xff) << 16; - descp->u.seg.segbase |= descp->l >> 16; - descp->u.seg.limit = descp->h & 0xf0000; - descp->u.seg.limit |= descp->l & 0xffff; - descp->u.seg.segend = descp->u.seg.segbase + descp->u.seg.limit; - VERBOSE(("load_descriptor: 16bit %sTSS descriptor: base = 0x%08x, limit = 0x%08x", (descp->type & CPU_SYSDESC_TYPE_TSS_BUSY) ? "busy " : "", descp->u.seg.segbase, descp->u.seg.limit)); - break; - - case CPU_SYSDESC_TYPE_CALL_16: /* 286 call gate */ - case CPU_SYSDESC_TYPE_INTR_16: /* 286 interrupt gate */ - case CPU_SYSDESC_TYPE_TRAP_16: /* 286 trap gate */ - if ((descp->h & 0x0000000e0) == 0) { - descp->valid = 1; - descp->u.gate.selector = descp->l >> 16; - descp->u.gate.offset = descp->l & 0xffff; - descp->u.gate.count = descp->h & 0x1f; - VERBOSE(("load_descriptor: 16bit %s gate descriptor: selector = 0x%04x, offset = 0x%08x, count = %d", (descp->type == CPU_SYSDESC_TYPE_CALL_16) ? "call" : ((descp->type == CPU_SYSDESC_TYPE_INTR_16) ? "interrupt" : "trap"), descp->u.gate.selector, descp->u.gate.offset, descp->u.gate.count)); - } else { - ia32_panic("load_descriptor: 286 gate is invalid"); - } - break; - case CPU_SYSDESC_TYPE_TSS_32: /* 386 TSS */ case CPU_SYSDESC_TYPE_TSS_BUSY_32: /* 386 TSS Busy */ - descp->valid = 1; - descp->d = (descp->h & CPU_SEGDESC_H_D) ? 1 : 0; - descp->u.seg.g = (descp->h & CPU_SEGDESC_H_G) ? 1 : 0; - descp->u.seg.segbase = descp->h & 0xff000000; - descp->u.seg.segbase |= (descp->h & 0xff) << 16; - descp->u.seg.segbase |= descp->l >> 16; - descp->u.seg.limit = descp->h & 0xf0000; - descp->u.seg.limit |= descp->l & 0xffff; - if (descp->u.seg.g) { - descp->u.seg.limit <<= 12; - descp->u.seg.limit |= 0xfff; + sdp->valid = 1; + sdp->d = (h & CPU_GATEDESC_H_D) ? 1 : 0; + sdp->u.seg.g = (h & CPU_SEGDESC_H_G) ? 1 : 0; + + sdp->u.seg.segbase = h & 0xff000000; + sdp->u.seg.segbase |= (h & 0xff) << 16; + sdp->u.seg.segbase |= l >> 16; + sdp->u.seg.limit = h & 0xf0000; + sdp->u.seg.limit |= l & 0xffff; + if (sdp->u.seg.g) { + sdp->u.seg.limit <<= 12; + sdp->u.seg.limit |= 0xfff; } - VERBOSE(("load_descriptor: 32bit %sTSS descriptor: base = 0x%08x, limit = 0x%08x, d = %s, g = %s", (descp->type & CPU_SYSDESC_TYPE_TSS_BUSY) ? "busy " : "", descp->u.seg.segbase, descp->u.seg.limit, descp->d ? "on" : "off", descp->u.seg.g ? "on" : "off")); break; + case CPU_SYSDESC_TYPE_CALL_16: /* 286 call gate */ + case CPU_SYSDESC_TYPE_INTR_16: /* 286 interrupt gate */ + case CPU_SYSDESC_TYPE_TRAP_16: /* 286 trap gate */ case CPU_SYSDESC_TYPE_CALL_32: /* 386 call gate */ case CPU_SYSDESC_TYPE_INTR_32: /* 386 interrupt gate */ case CPU_SYSDESC_TYPE_TRAP_32: /* 386 trap gate */ - if ((descp->h & 0x0000000e0) == 0) { - descp->valid = 1; - descp->d = (descp->h & CPU_GATEDESC_H_D) ? 1:0; - descp->u.gate.selector = descp->l >> 16; - descp->u.gate.offset = descp->h & 0xffff0000; - descp->u.gate.offset |= descp->l & 0xffff; - descp->u.gate.count = descp->h & 0x1f; - VERBOSE(("load_descriptor: 32bit %s gate descriptor: selector = 0x%04x, offset = 0x%08x, count = %d, d = %s", (descp->type == CPU_SYSDESC_TYPE_CALL_16) ? "call" : ((descp->type == CPU_SYSDESC_TYPE_INTR_16) ? "interrupt" : "trap"), descp->u.gate.selector, descp->u.gate.offset, descp->u.gate.count, descp->d ? "on" : "off")); + if ((h & 0x0000000e0) == 0) { + sdp->valid = 1; + sdp->d = (h & CPU_GATEDESC_H_D) ? 1 : 0; + sdp->u.gate.selector = (UINT16)(l >> 16); + sdp->u.gate.offset = h & 0xffff0000; + sdp->u.gate.offset |= l & 0xffff; + sdp->u.gate.count = (UINT8)(h & 0x1f); } else { - ia32_panic("load_descriptor: 286 gate is invalid"); + sdp->valid = 0; + VERBOSE(("load_descriptor: gate is invalid")); } break; case 0: case 8: case 10: case 13: /* reserved */ default: - descp->valid = 0; - ia32_panic("bad segment descriptor (%d)", descp->type); + sdp->valid = 0; break; } } +#if defined(DEBUG) + segdesc_dump(sdp); +#endif } -int -parse_selector(selector_t* ssp, WORD selector) +int CPUCALL +parse_selector(selector_t *ssp, UINT16 selector) { - DWORD base; - WORD limit; - WORD idx; + UINT32 base; + UINT limit; + UINT idx; ssp->selector = selector; ssp->idx = selector & ~3; ssp->rpl = selector & 3; - ssp->ldt = selector & CPU_SEGMENT_TABLE_IND; + ssp->ldt = (UINT8)(selector & CPU_SEGMENT_TABLE_IND); VERBOSE(("parse_selector: selector = %04x, index = %d, RPL = %d, %cDT", ssp->selector, ssp->idx >> 3, ssp->rpl, ssp->ldt ? 'L' : 'G')); /* descriptor table */ - idx = selector & ~7; + idx = selector & CPU_SEGMENT_SELECTOR_INDEX_MASK; if (ssp->ldt) { /* LDT */ - if (!CPU_LDTR_DESC.valid) { + if (!SEG_IS_VALID(&CPU_LDTR_DESC)) { VERBOSE(("parse_selector: LDT is invalid")); return -1; } @@ -342,26 +338,77 @@ parse_selector(selector_t* ssp, WORD sel limit = CPU_GDTR_LIMIT; } if (idx + 7 > limit) { - VERBOSE(("parse_selector: segment limit check failed")); + VERBOSE(("parse_selector: segment limit check failed: 0x%08x > 0x%08x", idx + 7, limit)); return -3; } + /* load descriptor */ - CPU_SET_SEGDESC(&ssp->desc, base + idx); - if (!ssp->desc.valid) { + ssp->addr = base + idx; + load_descriptor(&ssp->desc, ssp->addr); + if (!SEG_IS_VALID(&ssp->desc)) { VERBOSE(("parse_selector: segment descriptor is invalid")); return -4; } + return 0; } -int -selector_is_not_present(selector_t* ssp) +int CPUCALL +selector_is_not_present(const selector_t *ssp) { + UINT32 h; + /* not present */ - if (!ssp->desc.p) { + if (!SEG_IS_PRESENT(&ssp->desc)) { VERBOSE(("selector_is_not_present: not present")); return -1; } - CPU_SET_SEGDESC_POSTPART(&ssp->desc); + + /* set access bit if code/data segment descriptor */ + if (!SEG_IS_SYSTEM(&ssp->desc)) { + h = cpu_kmemoryread_d(ssp->addr + 4); + if (!(h & CPU_SEGDESC_H_A)) { + h |= CPU_SEGDESC_H_A; + cpu_kmemorywrite_d(ssp->addr + 4, h); + } + } + return 0; } + +void CPUCALL +segdesc_init(int idx, UINT16 sreg, descriptor_t *sdp) +{ + + __ASSERT(((unsigned int)idx < CPU_SEGREG_NUM)); + __ASSERT((sdp != NULL)); + + CPU_REGS_SREG(idx) = sreg; + segdesc_clear(sdp); + segdesc_set_default(idx, sreg, sdp); +} + +static void CPUCALL +segdesc_set_default(int idx, UINT16 selector, descriptor_t *sdp) +{ + + __ASSERT(((unsigned int)idx < CPU_SEGREG_NUM)); + __ASSERT((sdp != NULL)); + + sdp->u.seg.segbase = (UINT32)selector << 4; + sdp->u.seg.limit = 0xffff; + sdp->u.seg.c = (idx == CPU_CS_INDEX) ? 1 : 0; /* code or data */ + sdp->u.seg.g = 0; /* non 4k factor scale */ + sdp->u.seg.wr = 1; /* execute/read(CS) or read/write(others) */ + sdp->u.seg.ec = 0; /* nonconforming(CS) or expand-up(others) */ + sdp->valid = 1; /* valid */ + sdp->p = 1; /* present */ + sdp->type = (CPU_SEGDESC_TYPE_WR << CPU_DESC_H_TYPE_SHIFT) + | ((idx == CPU_CS_INDEX) ? CPU_SEGDESC_H_D_C : 0); + /* readable code/writable data segment */ + sdp->dpl = CPU_STAT_VM86 ? 3 : 0; /* descriptor privilege level */ + sdp->rpl = CPU_STAT_VM86 ? 3 : 0; /* request privilege level */ + sdp->s = 1; /* code/data */ + sdp->d = 0; /* 16bit */ + sdp->flag = CPU_DESC_FLAG_READABLE|CPU_DESC_FLAG_WRITABLE; +}