| version 1.28, 2011/12/20 09:55:07 | version 1.30, 2011/12/29 13:32:12 | 
| Line 32 | Line 32 | 
 | #define TSS_32_SIZE     104 | #define TSS_32_SIZE     104 | 
 | #define TSS_32_LIMIT    (TSS_32_SIZE - 1) | #define TSS_32_LIMIT    (TSS_32_SIZE - 1) | 
 |  |  | 
| static void | static void CPUCALL | 
 | set_task_busy(UINT16 selector) | set_task_busy(UINT16 selector) | 
 | { | { | 
 | UINT32 addr; | UINT32 addr; | 
| Line 48  set_task_busy(UINT16 selector) | Line 48  set_task_busy(UINT16 selector) | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void | static void CPUCALL | 
 | set_task_free(UINT16 selector) | set_task_free(UINT16 selector) | 
 | { | { | 
 | UINT32 addr; | UINT32 addr; | 
| Line 64  set_task_free(UINT16 selector) | Line 64  set_task_free(UINT16 selector) | 
 | } | } | 
 | } | } | 
 |  |  | 
| void | void CPUCALL | 
 | load_tr(UINT16 selector) | load_tr(UINT16 selector) | 
 | { | { | 
 | selector_t task_sel; | selector_t task_sel; | 
| Line 136  load_tr(UINT16 selector) | Line 136  load_tr(UINT16 selector) | 
 | #endif | #endif | 
 | } | } | 
 |  |  | 
| void | void CPUCALL | 
 | get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp) | get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp) | 
 | { | { | 
 | UINT32 tss_stack_addr; | UINT32 tss_stack_addr; | 
| Line 190  get_backlink_selector_from_tss(void) | Line 190  get_backlink_selector_from_tss(void) | 
 | return backlink; | return backlink; | 
 | } | } | 
 |  |  | 
| void | void CPUCALL | 
 | task_switch(selector_t *task_sel, task_switch_type_t type) | task_switch(selector_t *task_sel, task_switch_type_t type) | 
 | { | { | 
 | UINT32 regs[CPU_REG_NUM]; | UINT32 regs[CPU_REG_NUM]; | 
| Line 201  task_switch(selector_t *task_sel, task_s | Line 201  task_switch(selector_t *task_sel, task_s | 
 | UINT16 ldtr; | UINT16 ldtr; | 
 | UINT16 iobase; | UINT16 iobase; | 
 | UINT16 t; | UINT16 t; | 
 | int new_cpl; |  | 
 |  |  | 
| selector_t sreg_sel[CPU_SEGREG_NUM]; | selector_t cs_sel, ss_sel; | 
| selector_t ldtr_sel; |  | 
 | int rv; | int rv; | 
 |  |  | 
 | UINT32 cur_base, cur_paddr;     /* current task state */ | UINT32 cur_base, cur_paddr;     /* current task state */ | 
| Line 438  task_switch(selector_t *task_sel, task_s | Line 436  task_switch(selector_t *task_sel, task_s | 
 | CPU_CR0 |= CPU_CR0_TS; | CPU_CR0 |= CPU_CR0_TS; | 
 |  |  | 
 | /* | /* | 
| * load task state (EIP, GPR, EFLAG, segreg, CR3, LDTR) | * load task state (CR3, EIP, GPR, segregs, LDTR, EFLAGS) | 
 | */ | */ | 
 |  |  | 
| /* set new EIP, GPR */ | /* set new CR3 */ | 
|  | if (!task16 && CPU_STAT_PAGING) { | 
|  | set_cr3(cr3); | 
|  | } | 
|  |  | 
|  | /* set new EIP, GPR, segregs */ | 
 | CPU_EIP = eip; | CPU_EIP = eip; | 
 | for (i = 0; i < CPU_REG_NUM; i++) { | for (i = 0; i < CPU_REG_NUM; i++) { | 
 | CPU_REGS_DWORD(i) = regs[i]; | CPU_REGS_DWORD(i) = regs[i]; | 
 | } | } | 
 |  |  | 
 | CPU_CLEAR_PREV_ESP(); |  | 
 |  |  | 
 | /* set new EFLAGS */ |  | 
 | set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG); |  | 
 |  |  | 
 | /* check new segregs, ldtr */ |  | 
 | for (i = 0; i < CPU_SEGREG_NUM; i++) { |  | 
 | rv = parse_selector(&sreg_sel[i], sreg[i]); |  | 
 | if (rv < 0) { |  | 
 | VERBOSE(("task_switch: selector parse failure: index=%d (sel = 0x%04x, rv = %d)", i, sreg[i], rv)); |  | 
 | EXCEPTION(TS_EXCEPTION, sreg_sel[i].idx); |  | 
 | } |  | 
 | } |  | 
 | rv = parse_selector(&ldtr_sel, ldtr); |  | 
 | if (rv < 0) { |  | 
 | VERBOSE(("task_switch: LDTR selector parse failure (sel = 0x%04x, rv = %d)", ldtr, rv)); |  | 
 | EXCEPTION(TS_EXCEPTION, ldtr_sel.idx); |  | 
 | } |  | 
 |  |  | 
 | /* invalidate segreg, ldtr descriptor */ |  | 
 | for (i = 0; i < CPU_SEGREG_NUM; i++) { | for (i = 0; i < CPU_SEGREG_NUM; i++) { | 
 |  | segdesc_init(i, sreg[i], &CPU_STAT_SREG(i)); | 
 |  | /* invalidate segreg descriptor */ | 
 | CPU_STAT_SREG(i).valid = 0; | CPU_STAT_SREG(i).valid = 0; | 
 | } | } | 
 | CPU_LDTR_DESC.valid = 0; |  | 
 |  |  | 
| /* set new CR3 */ | CPU_CLEAR_PREV_ESP(); | 
| if (!task16 && CPU_STAT_PAGING) { |  | 
| set_cr3(cr3); |  | 
| } |  | 
 |  |  | 
 | /* load new LDTR */ | /* load new LDTR */ | 
 |  | CPU_LDTR_DESC.valid = 0; | 
 | load_ldtr(ldtr, TS_EXCEPTION); | load_ldtr(ldtr, TS_EXCEPTION); | 
 |  |  | 
 | /* I/O deny bitmap */ | /* I/O deny bitmap */ | 
| Line 504  task_switch(selector_t *task_sel, task_s | Line 485  task_switch(selector_t *task_sel, task_s | 
 | } | } | 
 | #endif | #endif | 
 |  |  | 
 |  | /* set new EFLAGS */ | 
 |  | set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG); | 
 |  |  | 
 | /* set new segment register */ | /* set new segment register */ | 
| new_cpl = sreg_sel[CPU_CS_INDEX].rpl; | if (!CPU_STAT_VM86) { | 
| if (CPU_STAT_VM86) { |  | 
| load_ss(sreg_sel[CPU_SS_INDEX].selector, |  | 
| &sreg_sel[CPU_SS_INDEX].desc, new_cpl); |  | 
| LOAD_SEGREG1(CPU_ES_INDEX, sreg_sel[CPU_ES_INDEX].selector, |  | 
| TS_EXCEPTION); |  | 
| LOAD_SEGREG1(CPU_DS_INDEX, sreg_sel[CPU_DS_INDEX].selector, |  | 
| TS_EXCEPTION); |  | 
| LOAD_SEGREG1(CPU_FS_INDEX, sreg_sel[CPU_FS_INDEX].selector, |  | 
| TS_EXCEPTION); |  | 
| LOAD_SEGREG1(CPU_GS_INDEX, sreg_sel[CPU_GS_INDEX].selector, |  | 
| TS_EXCEPTION); |  | 
| load_cs(sreg_sel[CPU_CS_INDEX].selector, |  | 
| &sreg_sel[CPU_CS_INDEX].desc, new_cpl); |  | 
| } else { |  | 
 | /* load SS */ | /* load SS */ | 
 |  | rv = parse_selector(&ss_sel, sreg[CPU_SS_INDEX]); | 
 |  | if (rv < 0) { | 
 |  | VERBOSE(("task_switch: load SS failure (sel = 0x%04x, rv = %d)", sreg[CPU_SS_INDEX], rv)); | 
 |  | EXCEPTION(TS_EXCEPTION, ss_sel.idx); | 
 |  | } | 
 |  |  | 
 | /* SS must be writable data segment */ | /* SS must be writable data segment */ | 
| if (SEG_IS_SYSTEM(&sreg_sel[CPU_SS_INDEX].desc) | if (SEG_IS_SYSTEM(&ss_sel.desc) | 
| || SEG_IS_CODE(&sreg_sel[CPU_SS_INDEX].desc) | || SEG_IS_CODE(&ss_sel.desc) | 
| || !SEG_IS_WRITABLE_DATA(&sreg_sel[CPU_SS_INDEX].desc)) { | || !SEG_IS_WRITABLE_DATA(&ss_sel.desc)) { | 
| EXCEPTION(TS_EXCEPTION, sreg_sel[CPU_SS_INDEX].idx); | EXCEPTION(TS_EXCEPTION, ss_sel.idx); | 
 | } | } | 
 |  |  | 
 | /* check privilege level */ | /* check privilege level */ | 
| if ((sreg_sel[CPU_SS_INDEX].desc.dpl != new_cpl) | if ((ss_sel.desc.dpl != cs_sel.rpl) | 
| || (sreg_sel[CPU_SS_INDEX].desc.dpl != new_cpl)) { | || (ss_sel.desc.dpl != ss_sel.rpl)) { | 
| EXCEPTION(TS_EXCEPTION, sreg_sel[CPU_SS_INDEX].idx); | EXCEPTION(TS_EXCEPTION, ss_sel.idx); | 
 | } | } | 
 |  |  | 
 | /* stack segment is not present */ | /* stack segment is not present */ | 
| rv = selector_is_not_present(&sreg_sel[CPU_SS_INDEX]); | rv = selector_is_not_present(&ss_sel); | 
 | if (rv < 0) { | if (rv < 0) { | 
| EXCEPTION(SS_EXCEPTION, sreg_sel[CPU_SS_INDEX].idx); | EXCEPTION(SS_EXCEPTION, ss_sel.idx); | 
 | } | } | 
 |  |  | 
 | /* Now loading SS register */ | /* Now loading SS register */ | 
| load_ss(sreg_sel[CPU_SS_INDEX].selector, | load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.rpl); | 
| &sreg_sel[CPU_SS_INDEX].desc, new_cpl); |  | 
 |  |  | 
 | /* load ES, DS, FS, GS segment register */ | /* load ES, DS, FS, GS segment register */ | 
| LOAD_SEGREG1(CPU_ES_INDEX, sreg_sel[CPU_ES_INDEX].selector, | LOAD_SEGREG1(CPU_ES_INDEX, sreg[CPU_ES_INDEX], TS_EXCEPTION); | 
| TS_EXCEPTION); | LOAD_SEGREG1(CPU_DS_INDEX, sreg[CPU_DS_INDEX], TS_EXCEPTION); | 
| LOAD_SEGREG1(CPU_DS_INDEX, sreg_sel[CPU_DS_INDEX].selector, | LOAD_SEGREG1(CPU_FS_INDEX, sreg[CPU_FS_INDEX], TS_EXCEPTION); | 
| TS_EXCEPTION); | LOAD_SEGREG1(CPU_GS_INDEX, sreg[CPU_GS_INDEX], TS_EXCEPTION); | 
| LOAD_SEGREG1(CPU_FS_INDEX, sreg_sel[CPU_FS_INDEX].selector, |  | 
| TS_EXCEPTION); |  | 
| LOAD_SEGREG1(CPU_GS_INDEX, sreg_sel[CPU_GS_INDEX].selector, |  | 
| TS_EXCEPTION); |  | 
 |  |  | 
 | /* load CS */ | /* load CS */ | 
 |  | rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]); | 
 |  | if (rv < 0) { | 
 |  | VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv)); | 
 |  | EXCEPTION(TS_EXCEPTION, cs_sel.idx); | 
 |  | } | 
 |  |  | 
 | /* CS must be code segment */ | /* CS must be code segment */ | 
| if (SEG_IS_SYSTEM(&sreg_sel[CPU_CS_INDEX].desc) | if (SEG_IS_SYSTEM(&cs_sel.desc) || SEG_IS_DATA(&cs_sel.desc)) { | 
| || SEG_IS_DATA(&sreg_sel[CPU_CS_INDEX].desc)) { | EXCEPTION(TS_EXCEPTION, cs_sel.idx); | 
| EXCEPTION(TS_EXCEPTION, sreg_sel[CPU_CS_INDEX].idx); |  | 
 | } | } | 
 |  |  | 
 | /* check privilege level */ | /* check privilege level */ | 
| if (!SEG_IS_CONFORMING_CODE(&sreg_sel[CPU_CS_INDEX].desc)) { | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc)) { | 
 | /* non-confirming code segment */ | /* non-confirming code segment */ | 
| if (sreg_sel[CPU_CS_INDEX].desc.dpl != new_cpl) { | if (cs_sel.desc.dpl != cs_sel.rpl) { | 
| EXCEPTION(TS_EXCEPTION, sreg_sel[CPU_CS_INDEX].idx); | EXCEPTION(TS_EXCEPTION, cs_sel.idx); | 
 | } | } | 
 | } else { | } else { | 
 | /* conforming code segment */ | /* conforming code segment */ | 
| if (sreg_sel[CPU_CS_INDEX].desc.dpl > new_cpl) { | if (cs_sel.desc.dpl > cs_sel.rpl) { | 
| EXCEPTION(TS_EXCEPTION, sreg_sel[CPU_CS_INDEX].idx); | EXCEPTION(TS_EXCEPTION, cs_sel.idx); | 
 | } | } | 
 | } | } | 
 |  |  | 
 | /* code segment is not present */ | /* code segment is not present */ | 
| rv = selector_is_not_present(&sreg_sel[CPU_CS_INDEX]); | rv = selector_is_not_present(&cs_sel); | 
 | if (rv < 0) { | if (rv < 0) { | 
| EXCEPTION(NP_EXCEPTION, sreg_sel[CPU_CS_INDEX].idx); | EXCEPTION(NP_EXCEPTION, cs_sel.idx); | 
 | } | } | 
 |  |  | 
 | /* Now loading CS register */ | /* Now loading CS register */ | 
| load_cs(sreg_sel[CPU_CS_INDEX].selector, | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl); | 
| &sreg_sel[CPU_CS_INDEX].desc, new_cpl); |  | 
 | } | } | 
 |  |  | 
 | VERBOSE(("task_switch: done.")); | VERBOSE(("task_switch: done.")); |