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| version 1.29, 2011/12/23 04:16:51 | version 1.32, 2012/01/08 07:48:22 |
|---|---|
| Line 32 | Line 32 |
| #define TSS_32_SIZE 104 | #define TSS_32_SIZE 104 |
| #define TSS_32_LIMIT (TSS_32_SIZE - 1) | #define TSS_32_LIMIT (TSS_32_SIZE - 1) |
| static void | static void CPUCALL |
| set_task_busy(UINT16 selector) | set_task_busy(UINT16 selector) |
| { | { |
| UINT32 addr; | UINT32 addr; |
| Line 48 set_task_busy(UINT16 selector) | Line 48 set_task_busy(UINT16 selector) |
| } | } |
| } | } |
| static void | static void CPUCALL |
| set_task_free(UINT16 selector) | set_task_free(UINT16 selector) |
| { | { |
| UINT32 addr; | UINT32 addr; |
| Line 64 set_task_free(UINT16 selector) | Line 64 set_task_free(UINT16 selector) |
| } | } |
| } | } |
| void | void CPUCALL |
| load_tr(UINT16 selector) | load_tr(UINT16 selector) |
| { | { |
| selector_t task_sel; | selector_t task_sel; |
| Line 136 load_tr(UINT16 selector) | Line 136 load_tr(UINT16 selector) |
| #endif | #endif |
| } | } |
| void | void CPUCALL |
| get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp) | get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp) |
| { | { |
| UINT32 tss_stack_addr; | UINT32 tss_stack_addr; |
| VERBOSE(("get_stack_pointer_from_tss: pl = %d", pl)); | VERBOSE(("get_stack_pointer_from_tss: pl = %d", pl)); |
| VERBOSE(("CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT)); | VERBOSE(("get_stack_pointer_from_tss: CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT)); |
| __ASSERT(pl < 3); | __ASSERT(pl < 3); |
| Line 165 get_stack_pointer_from_tss(UINT pl, UINT | Line 165 get_stack_pointer_from_tss(UINT pl, UINT |
| } else { | } else { |
| ia32_panic("get_stack_pointer_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); | ia32_panic("get_stack_pointer_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); |
| } | } |
| VERBOSE(("new stack pointer = %04x:%08x", *new_ss, *new_esp)); | VERBOSE(("get_stack_pointer_from_tss: new stack pointer = %04x:%08x", *new_ss, *new_esp)); |
| } | } |
| UINT16 | UINT16 |
| Line 190 get_backlink_selector_from_tss(void) | Line 190 get_backlink_selector_from_tss(void) |
| return backlink; | return backlink; |
| } | } |
| void | void CPUCALL |
| task_switch(selector_t *task_sel, task_switch_type_t type) | task_switch(selector_t *task_sel, task_switch_type_t type) |
| { | { |
| UINT32 regs[CPU_REG_NUM]; | UINT32 regs[CPU_REG_NUM]; |
| Line 201 task_switch(selector_t *task_sel, task_s | Line 201 task_switch(selector_t *task_sel, task_s |
| UINT16 ldtr; | UINT16 ldtr; |
| UINT16 iobase; | UINT16 iobase; |
| UINT16 t; | UINT16 t; |
| int new_cpl; | |
| selector_t cs_sel, ss_sel; | selector_t cs_sel, ss_sel; |
| int rv; | int rv; |
| Line 491 task_switch(selector_t *task_sel, task_s | Line 490 task_switch(selector_t *task_sel, task_s |
| /* set new segment register */ | /* set new segment register */ |
| if (!CPU_STAT_VM86) { | if (!CPU_STAT_VM86) { |
| /* load CS */ | |
| rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]); | |
| if (rv < 0) { | |
| VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv)); | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| /* CS must be code segment */ | |
| if (SEG_IS_SYSTEM(&cs_sel.desc) || SEG_IS_DATA(&cs_sel.desc)) { | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| /* check privilege level */ | |
| if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc)) { | |
| /* non-confirming code segment */ | |
| if (cs_sel.desc.dpl != cs_sel.rpl) { | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| } else { | |
| /* conforming code segment */ | |
| if (cs_sel.desc.dpl > cs_sel.rpl) { | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| } | |
| /* code segment is not present */ | |
| rv = selector_is_not_present(&cs_sel); | |
| if (rv < 0) { | |
| EXCEPTION(NP_EXCEPTION, cs_sel.idx); | |
| } | |
| /* load SS */ | /* load SS */ |
| rv = parse_selector(&ss_sel, sreg[CPU_SS_INDEX]); | rv = parse_selector(&ss_sel, sreg[CPU_SS_INDEX]); |
| if (rv < 0) { | if (rv < 0) { |
| Line 526 task_switch(selector_t *task_sel, task_s | Line 556 task_switch(selector_t *task_sel, task_s |
| LOAD_SEGREG1(CPU_FS_INDEX, sreg[CPU_FS_INDEX], TS_EXCEPTION); | LOAD_SEGREG1(CPU_FS_INDEX, sreg[CPU_FS_INDEX], TS_EXCEPTION); |
| LOAD_SEGREG1(CPU_GS_INDEX, sreg[CPU_GS_INDEX], TS_EXCEPTION); | LOAD_SEGREG1(CPU_GS_INDEX, sreg[CPU_GS_INDEX], TS_EXCEPTION); |
| /* load CS */ | |
| rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]); | |
| if (rv < 0) { | |
| VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv)); | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| /* CS must be code segment */ | |
| if (SEG_IS_SYSTEM(&cs_sel.desc) || SEG_IS_DATA(&cs_sel.desc)) { | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| /* check privilege level */ | |
| if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc)) { | |
| /* non-confirming code segment */ | |
| if (cs_sel.desc.dpl != cs_sel.rpl) { | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| } else { | |
| /* conforming code segment */ | |
| if (cs_sel.desc.dpl > cs_sel.rpl) { | |
| EXCEPTION(TS_EXCEPTION, cs_sel.idx); | |
| } | |
| } | |
| /* code segment is not present */ | |
| rv = selector_is_not_present(&cs_sel); | |
| if (rv < 0) { | |
| EXCEPTION(NP_EXCEPTION, cs_sel.idx); | |
| } | |
| /* Now loading CS register */ | /* Now loading CS register */ |
| load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl); | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl); |
| } | } |