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version 1.5, 2004/01/23 14:33:26
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version 1.6, 2004/01/26 15:23:55
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Line 104 get_stack_from_tss(DWORD pl, WORD *new_s
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Line 104 get_stack_from_tss(DWORD pl, WORD *new_s
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| ia32_panic("get_stack_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); |
ia32_panic("get_stack_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); |
| } |
} |
| |
|
| VERBOSE(("get_stack_from_tss: new_esp = 0x%08x, new_ss = 0x%04x", *new_esp, *new_ss)); |
VERBOSE(("get_stack_from_tss: pl = %d, new_esp = 0x%08x, new_ss = 0x%04x", pl, *new_esp, *new_ss)); |
| } |
} |
| |
|
| WORD |
WORD |
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Line 205 task_switch(selector_t* task_sel, int ty
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Line 205 task_switch(selector_t* task_sel, int ty
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| /* load task state */ |
/* load task state */ |
| memset(sreg, 0, sizeof(sreg)); |
memset(sreg, 0, sizeof(sreg)); |
| if (!task16) { |
if (!task16) { |
| if (CPU_STAT_PAGING) { |
cr3 = cpu_lmemoryread_d(task_base + 28); |
| cr3 = cpu_lmemoryread_d(task_base + 28); |
|
| } |
|
| eip = cpu_lmemoryread_d(task_base + 32); |
eip = cpu_lmemoryread_d(task_base + 32); |
| new_flags = cpu_lmemoryread_d(task_base + 36); |
new_flags = cpu_lmemoryread_d(task_base + 36); |
| for (i = 0; i < CPU_REG_NUM; i++) { |
for (i = 0; i < CPU_REG_NUM; i++) { |
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Line 357 task_switch(selector_t* task_sel, int ty
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Line 355 task_switch(selector_t* task_sel, int ty
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| CPU_TR_DESC = task_sel->desc; |
CPU_TR_DESC = task_sel->desc; |
| |
|
| /* load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR) */ |
/* load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR) */ |
| |
|
| |
/* set new CR3 */ |
| if (!task16) { |
if (!task16) { |
| set_CR3(cr3); |
set_CR3(cr3); |
| } |
} |
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