--- np2/i386c/ia32/task.c	2004/03/12 13:34:08	1.17
+++ np2/i386c/ia32/task.c	2005/03/12 12:32:54	1.20
@@ -1,4 +1,4 @@
-/*	$Id: task.c,v 1.17 2004/03/12 13:34:08 monaka Exp $	*/
+/*	$Id: task.c,v 1.20 2005/03/12 12:32:54 monaka Exp $	*/
 
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
@@ -12,8 +12,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -37,7 +35,9 @@ load_tr(UINT16 selector)
 {
 	selector_t task_sel;
 	int rv;
+#if defined(IA32_SUPPORT_DEBUG_REGISTER)
 	int i;
+#endif
 	UINT16 iobase;
 
 	rv = parse_selector(&task_sel, selector);
@@ -63,8 +63,7 @@ load_tr(UINT16 selector)
 
 	default:
 		EXCEPTION(GP_EXCEPTION, task_sel.idx);
-		iobase = 0;	/* compiler happy */
-		break;
+		return;
 	}
 
 	/* not present */
@@ -93,14 +92,16 @@ load_tr(UINT16 selector)
 		CPU_STAT_IOLIMIT = 0;
 	}
 
+#if defined(IA32_SUPPORT_DEBUG_REGISTER)
 	/* clear local break point flags */
-	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3));
+	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
 	CPU_STAT_BP = 0;
 	for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
 		if (CPU_DR7 & CPU_DR7_G(i)) {
 			CPU_STAT_BP |= (1 << i);
 		}
 	}
+#endif
 }
 
 void
@@ -222,8 +223,8 @@ task_switch(selector_t *task_sel, task_s
 
 	if (CPU_STAT_PAGING) {
 		/* task state paging check */
-		paging_check(cur_base, CPU_TR_DESC.u.seg.limit, CPU_PAGE_WRITE_DATA, CPU_MODE_SUPERVISER);
-		paging_check(task_base, task_sel->desc.u.seg.limit, CPU_PAGE_WRITE_DATA, CPU_MODE_SUPERVISER);
+		paging_check(cur_base, CPU_TR_DESC.u.seg.limit, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
+		paging_check(task_base, task_sel->desc.u.seg.limit, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
 	}
 
 	/* load task state */
@@ -458,7 +459,7 @@ task_switch(selector_t *task_sel, task_s
 	}
 
 	/* clear local break point flags */
-	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3));
+	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
 	CPU_STAT_BP = 0;
 	for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
 		if (CPU_DR7 & CPU_DR7_G(i)) {