--- np2/i386c/ia32/task.c	2004/03/23 15:29:34	1.18
+++ np2/i386c/ia32/task.c	2008/03/22 04:03:08	1.23
@@ -1,4 +1,4 @@
-/*	$Id: task.c,v 1.18 2004/03/23 15:29:34 monaka Exp $	*/
+/*	$Id: task.c,v 1.23 2008/03/22 04:03:08 monaka Exp $	*/
 
 /*
  * Copyright (c) 2003 NONAKA Kimihiro
@@ -12,8 +12,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -31,6 +29,42 @@
 #include "cpu.h"
 #include "ia32.mcr"
 
+#define	TSS_SIZE_16	44
+#define	TSS_SIZE_32	108
+
+static void
+set_task_busy(UINT16 selector, descriptor_t *sdp)
+{
+	UINT32 addr;
+	UINT32 h;
+
+	addr = CPU_GDTR_BASE + (selector & CPU_SEGMENT_SELECTOR_INDEX_MASK);
+	h = cpu_kmemoryread_d(addr + 4);
+	if (!(h & CPU_TSS_H_BUSY)) {
+		sdp->type |= CPU_SYSDESC_TYPE_TSS_BUSY_IND;
+		h |= CPU_TSS_H_BUSY;
+		cpu_kmemorywrite_d(addr + 4, h);
+	} else {
+		ia32_panic("set_task_busy: already busy(%04x:%08x)",selector,h);
+	}
+}
+
+static void
+set_task_free(UINT16 selector, descriptor_t *sdp)
+{
+	UINT32 addr;
+	UINT32 h;
+
+	addr = CPU_GDTR_BASE + (selector & CPU_SEGMENT_SELECTOR_INDEX_MASK);
+	h = cpu_kmemoryread_d(addr + 4);
+	if (h & CPU_TSS_H_BUSY) {
+		sdp->type &= ~CPU_SYSDESC_TYPE_TSS_BUSY_IND;
+		h &= ~CPU_TSS_H_BUSY;
+		cpu_kmemorywrite_d(addr + 4, h);
+	} else {
+		ia32_panic("set_task_free: already free(%04x:%08x)",selector,h);
+	}
+}
 
 void
 load_tr(UINT16 selector)
@@ -43,21 +77,21 @@ load_tr(UINT16 selector)
 	UINT16 iobase;
 
 	rv = parse_selector(&task_sel, selector);
-	if (rv < 0 || task_sel.ldt || task_sel.desc.s) {
+	if (rv < 0 || task_sel.ldt || !SEG_IS_SYSTEM(&task_sel.desc)) {
 		EXCEPTION(GP_EXCEPTION, task_sel.idx);
 	}
 
 	/* check descriptor type & stack room size */
 	switch (task_sel.desc.type) {
 	case CPU_SYSDESC_TYPE_TSS_16:
-		if (task_sel.desc.u.seg.limit < 0x2b) {
+		if (task_sel.desc.u.seg.limit < TSS_SIZE_16) {
 			EXCEPTION(TS_EXCEPTION, task_sel.idx);
 		}
 		iobase = 0;
 		break;
 
 	case CPU_SYSDESC_TYPE_TSS_32:
-		if (task_sel.desc.u.seg.limit < 0x67) {
+		if (task_sel.desc.u.seg.limit < TSS_SIZE_32) {
 			EXCEPTION(TS_EXCEPTION, task_sel.idx);
 		}
 		iobase = cpu_kmemoryread_w(task_sel.desc.u.seg.segbase + 102);
@@ -78,20 +112,17 @@ load_tr(UINT16 selector)
 	tr_dump(task_sel.selector, task_sel.desc.u.seg.segbase, task_sel.desc.u.seg.limit);
 #endif
 
-	CPU_SET_TASK_BUSY(task_sel.selector, &task_sel.desc);
+	set_task_busy(task_sel.selector, &task_sel.desc);
 	CPU_TR = task_sel.selector;
 	CPU_TR_DESC = task_sel.desc;
 
 	/* I/O deny bitmap */
+	CPU_STAT_IOLIMIT = 0;
 	if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
 		if (iobase != 0 && iobase < task_sel.desc.u.seg.limit) {
 			CPU_STAT_IOLIMIT = (UINT16)(task_sel.desc.u.seg.limit - iobase);
 			CPU_STAT_IOADDR = task_sel.desc.u.seg.segbase + iobase;
-		} else {
-			CPU_STAT_IOLIMIT = 0;
 		}
-	} else {
-		CPU_STAT_IOLIMIT = 0;
 	}
 
 #if defined(IA32_SUPPORT_DEBUG_REGISTER)
@@ -111,29 +142,31 @@ get_stack_pointer_from_tss(UINT pl, UINT
 {
 	UINT32 tss_stack_addr;
 
+	VERBOSE(("get_stack_pointer_from_tss: pl = %d", pl));
+	VERBOSE(("CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT));
+
 	__ASSERT(pl < 3);
 
 	if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
 		tss_stack_addr = pl * 8 + 4;
-		if (tss_stack_addr + 7 > CPU_TR_DESC.u.seg.limit) {
+		if (tss_stack_addr + 7 > CPU_TR_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, CPU_TR & ~3);
 		}
-		tss_stack_addr += CPU_TR_DESC.u.seg.segbase;
+		tss_stack_addr += CPU_TR_BASE;
 		*new_esp = cpu_kmemoryread_d(tss_stack_addr);
 		*new_ss = cpu_kmemoryread_w(tss_stack_addr + 4);
 	} else if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_16) {
 		tss_stack_addr = pl * 4 + 2;
-		if (tss_stack_addr + 3 > CPU_TR_DESC.u.seg.limit) {
+		if (tss_stack_addr + 3 > CPU_TR_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, CPU_TR & ~3);
 		}
-		tss_stack_addr += CPU_TR_DESC.u.seg.segbase;
+		tss_stack_addr += CPU_TR_BASE;
 		*new_esp = cpu_kmemoryread_w(tss_stack_addr);
 		*new_ss = cpu_kmemoryread_w(tss_stack_addr + 2);
 	} else {
 		ia32_panic("get_stack_pointer_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type);
 	}
-
-	VERBOSE(("get_stack_pointer_from_tss: pl = %d, new_esp = 0x%08x, new_ss = 0x%04x", pl, *new_esp, *new_ss));
+	VERBOSE(("new stack pointer = %04x:%08x", *new_ss, *new_esp));
 }
 
 UINT16
@@ -142,18 +175,18 @@ get_backlink_selector_from_tss(void)
 	UINT16 backlink;
 
 	if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
-		if (4 > CPU_TR_DESC.u.seg.limit) {
+		if (4 > CPU_TR_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, CPU_TR & ~3);
 		}
 	} else if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_16) {
-		if (2 > CPU_TR_DESC.u.seg.limit) {
+		if (2 > CPU_TR_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, CPU_TR & ~3);
 		}
 	} else {
-		ia32_panic("get_backlink_selector_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type);
+		ia32_panic("get_backlink_selector_from_tss: task register has invalid type (%d)\n", CPU_TR_DESC.type);
 	}
 
-	backlink = cpu_kmemoryread_w(CPU_TR_DESC.u.seg.segbase);
+	backlink = cpu_kmemoryread_w(CPU_TR_BASE);
 	VERBOSE(("get_backlink_selector_from_tss: backlink selector = 0x%04x", backlink));
 	return backlink;
 }
@@ -170,44 +203,45 @@ task_switch(selector_t *task_sel, task_s
 	UINT16 iobase;
 	UINT16 t;
 
-	selector_t cs_sel;
+	selector_t cs_sel, ss_sel;
 	int rv;
 
-	UINT32 cur_base;	/* current task state */
-	UINT32 task_base;	/* new task state */
+	UINT32 cur_base, cur_paddr;	/* current task state */
+	UINT32 task_base, task_paddr;	/* new task state */
 	UINT32 old_flags = REAL_EFLAGREG;
 	BOOL task16;
 	UINT i;
 
 	VERBOSE(("task_switch: start"));
 
-	/* limit check */
 	switch (task_sel->desc.type) {
 	case CPU_SYSDESC_TYPE_TSS_32:
 	case CPU_SYSDESC_TYPE_TSS_BUSY_32:
-		if (task_sel->desc.u.seg.limit < 0x67) {
+		if (task_sel->desc.u.seg.limit < TSS_SIZE_32) {
 			EXCEPTION(TS_EXCEPTION, task_sel->idx);
 		}
-		task16 = FALSE;
+		task16 = 0;
 		break;
 
 	case CPU_SYSDESC_TYPE_TSS_16:
 	case CPU_SYSDESC_TYPE_TSS_BUSY_16:
-		if (task_sel->desc.u.seg.limit < 0x2b) {
+		if (task_sel->desc.u.seg.limit < TSS_SIZE_16) {
 			EXCEPTION(TS_EXCEPTION, task_sel->idx);
 		}
-		task16 = TRUE;
+		task16 = 1;
 		break;
 
 	default:
 		ia32_panic("task_switch: descriptor type is invalid.");
-		task16 = FALSE;		/* compiler happy */
+		task16 = 0;		/* compiler happy */
 		break;
 	}
 
-	cur_base = CPU_TR_DESC.u.seg.segbase;
+	cur_base = CPU_TR_BASE;
+	cur_paddr = laddr_to_paddr(cur_base, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
 	task_base = task_sel->desc.u.seg.segbase;
-	VERBOSE(("task_switch: cur task (%04x) = 0x%08x:%08x", CPU_TR, cur_base, CPU_TR_DESC.u.seg.limit));
+	task_paddr = laddr_to_paddr(task_base, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
+	VERBOSE(("task_switch: current task (%04x) = 0x%08x:%08x", CPU_TR, cur_base, CPU_TR_LIMIT));
 	VERBOSE(("task_switch: new task (%04x) = 0x%08x:%08x", task_sel->selector, task_base, task_sel->desc.u.seg.limit));
 	VERBOSE(("task_switch: %dbit task switch", task16 ? 16 : 32));
 
@@ -217,48 +251,42 @@ task_switch(selector_t *task_sel, task_s
 
 		VERBOSE(("task_switch: new task"));
 		for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) {
-			v = cpu_kmemoryread_d(task_base + i);
+			v = cpu_memoryread_d(task_paddr + i);
 			VERBOSE(("task_switch: 0x%08x: %08x", task_base + i,v));
 		}
 	}
 #endif
 
-	if (CPU_STAT_PAGING) {
-		/* task state paging check */
-		paging_check(cur_base, CPU_TR_DESC.u.seg.limit, CPU_PAGE_WRITE_DATA, CPU_MODE_SUPERVISER);
-		paging_check(task_base, task_sel->desc.u.seg.limit, CPU_PAGE_WRITE_DATA, CPU_MODE_SUPERVISER);
-	}
-
 	/* load task state */
 	memset(sreg, 0, sizeof(sreg));
 	if (!task16) {
 		if (CPU_STAT_PAGING) {
-			cr3 = cpu_kmemoryread_d(task_base + 28);
+			cr3 = cpu_memoryread_d(task_paddr + 28);
 		}
-		eip = cpu_kmemoryread_d(task_base + 32);
-		new_flags = cpu_kmemoryread_d(task_base + 36);
+		eip = cpu_memoryread_d(task_paddr + 32);
+		new_flags = cpu_memoryread_d(task_paddr + 36);
 		for (i = 0; i < CPU_REG_NUM; i++) {
-			regs[i] = cpu_kmemoryread_d(task_base + 40 + i * 4);
+			regs[i] = cpu_memoryread_d(task_paddr + 40 + i * 4);
 		}
 		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			sreg[i] = cpu_kmemoryread_w(task_base + 72 + i * 4);
+			sreg[i] = cpu_memoryread_w(task_paddr + 72 + i * 4);
 		}
-		ldtr = cpu_kmemoryread_w(task_base + 96);
-		t = cpu_kmemoryread_w(task_base + 100);
+		ldtr = cpu_memoryread_w(task_paddr + 96);
+		t = cpu_memoryread_w(task_paddr + 100);
 		if (t & 1) {
 			CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_TASK;
 		}
-		iobase = cpu_kmemoryread_w(task_base + 102);
+		iobase = cpu_memoryread_w(task_paddr + 102);
 	} else {
-		eip = cpu_kmemoryread_w(task_base + 14);
-		new_flags = cpu_kmemoryread_w(task_base + 16);
+		eip = cpu_memoryread_w(task_paddr + 14);
+		new_flags = cpu_memoryread_w(task_paddr + 16);
 		for (i = 0; i < CPU_REG_NUM; i++) {
-			regs[i] = cpu_kmemoryread_w(task_base + 18 + i * 2);
+			regs[i] = cpu_memoryread_w(task_paddr + 18 + i * 2);
 		}
 		for (i = 0; i < CPU_SEGREG286_NUM; i++) {
-			sreg[i] = cpu_kmemoryread_w(task_base + 34 + i * 2);
+			sreg[i] = cpu_memoryread_w(task_paddr + 34 + i * 2);
 		}
-		ldtr = cpu_kmemoryread_w(task_base + 42);
+		ldtr = cpu_memoryread_w(task_paddr + 42);
 		iobase = 0;
 		t = 0;
 	}
@@ -306,7 +334,7 @@ task_switch(selector_t *task_sel, task_s
 		/*FALLTHROUGH*/
 	case TASK_SWITCH_JMP:
 		/* clear busy flags in current task */
-		CPU_SET_TASK_FREE(CPU_TR, &CPU_TR_DESC);
+		set_task_free(CPU_TR, &CPU_TR_DESC);
 		break;
 
 	case TASK_SWITCH_CALL:
@@ -319,45 +347,33 @@ task_switch(selector_t *task_sel, task_s
 		break;
 	}
 
-	/* save this task state in this task state segment */
+	/* store current task state in current TSS */
 	if (!task16) {
-		cpu_kmemorywrite_d(cur_base + 32, CPU_EIP);
-		cpu_kmemorywrite_d(cur_base + 36, old_flags);
+		cpu_memorywrite_d(cur_paddr + 32, CPU_EIP);
+		cpu_memorywrite_d(cur_paddr + 36, old_flags);
 		for (i = 0; i < CPU_REG_NUM; i++) {
-			cpu_kmemorywrite_d(cur_base + 40 + i * 4, CPU_REGS_DWORD(i));
+			cpu_memorywrite_d(cur_paddr + 40 + i * 4, CPU_REGS_DWORD(i));
 		}
 		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			cpu_kmemorywrite_w(cur_base + 72 + i * 4, CPU_REGS_SREG(i));
+			cpu_memorywrite_w(cur_paddr + 72 + i * 4, CPU_REGS_SREG(i));
 		}
 	} else {
-		cpu_kmemorywrite_w(cur_base + 14, CPU_IP);
-		cpu_kmemorywrite_w(cur_base + 16, (UINT16)old_flags);
+		cpu_memorywrite_w(cur_paddr + 14, CPU_IP);
+		cpu_memorywrite_w(cur_paddr + 16, (UINT16)old_flags);
 		for (i = 0; i < CPU_REG_NUM; i++) {
-			cpu_kmemorywrite_w(cur_base + 18 + i * 2, CPU_REGS_WORD(i));
+			cpu_memorywrite_w(cur_paddr + 18 + i * 2, CPU_REGS_WORD(i));
 		}
 		for (i = 0; i < CPU_SEGREG286_NUM; i++) {
-			cpu_kmemorywrite_w(cur_base + 34 + i * 2, CPU_REGS_SREG(i));
+			cpu_memorywrite_w(cur_paddr + 34 + i * 2, CPU_REGS_SREG(i));
 		}
 	}
 
-#if defined(MORE_DEBUG)
-	{
-		UINT32 v;
-
-		VERBOSE(("task_switch: current task"));
-		for (i = 0; i < CPU_TR_DESC.u.seg.limit; i += 4) {
-			v = cpu_kmemoryread_d(cur_base + i);
-			VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i, v));
-		}
-	}
-#endif
-
 	/* set back link selector */
 	switch (type) {
 	case TASK_SWITCH_CALL:
 	case TASK_SWITCH_INTR:
 		/* set back link selector */
-		cpu_kmemorywrite_w(task_base, CPU_TR);
+		cpu_memorywrite_w(task_paddr, CPU_TR);
 		break;
 	
 	case TASK_SWITCH_IRET:
@@ -370,6 +386,18 @@ task_switch(selector_t *task_sel, task_s
 		break;
 	}
 
+#if defined(MORE_DEBUG)
+	{
+		UINT32 v;
+
+		VERBOSE(("task_switch: current task"));
+		for (i = 0; i < CPU_TR_LIMIT; i += 4) {
+			v = cpu_memoryread_d(cur_paddr + i);
+			VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i, v));
+		}
+	}
+#endif
+
 	/* Now task switching! */
 
 	/* if CALL, INTR, set EFLAGS image NT_FLAG */
@@ -381,12 +409,12 @@ task_switch(selector_t *task_sel, task_s
 		new_flags |= NT_FLAG;
 		/*FALLTHROUGH*/
 	case TASK_SWITCH_JMP:
-		CPU_SET_TASK_BUSY(task_sel->selector, &task_sel->desc);
+		set_task_busy(task_sel->selector, &task_sel->desc);
 		break;
 	
 	case TASK_SWITCH_IRET:
 		/* check busy flag is active */
-		if (task_sel->desc.valid) {
+		if (SEG_IS_VALID(&task_sel->desc)) {
 			UINT32 h;
 			h = cpu_kmemoryread_d(task_sel->addr + 4);
 			if ((h & CPU_TSS_H_BUSY) == 0) {
@@ -400,57 +428,42 @@ task_switch(selector_t *task_sel, task_s
 		break;
 	}
 
-	/* set CR0 image CPU_CR0_TS */
-	CPU_CR0 |= CPU_CR0_TS;
-
 	/* load task selector to CPU_TR */
 	CPU_TR = task_sel->selector;
 	CPU_TR_DESC = task_sel->desc;
 
-	/* load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR) */
+	/* clear BUSY flag in descriptor cache */
+	CPU_TR_DESC.type &= ~CPU_SYSDESC_TYPE_TSS_BUSY_IND;
+
+	/* set CR0 image CPU_CR0_TS */
+	CPU_CR0 |= CPU_CR0_TS;
+
+	/*
+	 * load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR)
+	 */
 
 	/* set new CR3 */
 	if (!task16 && CPU_STAT_PAGING) {
-		set_CR3(cr3);
+		set_cr3(cr3);
 	}
 
 	/* set new EIP, GPR */
-	CPU_PREV_EIP = CPU_EIP = eip;
-	CPU_PREFETCH_CLEAR();
+	CPU_EIP = eip;
 	for (i = 0; i < CPU_REG_NUM; i++) {
 		CPU_REGS_DWORD(i) = regs[i];
 	}
 	for (i = 0; i < CPU_SEGREG_NUM; i++) {
-		CPU_REGS_SREG(i) = sreg[i];
-		CPU_STAT_SREG_INIT(i);
+		segdesc_init(i, sreg[i], &CPU_STAT_SREG(i));
 	}
 
-	/* set new EFLAGS */
-#if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION)
-	CPU_EFLAG = new_flags;
-	CPU_OV = CPU_FLAG & O_FLAG;
-	CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG);
-	if ((old_flags ^ CPU_EFLAG) & VM_FLAG) {
-		if (CPU_EFLAG & VM_FLAG) {
-			change_vm(1);
-		} else {
-			change_vm(0);
-		}
-	}
-#else
-	set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG);
-#endif
+	/* load new LDTR */
+	load_ldtr(ldtr, TS_EXCEPTION);
 
 	/* I/O deny bitmap */
-	if (!task16) {
-		if (iobase != 0 && iobase < task_sel->desc.u.seg.limit) {
-			CPU_STAT_IOLIMIT = (UINT16)(task_sel->desc.u.seg.limit - iobase);
-			CPU_STAT_IOADDR = task_sel->desc.u.seg.segbase + iobase;
-		} else {
-			CPU_STAT_IOLIMIT = 0;
-		}
-	} else {
-		CPU_STAT_IOLIMIT = 0;
+	CPU_STAT_IOLIMIT = 0;
+	if (!task16 && iobase != 0 && iobase < task_sel->desc.u.seg.limit) {
+		CPU_STAT_IOLIMIT = (UINT16)(task_sel->desc.u.seg.limit - iobase);
+		CPU_STAT_IOADDR = task_base + iobase;
 	}
 	VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR, CPU_STAT_IOLIMIT));
 
@@ -470,14 +483,14 @@ task_switch(selector_t *task_sel, task_s
 	}
 #endif
 
-	/* load new LDTR */
-	load_ldtr(ldtr, TS_EXCEPTION);
+	/* set new EFLAGS */
+	set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG);
 
 	/* set new segment register */
 	if (!CPU_STAT_VM86) {
 		/* clear segment descriptor cache */
 		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			CPU_STAT_SREG_CLEAR(i);
+			segdesc_clear(&CPU_STAT_SREG(i));
 		}
 
 		/* load CS */
@@ -487,20 +500,20 @@ task_switch(selector_t *task_sel, task_s
 			EXCEPTION(TS_EXCEPTION, cs_sel.idx);
 		}
 
-		/* CS register must be code segment */
-		if (!cs_sel.desc.s || !cs_sel.desc.u.seg.c) {
+		/* CS must be code segment */
+		if (SEG_IS_SYSTEM(&cs_sel.desc) || SEG_IS_DATA(&cs_sel.desc)) {
 			EXCEPTION(TS_EXCEPTION, cs_sel.idx);
 		}
 
 		/* check privilege level */
-		if (!cs_sel.desc.u.seg.ec) {
+		if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc)) {
 			/* non-confirming code segment */
 			if (cs_sel.desc.dpl != cs_sel.rpl) {
 				EXCEPTION(TS_EXCEPTION, cs_sel.idx);
 			}
 		} else {
-			/* confirming code segment */
-			if (cs_sel.desc.dpl < cs_sel.rpl) {
+			/* conforming code segment */
+			if (cs_sel.desc.dpl > cs_sel.rpl) {
 				EXCEPTION(TS_EXCEPTION, cs_sel.idx);
 			}
 		}
@@ -511,13 +524,40 @@ task_switch(selector_t *task_sel, task_s
 			EXCEPTION(NP_EXCEPTION, cs_sel.idx);
 		}
 
-		/* Now loading CS register */
-		load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);
+		/* load SS */
+		rv = parse_selector(&ss_sel, sreg[CPU_SS_INDEX]);
+		if (rv < 0) {
+			VERBOSE(("task_switch: load SS failure (sel = 0x%04x, rv = %d)", sreg[CPU_SS_INDEX], rv));
+			EXCEPTION(TS_EXCEPTION, ss_sel.idx);
+		}
+
+		/* SS must be writable data segment */
+		if (SEG_IS_SYSTEM(&ss_sel.desc)
+		 || SEG_IS_CODE(&ss_sel.desc)
+		 || !SEG_IS_WRITABLE_DATA(&ss_sel.desc)) {
+			EXCEPTION(TS_EXCEPTION, ss_sel.idx);
+		}
+
+		/* check privilege level */
+		if ((ss_sel.desc.dpl != cs_sel.rpl)
+		 || (ss_sel.desc.dpl != ss_sel.rpl)) {
+			EXCEPTION(TS_EXCEPTION, ss_sel.idx);
+		}
+
+		/* stack segment is not present */
+		rv = selector_is_not_present(&ss_sel);
+		if (rv < 0) {
+			EXCEPTION(SS_EXCEPTION, ss_sel.idx);
+		}
+
+		/* Now loading CS/SS register */
+		load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl);
+		load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.rpl);
 
-		/* load ES, SS, DS, FS, GS segment register */
+		/* load ES, DS, FS, GS segment register */
 		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			if (i != CPU_CS_INDEX) {
-				load_segreg(i, sreg[i], TS_EXCEPTION);
+			if (i != CPU_CS_INDEX || i != CPU_SS_INDEX) {
+				LOAD_SEGREG1(i, sreg[i], TS_EXCEPTION);
 			}
 		}
 	}