--- np2/i386c/ia32/task.c	2011/01/15 17:17:23	1.24
+++ np2/i386c/ia32/task.c	2012/01/08 11:36:06	1.33
@@ -27,11 +27,13 @@
 #include "cpu.h"
 #include "ia32.mcr"
 
-#define	TSS_SIZE_16	44
-#define	TSS_SIZE_32	108
+#define	TSS_16_SIZE	44
+#define	TSS_16_LIMIT	(TSS_16_SIZE - 1)
+#define	TSS_32_SIZE	104
+#define	TSS_32_LIMIT	(TSS_32_SIZE - 1)
 
-static void
-set_task_busy(UINT16 selector, descriptor_t *sdp)
+static void CPUCALL
+set_task_busy(UINT16 selector)
 {
 	UINT32 addr;
 	UINT32 h;
@@ -39,7 +41,6 @@ set_task_busy(UINT16 selector, descripto
 	addr = CPU_GDTR_BASE + (selector & CPU_SEGMENT_SELECTOR_INDEX_MASK);
 	h = cpu_kmemoryread_d(addr + 4);
 	if (!(h & CPU_TSS_H_BUSY)) {
-		sdp->type |= CPU_SYSDESC_TYPE_TSS_BUSY_IND;
 		h |= CPU_TSS_H_BUSY;
 		cpu_kmemorywrite_d(addr + 4, h);
 	} else {
@@ -47,8 +48,8 @@ set_task_busy(UINT16 selector, descripto
 	}
 }
 
-static void
-set_task_free(UINT16 selector, descriptor_t *sdp)
+static void CPUCALL
+set_task_free(UINT16 selector)
 {
 	UINT32 addr;
 	UINT32 h;
@@ -56,7 +57,6 @@ set_task_free(UINT16 selector, descripto
 	addr = CPU_GDTR_BASE + (selector & CPU_SEGMENT_SELECTOR_INDEX_MASK);
 	h = cpu_kmemoryread_d(addr + 4);
 	if (h & CPU_TSS_H_BUSY) {
-		sdp->type &= ~CPU_SYSDESC_TYPE_TSS_BUSY_IND;
 		h &= ~CPU_TSS_H_BUSY;
 		cpu_kmemorywrite_d(addr + 4, h);
 	} else {
@@ -64,14 +64,11 @@ set_task_free(UINT16 selector, descripto
 	}
 }
 
-void
+void CPUCALL
 load_tr(UINT16 selector)
 {
 	selector_t task_sel;
 	int rv;
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	int i;
-#endif
 	UINT16 iobase;
 
 	rv = parse_selector(&task_sel, selector);
@@ -82,14 +79,14 @@ load_tr(UINT16 selector)
 	/* check descriptor type & stack room size */
 	switch (task_sel.desc.type) {
 	case CPU_SYSDESC_TYPE_TSS_16:
-		if (task_sel.desc.u.seg.limit < TSS_SIZE_16) {
+		if (task_sel.desc.u.seg.limit < TSS_16_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, task_sel.idx);
 		}
 		iobase = 0;
 		break;
 
 	case CPU_SYSDESC_TYPE_TSS_32:
-		if (task_sel.desc.u.seg.limit < TSS_SIZE_32) {
+		if (task_sel.desc.u.seg.limit < TSS_32_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, task_sel.idx);
 		}
 		iobase = cpu_kmemoryread_w(task_sel.desc.u.seg.segbase + 102);
@@ -110,38 +107,28 @@ load_tr(UINT16 selector)
 	tr_dump(task_sel.selector, task_sel.desc.u.seg.segbase, task_sel.desc.u.seg.limit);
 #endif
 
-	set_task_busy(task_sel.selector, &task_sel.desc);
+	set_task_busy(task_sel.selector);
 	CPU_TR = task_sel.selector;
 	CPU_TR_DESC = task_sel.desc;
+	CPU_TR_DESC.type |= CPU_SYSDESC_TYPE_TSS_BUSY_IND;
 
 	/* I/O deny bitmap */
 	CPU_STAT_IOLIMIT = 0;
-	if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
-		if (iobase != 0 && iobase < task_sel.desc.u.seg.limit) {
-			CPU_STAT_IOLIMIT = (UINT16)(task_sel.desc.u.seg.limit - iobase);
-			CPU_STAT_IOADDR = task_sel.desc.u.seg.segbase + iobase;
-		}
-	}
-
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	/* clear local break point flags */
-	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
-	CPU_STAT_BP = 0;
-	for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
-		if (CPU_DR7 & CPU_DR7_G(i)) {
-			CPU_STAT_BP |= (1 << i);
+	if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
+		if (iobase != 0 && iobase < CPU_TR_DESC.u.seg.limit) {
+			CPU_STAT_IOLIMIT = (UINT16)(CPU_TR_DESC.u.seg.limit - iobase);
+			CPU_STAT_IOADDR = CPU_TR_DESC.u.seg.segbase + iobase;
 		}
 	}
-#endif
 }
 
-void
+void CPUCALL
 get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp)
 {
 	UINT32 tss_stack_addr;
 
 	VERBOSE(("get_stack_pointer_from_tss: pl = %d", pl));
-	VERBOSE(("CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT));
+	VERBOSE(("get_stack_pointer_from_tss: CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT));
 
 	__ASSERT(pl < 3);
 
@@ -164,7 +151,7 @@ get_stack_pointer_from_tss(UINT pl, UINT
 	} else {
 		ia32_panic("get_stack_pointer_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type);
 	}
-	VERBOSE(("new stack pointer = %04x:%08x", *new_ss, *new_esp));
+	VERBOSE(("get_stack_pointer_from_tss: new stack pointer = %04x:%08x", *new_ss, *new_esp));
 }
 
 UINT16
@@ -189,7 +176,7 @@ get_backlink_selector_from_tss(void)
 	return backlink;
 }
 
-void
+void CPUCALL
 task_switch(selector_t *task_sel, task_switch_type_t type)
 {
 	UINT32 regs[CPU_REG_NUM];
@@ -215,7 +202,7 @@ task_switch(selector_t *task_sel, task_s
 	switch (task_sel->desc.type) {
 	case CPU_SYSDESC_TYPE_TSS_32:
 	case CPU_SYSDESC_TYPE_TSS_BUSY_32:
-		if (task_sel->desc.u.seg.limit < TSS_SIZE_32) {
+		if (task_sel->desc.u.seg.limit < TSS_32_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, task_sel->idx);
 		}
 		task16 = 0;
@@ -223,7 +210,7 @@ task_switch(selector_t *task_sel, task_s
 
 	case CPU_SYSDESC_TYPE_TSS_16:
 	case CPU_SYSDESC_TYPE_TSS_BUSY_16:
-		if (task_sel->desc.u.seg.limit < TSS_SIZE_16) {
+		if (task_sel->desc.u.seg.limit < TSS_16_LIMIT) {
 			EXCEPTION(TS_EXCEPTION, task_sel->idx);
 		}
 		task16 = 1;
@@ -332,7 +319,7 @@ task_switch(selector_t *task_sel, task_s
 		/*FALLTHROUGH*/
 	case TASK_SWITCH_JMP:
 		/* clear busy flags in current task */
-		set_task_free(CPU_TR, &CPU_TR_DESC);
+		set_task_free(CPU_TR);
 		break;
 
 	case TASK_SWITCH_CALL:
@@ -407,9 +394,9 @@ task_switch(selector_t *task_sel, task_s
 		new_flags |= NT_FLAG;
 		/*FALLTHROUGH*/
 	case TASK_SWITCH_JMP:
-		set_task_busy(task_sel->selector, &task_sel->desc);
+		set_task_busy(task_sel->selector);
 		break;
-	
+
 	case TASK_SWITCH_IRET:
 		/* check busy flag is active */
 		if (SEG_IS_VALID(&task_sel->desc)) {
@@ -429,15 +416,13 @@ task_switch(selector_t *task_sel, task_s
 	/* load task selector to CPU_TR */
 	CPU_TR = task_sel->selector;
 	CPU_TR_DESC = task_sel->desc;
-
-	/* clear BUSY flag in descriptor cache */
-	CPU_TR_DESC.type &= ~CPU_SYSDESC_TYPE_TSS_BUSY_IND;
+	CPU_TR_DESC.type |= CPU_SYSDESC_TYPE_TSS_BUSY_IND;
 
 	/* set CR0 image CPU_CR0_TS */
 	CPU_CR0 |= CPU_CR0_TS;
 
 	/*
-	 * load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR)
+	 * load task state (CR3, EIP, GPR, segregs, LDTR, EFLAGS)
 	 */
 
 	/* set new CR3 */
@@ -445,52 +430,36 @@ task_switch(selector_t *task_sel, task_s
 		set_cr3(cr3);
 	}
 
-	/* set new EIP, GPR */
+	/* set new EIP, GPR, segregs */
 	CPU_EIP = eip;
 	for (i = 0; i < CPU_REG_NUM; i++) {
 		CPU_REGS_DWORD(i) = regs[i];
 	}
 	for (i = 0; i < CPU_SEGREG_NUM; i++) {
 		segdesc_init(i, sreg[i], &CPU_STAT_SREG(i));
+		/* invalidate segreg descriptor */
+		CPU_STAT_SREG(i).valid = 0;
 	}
 
+	CPU_CLEAR_PREV_ESP();
+
 	/* load new LDTR */
+	CPU_LDTR_DESC.valid = 0;
 	load_ldtr(ldtr, TS_EXCEPTION);
 
 	/* I/O deny bitmap */
 	CPU_STAT_IOLIMIT = 0;
-	if (!task16 && iobase != 0 && iobase < task_sel->desc.u.seg.limit) {
-		CPU_STAT_IOLIMIT = (UINT16)(task_sel->desc.u.seg.limit - iobase);
+	if (!task16 && iobase != 0 && iobase < CPU_TR_DESC.u.seg.limit) {
+		CPU_STAT_IOLIMIT = (UINT16)(CPU_TR_DESC.u.seg.limit - iobase);
 		CPU_STAT_IOADDR = task_base + iobase;
 	}
 	VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR, CPU_STAT_IOLIMIT));
 
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	/* check resume flag */
-	if (CPU_EFLAG & RF_FLAG) {
-		CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_RF;
-	}
-
-	/* clear local break point flags */
-	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
-	CPU_STAT_BP = 0;
-	for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
-		if (CPU_DR7 & CPU_DR7_G(i)) {
-			CPU_STAT_BP |= (1 << i);
-		}
-	}
-#endif
-
 	/* set new EFLAGS */
 	set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG);
 
 	/* set new segment register */
 	if (!CPU_STAT_VM86) {
-		/* clear segment descriptor cache */
-		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			segdesc_clear(&CPU_STAT_SREG(i));
-		}
-
 		/* load CS */
 		rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]);
 		if (rv < 0) {
@@ -548,22 +517,17 @@ task_switch(selector_t *task_sel, task_s
 			EXCEPTION(SS_EXCEPTION, ss_sel.idx);
 		}
 
-		/* Now loading CS/SS register */
-		load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl);
+		/* Now loading SS register */
 		load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.rpl);
 
 		/* load ES, DS, FS, GS segment register */
-		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			if (i != CPU_CS_INDEX || i != CPU_SS_INDEX) {
-				LOAD_SEGREG1(i, sreg[i], TS_EXCEPTION);
-			}
-		}
-	}
+		LOAD_SEGREG1(CPU_ES_INDEX, sreg[CPU_ES_INDEX], TS_EXCEPTION);
+		LOAD_SEGREG1(CPU_DS_INDEX, sreg[CPU_DS_INDEX], TS_EXCEPTION);
+		LOAD_SEGREG1(CPU_FS_INDEX, sreg[CPU_FS_INDEX], TS_EXCEPTION);
+		LOAD_SEGREG1(CPU_GS_INDEX, sreg[CPU_GS_INDEX], TS_EXCEPTION);
 
-	/* out of range */
-	if (CPU_EIP > CPU_STAT_CS_LIMIT) {
-		VERBOSE(("task_switch: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT));
-		EXCEPTION(GP_EXCEPTION, 0);
+		/* Now loading CS register */
+		load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl);
 	}
 
 	VERBOSE(("task_switch: done."));