--- np2/i386c/ia32/task.c 2004/01/14 16:14:49 1.3 +++ np2/i386c/ia32/task.c 2004/01/23 14:33:26 1.5 @@ -1,4 +1,4 @@ -/* $Id: task.c,v 1.3 2004/01/14 16:14:49 monaka Exp $ */ +/* $Id: task.c,v 1.5 2004/01/23 14:33:26 monaka Exp $ */ /* * Copyright (c) 2003 NONAKA Kimihiro @@ -69,15 +69,7 @@ load_tr(WORD selector) } #if defined(DEBUG) -{ - DWORD v; - DWORD i; - - for (i = 0; i < task_sel.desc.u.seg.limit; i += 4) { - v = cpu_lmemoryread_d(task_sel.desc.u.seg.segbase + i); - VERBOSE(("task_sel: %08x: %08x", task_sel.desc.u.seg.segbase + i, v)); - } -} + tr_dump(task_sel.selector, task_sel.desc.u.seg.segbase, task_sel.desc.u.seg.limit); #endif CPU_SET_TASK_BUSY(&task_sel.desc); @@ -86,12 +78,13 @@ load_tr(WORD selector) } void -get_stack_from_tss(DWORD pl, WORD* new_ss, DWORD* new_esp) +get_stack_from_tss(DWORD pl, WORD *new_ss, DWORD *new_esp) { DWORD tss_stack_addr; - switch (CPU_TR_DESC.type) { - case CPU_SYSDESC_TYPE_TSS_BUSY_32: + __ASSERT(pl < 3); + + if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) { tss_stack_addr = pl * 8 + 4; if (tss_stack_addr + 7 > CPU_TR_DESC.u.seg.limit) { EXCEPTION(TS_EXCEPTION, CPU_TR & ~3); @@ -99,9 +92,7 @@ get_stack_from_tss(DWORD pl, WORD* new_s tss_stack_addr += CPU_TR_DESC.u.seg.segbase; *new_esp = cpu_lmemoryread_d(tss_stack_addr); *new_ss = cpu_lmemoryread_w(tss_stack_addr + 4); - break; - - case CPU_SYSDESC_TYPE_TSS_BUSY_16: + } else if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_16) { tss_stack_addr = pl * 4 + 2; if (tss_stack_addr + 3 > CPU_TR_DESC.u.seg.limit) { EXCEPTION(TS_EXCEPTION, CPU_TR & ~3); @@ -109,18 +100,17 @@ get_stack_from_tss(DWORD pl, WORD* new_s tss_stack_addr += CPU_TR_DESC.u.seg.segbase; *new_esp = cpu_lmemoryread_w(tss_stack_addr); *new_ss = cpu_lmemoryread_w(tss_stack_addr + 2); - break; - - default: - ia32_panic("get_stack_from_tss: TR is invalid (%d)\n", - CPU_TR_DESC.type); - break; + } else { + ia32_panic("get_stack_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); } + + VERBOSE(("get_stack_from_tss: new_esp = 0x%08x, new_ss = 0x%04x", *new_esp, *new_ss)); } WORD get_link_selector_from_tss() { + WORD backlink; if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) { if (4 > CPU_TR_DESC.u.seg.limit) { @@ -131,12 +121,12 @@ get_link_selector_from_tss() EXCEPTION(TS_EXCEPTION, CPU_TR & ~3); } } else { - ia32_panic("get_link_selector_from_tss: TR is invalid (%d)\n", - CPU_TR_DESC.type); - return 0; /* compiler happy */ + ia32_panic("get_link_selector_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); } - return cpu_lmemoryread_w(CPU_TR_DESC.u.seg.segbase); + backlink = cpu_lmemoryread_w(CPU_TR_DESC.u.seg.segbase); + VERBOSE(("get_link_selector_from_tss: backlink selector = 0x%04x", backlink)); + return backlink; } void @@ -157,13 +147,15 @@ task_switch(selector_t* task_sel, int ty DWORD task_base; /* new task state */ DWORD old_flags = REAL_EFLAGREG; BOOL task16; - int nsreg; - int i; + DWORD nsreg; + DWORD i; + + VERBOSE(("task_switch: start")); cur_base = CPU_TR_DESC.u.seg.segbase; task_base = task_sel->desc.u.seg.segbase; VERBOSE(("task_switch: current task base address = 0x%08x", cur_base)); - VERBOSE(("task_switch: new task base address = 0x%08x", task_base)); + VERBOSE(("task_switch: new task base address = 0x%08x", task_base)); /* limit check */ switch (task_sel->desc.type) { @@ -192,6 +184,18 @@ task_switch(selector_t* task_sel, int ty break; } +#if defined(DEBUG) + { + DWORD v; + + VERBOSE(("task_switch: new task")); + for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) { + v = cpu_lmemoryread_d(task_base + i); + VERBOSE(("task_switch: 0x%08x: %08x", task_base + i,v)); + } + } +#endif + if (CPU_STAT_PAGING) { /* task state paging check */ paging_check(cur_base, CPU_TR_DESC.u.seg.limit, CPU_PAGING_PAGE_WRITE); @@ -229,21 +233,21 @@ task_switch(selector_t* task_sel, int ty t = 0; iobase = 0; } + #if defined(DEBUG) VERBOSE(("task_switch: %dbit task", task16 ? 16 : 32)); - VERBOSE(("task_switch: CR3 = 0x%08x", cr3)); - VERBOSE(("task_switch: eip = 0x%08x", eip)); - VERBOSE(("task_switch: eflags = 0x%08x", new_flags)); + VERBOSE(("task_switch: CR3 = 0x%08x", cr3)); + VERBOSE(("task_switch: eip = 0x%08x", eip)); + VERBOSE(("task_switch: eflags = 0x%08x", new_flags)); for (i = 0; i < CPU_REG_NUM; i++) { VERBOSE(("task_switch: regs[%d] = 0x%08x", i, regs[i])); } - VERBOSE(("task_switch: nsreg = %d", nsreg)); for (i = 0; i < nsreg; i++) { VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, sreg[i])); } - VERBOSE(("task_switch: ldtr = 0x%04x", ldtr)); - VERBOSE(("task_switch: t = 0x%04x", t)); - VERBOSE(("task_switch: iobase = 0x%04x", iobase)); + VERBOSE(("task_switch: ldtr = 0x%04x", ldtr)); + VERBOSE(("task_switch: t = 0x%04x", t)); + VERBOSE(("task_switch: iobase = 0x%04x", iobase)); #endif /* if IRET or JMP, clear busy flag in this task: need */ @@ -279,7 +283,7 @@ task_switch(selector_t* task_sel, int ty for (i = 0; i < nsreg; i++) { cpu_lmemorywrite_d(cur_base + 72 + i * 4, CPU_REGS_SREG(i)); } - cpu_lmemorywrite_d(cur_base + 96, CPU_LDTR); + cpu_lmemorywrite_w(cur_base + 96, CPU_LDTR); } else { cpu_lmemorywrite_w(cur_base + 14, CPU_IP); cpu_lmemorywrite_w(cur_base + 16, (WORD)old_flags); @@ -292,12 +296,23 @@ task_switch(selector_t* task_sel, int ty cpu_lmemorywrite_w(cur_base + 42, CPU_LDTR); } +#if defined(DEBUG) + { + DWORD v; + + VERBOSE(("task_switch: current task")); + for (i = 0; i < CPU_TR_DESC.u.seg.limit; i += 4) { + v = cpu_lmemoryread_d(cur_base + i); + VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i, v)); + } + } +#endif /* set back link selector */ switch (type) { case TASK_SWITCH_CALL: case TASK_SWITCH_INTR: /* set back link selector */ - cpu_lmemorywrite_d(task_base, CPU_TR); + cpu_lmemorywrite_w(task_base, CPU_TR); break; case TASK_SWITCH_IRET: @@ -312,7 +327,7 @@ task_switch(selector_t* task_sel, int ty /* Now task switching! */ - /* if CALL, INTR, set EFLAG image NT_FLAG */ + /* if CALL, INTR, set EFLAGS image NT_FLAG */ /* if CALL, INTR, JMP set busy flag */ switch (type) { case TASK_SWITCH_CALL: @@ -342,14 +357,14 @@ task_switch(selector_t* task_sel, int ty CPU_TR_DESC = task_sel->desc; /* load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR) */ - if (CPU_STAT_PAGING) { - /* XXX setCR3()? */ - CPU_CR3 = cr3 & 0xfffff018; - tlb_flush(FALSE); + if (!task16) { + set_CR3(cr3); } - /* set new EFLAGS, EIP, GPR, segment register, LDTR */ + /* set new EFLAGS */ set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG); + + /* set new EIP, GPR */ CPU_PREV_EIP = CPU_EIP = eip; for (i = 0; i < CPU_REG_NUM; i++) { CPU_REGS_DWORD(i) = regs[i]; @@ -359,47 +374,62 @@ task_switch(selector_t* task_sel, int ty CPU_STAT_SREG_CLEAR(i); } - /* load LDTR */ + /* load new LDTR */ load_ldtr(ldtr, TS_EXCEPTION); - /* load CS */ - rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]); - if (rv < 0) { - VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv)); - EXCEPTION(TS_EXCEPTION, cs_sel.idx); - } - - /* CS register must be code segment */ - if (!cs_sel.desc.s || !cs_sel.desc.u.seg.c) { - EXCEPTION(TS_EXCEPTION, cs_sel.idx); - } + /* set new segment register */ + if (CPU_STAT_VM86) { + /* VM86 */ + /* clear 32bit */ + CPU_STATSAVE.cpu_inst_default.op_32 = + CPU_STATSAVE.cpu_inst_default.as_32 = 0; + CPU_STAT_SS32 = 0; + CPU_STAT_CPL = task_sel->desc.dpl; - /* check privilege level */ - if (!cs_sel.desc.u.seg.ec) { - /* non-confirming code segment */ - if (cs_sel.desc.dpl != cs_sel.rpl) { - EXCEPTION(TS_EXCEPTION, cs_sel.idx); + for (i = 0; i < nsreg; i++) { + CPU_STAT_SREG_INIT(i); + load_segreg(i, sreg[i], TS_EXCEPTION); } } else { - /* confirming code segment */ - if (cs_sel.desc.dpl < cs_sel.rpl) { + /* load CS */ + rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]); + if (rv < 0) { + VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv)); EXCEPTION(TS_EXCEPTION, cs_sel.idx); } - } - /* CS segment is not present */ - rv = selector_is_not_present(&cs_sel); - if (rv < 0) { - EXCEPTION(NP_EXCEPTION, cs_sel.idx); - } + /* CS register must be code segment */ + if (!cs_sel.desc.s || !cs_sel.desc.u.seg.c) { + EXCEPTION(TS_EXCEPTION, cs_sel.idx); + } - /* Now loading CS register */ - load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); + /* check privilege level */ + if (!cs_sel.desc.u.seg.ec) { + /* non-confirming code segment */ + if (cs_sel.desc.dpl != cs_sel.rpl) { + EXCEPTION(TS_EXCEPTION, cs_sel.idx); + } + } else { + /* confirming code segment */ + if (cs_sel.desc.dpl < cs_sel.rpl) { + EXCEPTION(TS_EXCEPTION, cs_sel.idx); + } + } - /* load ES, SS, DS, FS, GS segment register */ - for (i = 0; i < nsreg; i++) { - if (i != CPU_CS_INDEX) { - load_segreg(i, sreg[i], TS_EXCEPTION); + /* code segment is not present */ + rv = selector_is_not_present(&cs_sel); + if (rv < 0) { + EXCEPTION(NP_EXCEPTION, cs_sel.idx); + } + + /* Now loading CS register */ + load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); + + /* load ES, SS, DS, FS, GS segment register */ + for (i = 0; i < nsreg; i++) { + if (i != CPU_CS_INDEX) { + load_segreg(i, sreg[i], TS_EXCEPTION); + } } } @@ -416,6 +446,11 @@ task_switch(selector_t* task_sel, int ty CPU_STAT_IOLIMIT = 0; } - /* running new task */ - SET_EIP(eip); + /* out of range */ + if (CPU_EIP > CPU_STAT_CS_LIMIT) { + VERBOSE(("task_switch: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT)); + EXCEPTION(GP_EXCEPTION, 0); + } + + VERBOSE(("task_switch: done.")); }