--- np2/i386c/ia32/task.c	2011/12/23 04:16:51	1.29
+++ np2/i386c/ia32/task.c	2012/02/07 09:11:11	1.38
@@ -32,7 +32,7 @@
 #define	TSS_32_SIZE	104
 #define	TSS_32_LIMIT	(TSS_32_SIZE - 1)
 
-static void
+static void CPUCALL
 set_task_busy(UINT16 selector)
 {
 	UINT32 addr;
@@ -44,11 +44,12 @@ set_task_busy(UINT16 selector)
 		h |= CPU_TSS_H_BUSY;
 		cpu_kmemorywrite_d(addr + 4, h);
 	} else {
-		ia32_panic("set_task_busy: already busy(%04x:%08x)",selector,h);
+		ia32_panic("set_task_busy: already busy(%04x:%08x)",
+		    selector, h);
 	}
 }
 
-static void
+static void CPUCALL
 set_task_free(UINT16 selector)
 {
 	UINT32 addr;
@@ -60,18 +61,16 @@ set_task_free(UINT16 selector)
 		h &= ~CPU_TSS_H_BUSY;
 		cpu_kmemorywrite_d(addr + 4, h);
 	} else {
-		ia32_panic("set_task_free: already free(%04x:%08x)",selector,h);
+		ia32_panic("set_task_free: already free(%04x:%08x)",
+		    selector, h);
 	}
 }
 
-void
+void CPUCALL
 load_tr(UINT16 selector)
 {
 	selector_t task_sel;
 	int rv;
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	int i;
-#endif
 	UINT16 iobase;
 
 	rv = parse_selector(&task_sel, selector);
@@ -118,31 +117,24 @@ load_tr(UINT16 selector)
 	/* I/O deny bitmap */
 	CPU_STAT_IOLIMIT = 0;
 	if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
-		if (iobase != 0 && iobase < CPU_TR_DESC.u.seg.limit) {
-			CPU_STAT_IOLIMIT = (UINT16)(CPU_TR_DESC.u.seg.limit - iobase);
-			CPU_STAT_IOADDR = CPU_TR_DESC.u.seg.segbase + iobase;
+		if (iobase < CPU_TR_LIMIT) {
+			CPU_STAT_IOLIMIT = (UINT16)(CPU_TR_LIMIT - iobase);
+			CPU_STAT_IOADDR = CPU_TR_BASE + iobase;
+			VERBOSE(("load_tr: enable ioport control: iobase=0x%04x, base=0x%08x, limit=0x%08x", iobase, CPU_STAT_IOADDR, CPU_STAT_IOLIMIT));
 		}
 	}
-
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	/* clear local break point flags */
-	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
-	CPU_STAT_BP = 0;
-	for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
-		if (CPU_DR7 & CPU_DR7_G(i)) {
-			CPU_STAT_BP |= (1 << i);
-		}
+	if (CPU_STAT_IOLIMIT == 0) {
+		VERBOSE(("load_tr: disable ioport control."));
 	}
-#endif
 }
 
-void
+void CPUCALL
 get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp)
 {
 	UINT32 tss_stack_addr;
 
 	VERBOSE(("get_stack_pointer_from_tss: pl = %d", pl));
-	VERBOSE(("CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT));
+	VERBOSE(("get_stack_pointer_from_tss: CPU_TR type = %d, base = 0x%08x, limit = 0x%08x", CPU_TR_DESC.type, CPU_TR_BASE, CPU_TR_LIMIT));
 
 	__ASSERT(pl < 3);
 
@@ -165,7 +157,8 @@ get_stack_pointer_from_tss(UINT pl, UINT
 	} else {
 		ia32_panic("get_stack_pointer_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type);
 	}
-	VERBOSE(("new stack pointer = %04x:%08x", *new_ss, *new_esp));
+	VERBOSE(("get_stack_pointer_from_tss: new stack pointer = %04x:%08x",
+	    *new_ss, *new_esp));
 }
 
 UINT16
@@ -186,11 +179,12 @@ get_backlink_selector_from_tss(void)
 	}
 
 	backlink = cpu_kmemoryread_w(CPU_TR_BASE);
-	VERBOSE(("get_backlink_selector_from_tss: backlink selector = 0x%04x", backlink));
+	VERBOSE(("get_backlink_selector_from_tss: backlink selector = 0x%04x",
+	    backlink));
 	return backlink;
 }
 
-void
+void CPUCALL
 task_switch(selector_t *task_sel, task_switch_type_t type)
 {
 	UINT32 regs[CPU_REG_NUM];
@@ -201,7 +195,6 @@ task_switch(selector_t *task_sel, task_s
 	UINT16 ldtr;
 	UINT16 iobase;
 	UINT16 t;
-	int new_cpl;
 
 	selector_t cs_sel, ss_sel;
 	int rv;
@@ -241,24 +234,22 @@ task_switch(selector_t *task_sel, task_s
 	cur_paddr = laddr_to_paddr(cur_base, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
 	task_base = task_sel->desc.u.seg.segbase;
 	task_paddr = laddr_to_paddr(task_base, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
-	VERBOSE(("task_switch: current task (%04x) = 0x%08x:%08x", CPU_TR, cur_base, CPU_TR_LIMIT));
-	VERBOSE(("task_switch: new task (%04x) = 0x%08x:%08x", task_sel->selector, task_base, task_sel->desc.u.seg.limit));
+	VERBOSE(("task_switch: current task (%04x) = 0x%08x:%08x (p0x%08x)",
+	    CPU_TR, cur_base, CPU_TR_LIMIT, cur_paddr));
+	VERBOSE(("task_switch: new task (%04x) = 0x%08x:%08x (p0x%08x)",
+	    task_sel->selector, task_base, task_sel->desc.u.seg.limit,
+	    task_paddr));
 	VERBOSE(("task_switch: %dbit task switch", task16 ? 16 : 32));
 
 #if defined(MORE_DEBUG)
-	{
-		UINT32 v;
-
-		VERBOSE(("task_switch: new task"));
-		for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) {
-			v = cpu_memoryread_d(task_paddr + i);
-			VERBOSE(("task_switch: 0x%08x: %08x", task_base + i,v));
-		}
+	VERBOSE(("task_switch: new task"));
+	for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) {
+		VERBOSE(("task_switch: 0x%08x: %08x", task_base + i,
+		    cpu_memoryread_d(task_paddr + i)));
 	}
 #endif
 
 	/* load task state */
-	memset(sreg, 0, sizeof(sreg));
 	if (!task16) {
 		if (CPU_STAT_PAGING) {
 			cr3 = cpu_memoryread_d(task_paddr + 28);
@@ -286,6 +277,9 @@ task_switch(selector_t *task_sel, task_s
 		for (i = 0; i < CPU_SEGREG286_NUM; i++) {
 			sreg[i] = cpu_memoryread_w(task_paddr + 34 + i * 2);
 		}
+		for (; i < CPU_SEGREG_NUM; i++) {
+			sreg[i] = 0;
+		}
 		ldtr = cpu_memoryread_w(task_paddr + 42);
 		iobase = 0;
 		t = 0;
@@ -299,10 +293,12 @@ task_switch(selector_t *task_sel, task_s
 	VERBOSE(("task_switch: eip     = 0x%08x", CPU_EIP));
 	VERBOSE(("task_switch: eflags  = 0x%08x", old_flags));
 	for (i = 0; i < CPU_REG_NUM; i++) {
-		VERBOSE(("task_switch: regs[%d] = 0x%08x", i, CPU_REGS_DWORD(i)));
+		VERBOSE(("task_switch: %s = 0x%08x", reg32_str[i],
+		    CPU_REGS_DWORD(i)));
 	}
 	for (i = 0; i < CPU_SEGREG_NUM; i++) {
-		VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, CPU_REGS_SREG(i)));
+		VERBOSE(("task_switch: %s = 0x%04x", sreg_str[i],
+		    CPU_REGS_SREG(i)));
 	}
 	VERBOSE(("task_switch: ldtr    = 0x%04x", CPU_LDTR));
 
@@ -313,10 +309,10 @@ task_switch(selector_t *task_sel, task_s
 	VERBOSE(("task_switch: eip     = 0x%08x", eip));
 	VERBOSE(("task_switch: eflags  = 0x%08x", new_flags));
 	for (i = 0; i < CPU_REG_NUM; i++) {
-		VERBOSE(("task_switch: regs[%d] = 0x%08x", i, regs[i]));
+		VERBOSE(("task_switch: %s = 0x%08x", reg32_str[i], regs[i]));
 	}
 	for (i = 0; i < CPU_SEGREG_NUM; i++) {
-		VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, sreg[i]));
+		VERBOSE(("task_switch: %s = 0x%04x", sreg_str[i], sreg[i]));
 	}
 	VERBOSE(("task_switch: ldtr    = 0x%04x", ldtr));
 	if (!task16) {
@@ -343,7 +339,7 @@ task_switch(selector_t *task_sel, task_s
 		break;
 	
 	default:
-		ia32_panic("task_switch(): task switch type is invalid");
+		ia32_panic("task_switch: task switch type is invalid");
 		break;
 	}
 
@@ -352,19 +348,23 @@ task_switch(selector_t *task_sel, task_s
 		cpu_memorywrite_d(cur_paddr + 32, CPU_EIP);
 		cpu_memorywrite_d(cur_paddr + 36, old_flags);
 		for (i = 0; i < CPU_REG_NUM; i++) {
-			cpu_memorywrite_d(cur_paddr + 40 + i * 4, CPU_REGS_DWORD(i));
+			cpu_memorywrite_d(cur_paddr + 40 + i * 4,
+			    CPU_REGS_DWORD(i));
 		}
 		for (i = 0; i < CPU_SEGREG_NUM; i++) {
-			cpu_memorywrite_w(cur_paddr + 72 + i * 4, CPU_REGS_SREG(i));
+			cpu_memorywrite_w(cur_paddr + 72 + i * 4,
+			    CPU_REGS_SREG(i));
 		}
 	} else {
 		cpu_memorywrite_w(cur_paddr + 14, CPU_IP);
 		cpu_memorywrite_w(cur_paddr + 16, (UINT16)old_flags);
 		for (i = 0; i < CPU_REG_NUM; i++) {
-			cpu_memorywrite_w(cur_paddr + 18 + i * 2, CPU_REGS_WORD(i));
+			cpu_memorywrite_w(cur_paddr + 18 + i * 2,
+			    CPU_REGS_WORD(i));
 		}
 		for (i = 0; i < CPU_SEGREG286_NUM; i++) {
-			cpu_memorywrite_w(cur_paddr + 34 + i * 2, CPU_REGS_SREG(i));
+			cpu_memorywrite_w(cur_paddr + 34 + i * 2,
+			    CPU_REGS_SREG(i));
 		}
 	}
 
@@ -375,26 +375,22 @@ task_switch(selector_t *task_sel, task_s
 		/* set back link selector */
 		cpu_memorywrite_w(task_paddr, CPU_TR);
 		break;
-	
+
 	case TASK_SWITCH_IRET:
 	case TASK_SWITCH_JMP:
 		/* Nothing to do */
 		break;
 
 	default:
-		ia32_panic("task_switch(): task switch type is invalid");
+		ia32_panic("task_switch: task switch type is invalid");
 		break;
 	}
 
 #if defined(MORE_DEBUG)
-	{
-		UINT32 v;
-
-		VERBOSE(("task_switch: current task"));
-		for (i = 0; i < CPU_TR_LIMIT; i += 4) {
-			v = cpu_memoryread_d(cur_paddr + i);
-			VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i, v));
-		}
+	VERBOSE(("task_switch: current task"));
+	for (i = 0; i < CPU_TR_LIMIT; i += 4) {
+		VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i,
+		    cpu_memoryread_d(cur_paddr + i)));
 	}
 #endif
 
@@ -424,7 +420,7 @@ task_switch(selector_t *task_sel, task_s
 		break;
 
 	default:
-		ia32_panic("task_switch(): task switch type is invalid");
+		ia32_panic("task_switch: task switch type is invalid");
 		break;
 	}
 
@@ -468,29 +464,45 @@ task_switch(selector_t *task_sel, task_s
 		CPU_STAT_IOLIMIT = (UINT16)(CPU_TR_DESC.u.seg.limit - iobase);
 		CPU_STAT_IOADDR = task_base + iobase;
 	}
-	VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR, CPU_STAT_IOLIMIT));
-
-#if defined(IA32_SUPPORT_DEBUG_REGISTER)
-	/* check resume flag */
-	if (CPU_EFLAG & RF_FLAG) {
-		CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_RF;
-	}
-
-	/* clear local break point flags */
-	CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
-	CPU_STAT_BP = 0;
-	for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
-		if (CPU_DR7 & CPU_DR7_G(i)) {
-			CPU_STAT_BP |= (1 << i);
-		}
-	}
-#endif
+	VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR,
+	    CPU_STAT_IOLIMIT));
 
 	/* set new EFLAGS */
 	set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG);
 
 	/* set new segment register */
 	if (!CPU_STAT_VM86) {
+		/* load CS */
+		rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]);
+		if (rv < 0) {
+			VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv));
+			EXCEPTION(TS_EXCEPTION, cs_sel.idx);
+		}
+
+		/* CS must be code segment */
+		if (SEG_IS_SYSTEM(&cs_sel.desc) || SEG_IS_DATA(&cs_sel.desc)) {
+			EXCEPTION(TS_EXCEPTION, cs_sel.idx);
+		}
+
+		/* check privilege level */
+		if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc)) {
+			/* non-confirming code segment */
+			if (cs_sel.desc.dpl != cs_sel.rpl) {
+				EXCEPTION(TS_EXCEPTION, cs_sel.idx);
+			}
+		} else {
+			/* conforming code segment */
+			if (cs_sel.desc.dpl > cs_sel.rpl) {
+				EXCEPTION(TS_EXCEPTION, cs_sel.idx);
+			}
+		}
+
+		/* code segment is not present */
+		rv = selector_is_not_present(&cs_sel);
+		if (rv < 0) {
+			EXCEPTION(NP_EXCEPTION, cs_sel.idx);
+		}
+
 		/* load SS */
 		rv = parse_selector(&ss_sel, sreg[CPU_SS_INDEX]);
 		if (rv < 0) {
@@ -526,37 +538,6 @@ task_switch(selector_t *task_sel, task_s
 		LOAD_SEGREG1(CPU_FS_INDEX, sreg[CPU_FS_INDEX], TS_EXCEPTION);
 		LOAD_SEGREG1(CPU_GS_INDEX, sreg[CPU_GS_INDEX], TS_EXCEPTION);
 
-		/* load CS */
-		rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]);
-		if (rv < 0) {
-			VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv));
-			EXCEPTION(TS_EXCEPTION, cs_sel.idx);
-		}
-
-		/* CS must be code segment */
-		if (SEG_IS_SYSTEM(&cs_sel.desc) || SEG_IS_DATA(&cs_sel.desc)) {
-			EXCEPTION(TS_EXCEPTION, cs_sel.idx);
-		}
-
-		/* check privilege level */
-		if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc)) {
-			/* non-confirming code segment */
-			if (cs_sel.desc.dpl != cs_sel.rpl) {
-				EXCEPTION(TS_EXCEPTION, cs_sel.idx);
-			}
-		} else {
-			/* conforming code segment */
-			if (cs_sel.desc.dpl > cs_sel.rpl) {
-				EXCEPTION(TS_EXCEPTION, cs_sel.idx);
-			}
-		}
-
-		/* code segment is not present */
-		rv = selector_is_not_present(&cs_sel);
-		if (rv < 0) {
-			EXCEPTION(NP_EXCEPTION, cs_sel.idx);
-		}
-
 		/* Now loading CS register */
 		load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl);
 	}