--- np2/i386c/ia32/task.c 2004/02/04 13:24:35 1.8 +++ np2/i386c/ia32/task.c 2004/03/02 16:30:43 1.15 @@ -1,4 +1,4 @@ -/* $Id: task.c,v 1.8 2004/02/04 13:24:35 monaka Exp $ */ +/* $Id: task.c,v 1.15 2004/03/02 16:30:43 monaka Exp $ */ /* * Copyright (c) 2003 NONAKA Kimihiro @@ -33,12 +33,13 @@ void -load_tr(WORD selector) +load_tr(UINT16 selector) { selector_t task_sel; int rv; + UINT16 iobase; - rv = parse_selector_user(&task_sel, selector); + rv = parse_selector(&task_sel, selector); if (rv < 0 || task_sel.ldt || task_sel.desc.s) { EXCEPTION(GP_EXCEPTION, task_sel.idx); } @@ -49,16 +50,19 @@ load_tr(WORD selector) if (task_sel.desc.u.seg.limit < 0x2b) { EXCEPTION(TS_EXCEPTION, task_sel.idx); } + iobase = 0; break; case CPU_SYSDESC_TYPE_TSS_32: if (task_sel.desc.u.seg.limit < 0x67) { EXCEPTION(TS_EXCEPTION, task_sel.idx); } + iobase = cpu_kmemoryread_w(task_sel.desc.u.seg.segbase + 102); break; default: EXCEPTION(GP_EXCEPTION, task_sel.idx); + iobase = 0; /* compiler happy */ break; } @@ -75,12 +79,24 @@ load_tr(WORD selector) CPU_SET_TASK_BUSY(task_sel.selector, &task_sel.desc); CPU_TR = task_sel.selector; CPU_TR_DESC = task_sel.desc; + + /* I/O deny bitmap */ + if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) { + if (iobase != 0 && iobase < task_sel.desc.u.seg.limit) { + CPU_STAT_IOLIMIT = (UINT16)(task_sel.desc.u.seg.limit - iobase); + CPU_STAT_IOADDR = task_sel.desc.u.seg.segbase + iobase; + } else { + CPU_STAT_IOLIMIT = 0; + } + } else { + CPU_STAT_IOLIMIT = 0; + } } void -get_stack_from_tss(DWORD pl, WORD *new_ss, DWORD *new_esp) +get_stack_pointer_from_tss(UINT pl, UINT16 *new_ss, UINT32 *new_esp) { - DWORD tss_stack_addr; + UINT32 tss_stack_addr; __ASSERT(pl < 3); @@ -101,16 +117,16 @@ get_stack_from_tss(DWORD pl, WORD *new_s *new_esp = cpu_kmemoryread_w(tss_stack_addr); *new_ss = cpu_kmemoryread_w(tss_stack_addr + 2); } else { - ia32_panic("get_stack_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); + ia32_panic("get_stack_pointer_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); } - VERBOSE(("get_stack_from_tss: pl = %d, new_esp = 0x%08x, new_ss = 0x%04x", pl, *new_esp, *new_ss)); + VERBOSE(("get_stack_pointer_from_tss: pl = %d, new_esp = 0x%08x, new_ss = 0x%04x", pl, *new_esp, *new_ss)); } -WORD -get_link_selector_from_tss() +UINT16 +get_backlink_selector_from_tss(void) { - WORD backlink; + UINT16 backlink; if (CPU_TR_DESC.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) { if (4 > CPU_TR_DESC.u.seg.limit) { @@ -121,42 +137,38 @@ get_link_selector_from_tss() EXCEPTION(TS_EXCEPTION, CPU_TR & ~3); } } else { - ia32_panic("get_link_selector_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); + ia32_panic("get_backlink_selector_from_tss: task register is invalid (%d)\n", CPU_TR_DESC.type); } backlink = cpu_kmemoryread_w(CPU_TR_DESC.u.seg.segbase); - VERBOSE(("get_link_selector_from_tss: backlink selector = 0x%04x", backlink)); + VERBOSE(("get_backlink_selector_from_tss: backlink selector = 0x%04x", backlink)); return backlink; } void -task_switch(selector_t* task_sel, int type) +task_switch(selector_t *task_sel, task_switch_type_t type) { - DWORD regs[CPU_REG_NUM]; - DWORD eip; - DWORD new_flags; - DWORD cr3 = 0; - WORD sreg[CPU_SEGREG_NUM]; - WORD ldtr; - WORD t, iobase; + UINT32 regs[CPU_REG_NUM]; + UINT32 eip; + UINT32 new_flags; + UINT32 mask; + UINT32 cr3 = 0; + UINT16 sreg[CPU_SEGREG_NUM]; + UINT16 ldtr; + UINT16 t, iobase; selector_t cs_sel; int rv; - DWORD cur_base; /* current task state */ - DWORD task_base; /* new task state */ - DWORD old_flags = REAL_EFLAGREG; + UINT32 cur_base; /* current task state */ + UINT32 task_base; /* new task state */ + UINT32 old_flags = REAL_EFLAGREG; BOOL task16; - DWORD nsreg; - DWORD i; + UINT nsreg; + UINT i; VERBOSE(("task_switch: start")); - cur_base = CPU_TR_DESC.u.seg.segbase; - task_base = task_sel->desc.u.seg.segbase; - VERBOSE(("task_switch: current task base address = 0x%08x", cur_base)); - VERBOSE(("task_switch: new task base address = 0x%08x", task_base)); - /* limit check */ switch (task_sel->desc.type) { case CPU_SYSDESC_TYPE_TSS_32: @@ -184,9 +196,15 @@ task_switch(selector_t* task_sel, int ty break; } + cur_base = CPU_TR_DESC.u.seg.segbase; + task_base = task_sel->desc.u.seg.segbase; + VERBOSE(("task_switch: cur task (%04x) = 0x%08x:%08x", CPU_TR, cur_base, CPU_TR_DESC.u.seg.limit)); + VERBOSE(("task_switch: new task (%04x) = 0x%08x:%08x", task_sel->selector, task_base, task_sel->desc.u.seg.limit)); + VERBOSE(("task_switch: %dbit task switch", task16 ? 16 : 32)); + #if defined(MORE_DEBUG) { - DWORD v; + UINT32 v; VERBOSE(("task_switch: new task")); for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) { @@ -234,9 +252,21 @@ task_switch(selector_t* task_sel, int ty iobase = 0; } -#if defined(MORE_DEBUG) - VERBOSE(("task_switch: %dbit task", task16 ? 16 : 32)); - VERBOSE(("task_switch: CR3 = 0x%08x", cr3)); +#if defined(DEBUG) + VERBOSE(("task_switch: current task")); + VERBOSE(("task_switch: eip = 0x%08x", CPU_EIP)); + VERBOSE(("task_switch: eflags = 0x%08x", old_flags)); + for (i = 0; i < CPU_REG_NUM; i++) { + VERBOSE(("task_switch: regs[%d] = 0x%08x", i, CPU_REGS_DWORD(i))); + } + for (i = 0; i < nsreg; i++) { + VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, CPU_REGS_SREG(i))); + } + + VERBOSE(("task_switch: new task")); + if (!task16) { + VERBOSE(("task_switch: CR3 = 0x%08x", cr3)); + } VERBOSE(("task_switch: eip = 0x%08x", eip)); VERBOSE(("task_switch: eflags = 0x%08x", new_flags)); for (i = 0; i < CPU_REG_NUM; i++) { @@ -246,8 +276,10 @@ task_switch(selector_t* task_sel, int ty VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, sreg[i])); } VERBOSE(("task_switch: ldtr = 0x%04x", ldtr)); - VERBOSE(("task_switch: t = 0x%04x", t)); - VERBOSE(("task_switch: iobase = 0x%04x", iobase)); + if (!task16) { + VERBOSE(("task_switch: t = 0x%04x", t)); + VERBOSE(("task_switch: iobase = 0x%04x", iobase)); + } #endif /* if IRET or JMP, clear busy flag in this task: need */ @@ -284,7 +316,7 @@ task_switch(selector_t* task_sel, int ty } } else { cpu_kmemorywrite_w(cur_base + 14, CPU_IP); - cpu_kmemorywrite_w(cur_base + 16, (WORD)old_flags); + cpu_kmemorywrite_w(cur_base + 16, (UINT16)old_flags); for (i = 0; i < CPU_REG_NUM; i++) { cpu_kmemorywrite_w(cur_base + 18 + i * 2, CPU_REGS_WORD(i)); } @@ -295,7 +327,7 @@ task_switch(selector_t* task_sel, int ty #if defined(MORE_DEBUG) { - DWORD v; + UINT32 v; VERBOSE(("task_switch: current task")); for (i = 0; i < CPU_TR_DESC.u.seg.limit; i += 4) { @@ -337,16 +369,14 @@ task_switch(selector_t* task_sel, int ty break; case TASK_SWITCH_IRET: -#if defined(DEBUG) /* check busy flag is active */ if (task_sel->desc.valid) { - DWORD h; + UINT32 h; h = cpu_kmemoryread_d(task_sel->addr + 4); if ((h & CPU_TSS_H_BUSY) == 0) { - VERBOSE(("task_switch: new task is not busy")); + ia32_panic("task_switch: new task is not busy"); } } -#endif break; default: @@ -368,9 +398,6 @@ task_switch(selector_t* task_sel, int ty set_CR3(cr3); } - /* set new EFLAGS */ - set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG); - /* set new EIP, GPR */ CPU_PREV_EIP = CPU_EIP = eip; for (i = 0; i < CPU_REG_NUM; i++) { @@ -378,22 +405,25 @@ task_switch(selector_t* task_sel, int ty } for (i = 0; i < CPU_SEGREG_NUM; i++) { CPU_REGS_SREG(i) = sreg[i]; - CPU_STAT_SREG_CLEAR(i); + CPU_STAT_SREG_INIT(i); } + /* set new EFLAGS */ + mask = I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG; + set_eflags(new_flags, mask); + /* load new LDTR */ load_ldtr(ldtr, TS_EXCEPTION); /* set new segment register */ - if (CPU_STAT_VM86) { - /* VM86 */ - for (i = 0; i < nsreg; i++) { - CPU_STAT_SREG_INIT(i); - load_segreg(i, sreg[i], TS_EXCEPTION); + if (!CPU_STAT_VM86) { + /* clear segment descriptor cache */ + for (i = 0; i < CPU_SEGREG_NUM; i++) { + CPU_STAT_SREG_CLEAR(i); } - } else { + /* load CS */ - rv = parse_selector_sv(&cs_sel, sreg[CPU_CS_INDEX]); + rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]); if (rv < 0) { VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv)); EXCEPTION(TS_EXCEPTION, cs_sel.idx); @@ -427,7 +457,7 @@ task_switch(selector_t* task_sel, int ty load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); /* load ES, SS, DS, FS, GS segment register */ - for (i = 0; i < nsreg; i++) { + for (i = 0; i < CPU_SEGREG_NUM; i++) { if (i != CPU_CS_INDEX) { load_segreg(i, sreg[i], TS_EXCEPTION); } @@ -436,9 +466,8 @@ task_switch(selector_t* task_sel, int ty /* I/O deny bitmap */ if (!task16) { - if (task_sel->desc.u.seg.limit > iobase) { - CPU_STAT_IOLIMIT = task_sel->desc.u.seg.limit - iobase; - CPU_STAT_IOLIMIT *= 8; /* ビット単位で保持しておく */ + if (iobase != 0 && iobase < task_sel->desc.u.seg.limit) { + CPU_STAT_IOLIMIT = (UINT16)(task_sel->desc.u.seg.limit - iobase); CPU_STAT_IOADDR = task_sel->desc.u.seg.segbase + iobase; } else { CPU_STAT_IOLIMIT = 0; @@ -446,6 +475,7 @@ task_switch(selector_t* task_sel, int ty } else { CPU_STAT_IOLIMIT = 0; } + VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR, CPU_STAT_IOLIMIT)); /* out of range */ if (CPU_EIP > CPU_STAT_CS_LIMIT) {