| version 1.1, 2003/12/08 00:55:31 | version 1.14, 2004/03/04 15:55:26 | 
| Line 5 | Line 5 | 
 | #include        "cpucore.h" | #include        "cpucore.h" | 
 | #include        "memory.h" | #include        "memory.h" | 
 | #include        "egcmem.h" | #include        "egcmem.h" | 
 |  | #include        "mem9821.h" | 
 | #include        "pccore.h" | #include        "pccore.h" | 
 | #include        "iocore.h" | #include        "iocore.h" | 
 | #include        "vram.h" | #include        "vram.h" | 
 | #include        "font.h" | #include        "font.h" | 
 |  |  | 
 |  |  | 
| #define USE_HIMEM | BYTE    mem[0x200000]; | 
|  |  | 
|  |  | 
|  | #define USE_HIMEM               0x110000 | 
 |  |  | 
 | // ---- write byte | // ---- write byte | 
 |  |  | 
| Line 22  static void MEMCALL i286_wt(UINT32 addre | Line 26  static void MEMCALL i286_wt(UINT32 addre | 
 |  |  | 
 | static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < 0xa2000) { | if (address < 0xa2000) { | 
 | mem[address] = (BYTE)value; | mem[address] = (BYTE)value; | 
 | tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; | 
| Line 54  static void MEMCALL tram_wt(UINT32 addre | Line 58  static void MEMCALL tram_wt(UINT32 addre | 
 |  |  | 
 | static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | mem[address] = (BYTE)value; | mem[address] = (BYTE)value; | 
 | vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; | 
 | gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; | 
| Line 62  static void MEMCALL vram_w0(UINT32 addre | Line 66  static void MEMCALL vram_w0(UINT32 addre | 
 |  |  | 
 | static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; | 
 | vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; | 
 | gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; | 
| Line 73  static void MEMCALL grcg_rmw0(UINT32 add | Line 77  static void MEMCALL grcg_rmw0(UINT32 add | 
 | REG8    mask; | REG8    mask; | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | mask = ~value; | mask = ~value; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 1; | vramupdate[address] |= 1; | 
| Line 102  static void MEMCALL grcg_rmw1(UINT32 add | Line 106  static void MEMCALL grcg_rmw1(UINT32 add | 
 | REG8    mask; | REG8    mask; | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | mask = ~value; | mask = ~value; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 2; | vramupdate[address] |= 2; | 
| Line 130  static void MEMCALL grcg_tdw0(UINT32 add | Line 134  static void MEMCALL grcg_tdw0(UINT32 add | 
 |  |  | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 1; | vramupdate[address] |= 1; | 
 | gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; | 
| Line 154  static void MEMCALL grcg_tdw1(UINT32 add | Line 158  static void MEMCALL grcg_tdw1(UINT32 add | 
 |  |  | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 2; | vramupdate[address] |= 2; | 
 | gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; | 
| Line 176  static void MEMCALL grcg_tdw1(UINT32 add | Line 180  static void MEMCALL grcg_tdw1(UINT32 add | 
 |  |  | 
 | static void MEMCALL egc_wt(UINT32 address, REG8 value) { | static void MEMCALL egc_wt(UINT32 address, REG8 value) { | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | egc_write(address, value); | egc_write(address, value); | 
 | } | } | 
 |  |  | 
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wb(UINT32 address, REG8 value) { | 
 |  |  | 
| extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | 
 | } | } | 
 |  |  | 
 | static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wn(UINT32 address, REG8 value) { | 
| Line 200  static REG8 MEMCALL i286_rd(UINT32 addre | Line 205  static REG8 MEMCALL i286_rd(UINT32 addre | 
 |  |  | 
 | static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < 0xa4000) { | if (address < 0xa4000) { | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
| Line 217  static REG8 MEMCALL tram_rd(UINT32 addre | Line 222  static REG8 MEMCALL tram_rd(UINT32 addre | 
 |  |  | 
 | static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
 |  |  | 
 | static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); | 
 | } | } | 
 |  |  | 
| Line 232  static REG8 MEMCALL grcg_tcr0(UINT32 add | Line 237  static REG8 MEMCALL grcg_tcr0(UINT32 add | 
 | const BYTE      *vram; | const BYTE      *vram; | 
 | REG8    ret; | REG8    ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | ret = 0; | ret = 0; | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 255  static REG8 MEMCALL grcg_tcr1(UINT32 add | Line 260  static REG8 MEMCALL grcg_tcr1(UINT32 add | 
 | const BYTE      *vram; | const BYTE      *vram; | 
 | REG8    ret; | REG8    ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | ret = 0; | ret = 0; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 275  const BYTE *vram; | Line 280  const BYTE *vram; | 
 |  |  | 
 | static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | return(egc_read(address)); | return(egc_read(address)); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) { | 
|  |  | 
| return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); |  | 
| } |  | 
|  |  | 
| static REG8 MEMCALL i286_itf(UINT32 address) { |  | 
 |  |  | 
 | if (CPU_ITFBANK) { | if (CPU_ITFBANK) { | 
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; | 
 | } | } | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
| Line 304  static void MEMCALL i286w_wt(UINT32 addr | Line 305  static void MEMCALL i286w_wt(UINT32 addr | 
 |  |  | 
 | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < 0xa1fff) { | if (address < 0xa1fff) { | 
 | STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); | 
 | tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; | 
| Line 349  static void MEMCALL tramw_wt(UINT32 addr | Line 351  static void MEMCALL tramw_wt(UINT32 addr | 
 |  |  | 
 |  |  | 
 | #define GRCGW_NON(page) {                                                                                       \ | #define GRCGW_NON(page) {                                                                                       \ | 
| CPU_REMCLOCK -= vramop.vramwait;                                                                \ | CPU_REMCLOCK -= MEMWAIT_VRAM;                                                                   \ | 
 | STOREINTELWORD(mem + address + VRAM_STEP*(page), value);                \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value);                \ | 
 | vramupdate[LOW15(address)] |= (1 << page);                                              \ | vramupdate[LOW15(address)] |= (1 << page);                                              \ | 
 | vramupdate[LOW15(address + 1)] |= (1 << page);                                  \ | vramupdate[LOW15(address + 1)] |= (1 << page);                                  \ | 
| Line 358  static void MEMCALL tramw_wt(UINT32 addr | Line 360  static void MEMCALL tramw_wt(UINT32 addr | 
 |  |  | 
 | #define GRCGW_RMW(page) {                                                                                       \ | #define GRCGW_RMW(page) {                                                                                       \ | 
 | BYTE    *vram;                                                                                                  \ | BYTE    *vram;                                                                                                  \ | 
| CPU_REMCLOCK -= vramop.grcgwait;                                                                \ | CPU_REMCLOCK -= MEMWAIT_GRCG;                                                                   \ | 
 | address = LOW15(address);                                                                               \ | address = LOW15(address);                                                                               \ | 
 | vramupdate[address] |= (1 << page);                                                             \ | vramupdate[address] |= (1 << page);                                                             \ | 
 | vramupdate[address + 1] |= (1 << page);                                                 \ | vramupdate[address + 1] |= (1 << page);                                                 \ | 
| Line 404  static void MEMCALL tramw_wt(UINT32 addr | Line 406  static void MEMCALL tramw_wt(UINT32 addr | 
 |  |  | 
 | #define GRCGW_TDW(page) {                                                                                       \ | #define GRCGW_TDW(page) {                                                                                       \ | 
 | BYTE    *vram;                                                                                                  \ | BYTE    *vram;                                                                                                  \ | 
| CPU_REMCLOCK -= vramop.grcgwait;                                                                \ | CPU_REMCLOCK -= MEMWAIT_GRCG;                                                                   \ | 
 | address = LOW15(address);                                                                               \ | address = LOW15(address);                                                                               \ | 
 | vramupdate[address] |= (1 << page);                                                             \ | vramupdate[address] |= (1 << page);                                                             \ | 
 | vramupdate[address + 1] |= (1 << page);                                                 \ | vramupdate[address + 1] |= (1 << page);                                                 \ | 
| Line 438  static void MEMCALL grcgw_tdw1(UINT32 ad | Line 440  static void MEMCALL grcgw_tdw1(UINT32 ad | 
 |  |  | 
 | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | if (!(address & 1)) { | if (!(address & 1)) { | 
 | egc_write_w(address, value); | egc_write_w(address, value); | 
 | } | } | 
| Line 453  static void MEMCALL egcw_wt(UINT32 addre | Line 456  static void MEMCALL egcw_wt(UINT32 addre | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL i286w_wb(UINT32 address, REG16 value) { | 
 |  |  | 
| BYTE    *ptr; | mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | 
|  | mem[address + 0x1c8001 - 0xe8000] = (BYTE)(value >> 8); | 
| if ((address & 0x3fff) != 0x3fff) { |  | 
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); |  | 
| STOREINTELWORD(ptr, value); |  | 
| } |  | 
| else { |  | 
| extmem.pageptr[(address >> 14) & 3][0x3fff] = (BYTE)value; |  | 
| extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); |  | 
| } |  | 
 | } | } | 
 |  |  | 
 | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | 
| Line 486  static REG16 MEMCALL i286w_rd(UINT32 add | Line 481  static REG16 MEMCALL i286w_rd(UINT32 add | 
 |  |  | 
 | static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
| Line 515  static REG16 MEMCALL tramw_rd(UINT32 add | Line 510  static REG16 MEMCALL tramw_rd(UINT32 add | 
 |  |  | 
 | static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
 |  |  | 
 | static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); | 
 | } | } | 
 |  |  | 
| Line 530  static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 525  static REG16 MEMCALL grcgw_tcr0(UINT32 a | 
 | BYTE    *vram; | BYTE    *vram; | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | ret = 0; | ret = 0; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 553  static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 548  static REG16 MEMCALL grcgw_tcr1(UINT32 a | 
 | BYTE    *vram; | BYTE    *vram; | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | ret = 0; | ret = 0; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 575  static REG16 MEMCALL egcw_rd(UINT32 addr | Line 570  static REG16 MEMCALL egcw_rd(UINT32 addr | 
 |  |  | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | if (!(address & 1)) { | if (!(address & 1)) { | 
 | return(egc_read_w(address)); | return(egc_read_w(address)); | 
 | } | } | 
| Line 592  static REG16 MEMCALL egcw_rd(UINT32 addr | Line 588  static REG16 MEMCALL egcw_rd(UINT32 addr | 
 | } | } | 
 | } | } | 
 |  |  | 
| static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL i286w_rb(UINT32 address) { | 
|  |  | 
| const BYTE      *ptr; |  | 
| REG16   ret; |  | 
|  |  | 
| if ((address & 0x3fff) != 0x3fff) { |  | 
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); |  | 
| return(LOADINTELWORD(ptr)); |  | 
| } |  | 
| else { |  | 
| ret = extmem.pageptr[(address >> 14) & 3][0x3fff]; |  | 
| ret += extmem.pageptr[((address + 1) >> 14) & 3][0] << 8; |  | 
| return(ret); |  | 
| } |  | 
| } |  | 
|  |  | 
| static REG16 MEMCALL i286w_itf(UINT32 address) { |  | 
 |  |  | 
 | if (CPU_ITFBANK) { | if (CPU_ITFBANK) { | 
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; | 
 | } | } | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
| Line 624  typedef REG8 (MEMCALL * MEM8READ)(UINT32 | Line 604  typedef REG8 (MEMCALL * MEM8READ)(UINT32 | 
 | typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); | typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); | 
 | typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); | typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); | 
 |  |  | 
| static MEM8WRITE memory_write[] = { | typedef struct { | 
| i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 00 | MEM8READ        rd8[0x20]; | 
| i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 20 | MEM8WRITE       wr8[0x20]; | 
| i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 40 | MEM16READ       rd16[0x20]; | 
| i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 60 | MEM16WRITE      wr16[0x20]; | 
| i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 80 | } MEMFN; | 
| tram_wt,        vram_w0,        vram_w0,        vram_w0,                // a0 |  | 
| emmc_wt,        emmc_wt,        i286_wn,        i286_wn,                // c0 | typedef struct { | 
| vram_w0,        i286_wn,        i286_wn,        i286_wn};               // e0 | MEM8READ        brd8; | 
|  | MEM8READ        ird8; | 
|  | MEM8WRITE       ewr8; | 
|  | MEM8WRITE       bwr8; | 
|  | MEM16READ       brd16; | 
|  | MEM16READ       ird16; | 
|  | MEM16WRITE      ewr16; | 
|  | MEM16WRITE      bwr16; | 
|  | } MMAPTBL; | 
|  |  | 
|  | typedef struct { | 
|  | MEM8READ        rd8; | 
|  | MEM8WRITE       wr8; | 
|  | MEM16READ       rd16; | 
|  | MEM16WRITE      wr16; | 
|  | } VACCTBL; | 
 |  |  | 
| static MEM8READ memory_read[] = { | static MEMFN memfn = { | 
| i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 00 | {i286_rd,    i286_rd,        i286_rd,        i286_rd,                // 00 | 
 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 20 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 20 | 
 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 40 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 40 | 
 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 60 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 60 | 
 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 80 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 80 | 
 | tram_rd,        vram_r0,        vram_r0,        vram_r0,                // a0 | tram_rd,        vram_r0,        vram_r0,        vram_r0,                // a0 | 
| emmc_rd,        emmc_rd,        i286_rd,        i286_rd,                // c0 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // c0 | 
| vram_r0,        i286_rd,        i286_rd,        i286_itf};              // f0 | vram_r0,        i286_rd,        i286_rd,        i286_rb},               // e0 | 
 |  |  | 
| static MEM16WRITE memword_write[] = { | {i286_wt,    i286_wt,        i286_wt,        i286_wt,                // 00 | 
| i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 00 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 20 | 
| i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 20 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 40 | 
| i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 40 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 60 | 
| i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 60 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 80 | 
| i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 80 | tram_wt,        vram_w0,        vram_w0,        vram_w0,                // a0 | 
| tramw_wt,       vramw_w0,       vramw_w0,       vramw_w0,               // a0 | i286_wn,        i286_wn,        i286_wn,        i286_wn,                // c0 | 
| emmcw_wt,       emmcw_wt,       i286w_wn,       i286w_wn,               // c0 | vram_w0,        i286_wn,        i286_wn,        i286_wn},               // e0 | 
| vramw_w0,       i286w_wn,       i286w_wn,       i286w_wn};              // e0 |  | 
 |  |  | 
| static MEM16READ memword_read[] = { | {i286w_rd,   i286w_rd,       i286w_rd,       i286w_rd,               // 00 | 
| i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 00 |  | 
 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 20 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 20 | 
 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 40 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 40 | 
 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 60 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 60 | 
 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 80 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 80 | 
 | tramw_rd,       vramw_r0,       vramw_r0,       vramw_r0,               // a0 | tramw_rd,       vramw_r0,       vramw_r0,       vramw_r0,               // a0 | 
| emmcw_rd,       emmcw_rd,       i286w_rd,       i286w_rd,               // c0 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // c0 | 
| vramw_r0,       i286w_rd,       i286w_rd,       i286w_itf};             // e0 | vramw_r0,       i286w_rd,       i286w_rd,       i286w_rb},              // e0 | 
|  |  | 
|  | {i286w_wt,   i286w_wt,       i286w_wt,       i286w_wt,               // 00 | 
|  | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 20 | 
|  | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 40 | 
|  | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 60 | 
|  | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 80 | 
|  | tramw_wt,       vramw_w0,       vramw_w0,       vramw_w0,               // a0 | 
|  | i286w_wn,       i286w_wn,       i286w_wn,       i286w_wn,               // c0 | 
|  | vramw_w0,       i286w_wn,       i286w_wn,       i286w_wn}};             // e0 | 
 |  |  | 
| static const MEM8WRITE vram_write[] = { | static const MMAPTBL mmaptbl[2] = { | 
| vram_w0,        vram_w1,        vram_w0,        vram_w1,                // 00 | {i286_rd,    i286_rb,        i286_wn,        i286_wn, | 
| vram_w0,        vram_w1,        vram_w0,        vram_w1,                // 40 | i286w_rd,       i286w_rb,       i286w_wn,       i286w_wn}, | 
| grcg_tdw0,      grcg_tdw1,      egc_wt,         egc_wt,                 // 80 tdw/tcr | {i286_rb,    i286_rb,        i286_wt,        i286_wb, | 
| grcg_rmw0,      grcg_rmw1,      egc_wt,         egc_wt};                // c0 rmw | i286w_rb,       i286w_rb,       i286w_wt,       i286w_wb}}; | 
|  |  | 
| static const MEM8READ vram_read[] = { | static const VACCTBL vacctbl[0x10] = { | 
| vram_r0,        vram_r1,        vram_r0,        vram_r1,                // 00 | {vram_r0,       vram_w0,        vramw_r0,       vramw_w0},              // 00 | 
| vram_r0,        vram_r1,        vram_r0,        vram_r1,                // 40 | {vram_r1,       vram_w1,        vramw_r1,       vramw_w1}, | 
| grcg_tcr0,      grcg_tcr1,      egc_rd,         egc_rd,                 // 80 tdw/tcr | {vram_r0,       vram_w0,        vramw_r0,       vramw_w0}, | 
| vram_r0,        vram_r1,        egc_rd,         egc_rd};                // c0 rmw | {vram_r1,       vram_w1,        vramw_r1,       vramw_w1}, | 
|  | {vram_r0,       vram_w0,        vramw_r0,       vramw_w0},              // 40 | 
| static const MEM16WRITE vramw_write[] = { | {vram_r1,       vram_w1,        vramw_r1,       vramw_w1}, | 
| vramw_w0,       vramw_w1,       vramw_w0,       vramw_w1,               // 00 | {vram_r0,       vram_w0,        vramw_r0,       vramw_w0}, | 
| vramw_w0,       vramw_w1,       vramw_w0,       vramw_w1,               // 40 | {vram_r1,       vram_w1,        vramw_r1,       vramw_w1}, | 
| grcgw_tdw0,     grcgw_tdw1,     egcw_wt,        egcw_wt,                // 80 tdw/tcr | {grcg_tcr0,     grcg_tdw0,      grcgw_tcr0,     grcgw_tdw0},    // 80 tdw/tcr | 
| grcgw_rmw0,     grcgw_rmw1,     egcw_wt,        egcw_wt};               // c0 rmw | {grcg_tcr1,     grcg_tdw1,      grcgw_tcr1,     grcgw_tdw1}, | 
|  | {egc_rd,        egc_wt,         egcw_rd,        egcw_wt}, | 
| static const MEM16READ vramw_read[] = { | {egc_rd,        egc_wt,         egcw_rd,        egcw_wt}, | 
| vramw_r0,       vramw_r1,       vramw_r0,       vramw_r1,               // 00 | {vram_r0,       grcg_rmw0,      vramw_r0,       grcgw_rmw0},    // c0 rmw | 
| vramw_r0,       vramw_r1,       vramw_r0,       vramw_r1,               // 40 | {vram_r1,       grcg_rmw1,      vramw_r1,       grcgw_rmw1}, | 
| grcgw_tcr0,     grcgw_tcr1,     egcw_rd,        egcw_rd,                // 80 tdw/tcr | {egc_rd,        egc_wt,         egcw_rd,        egcw_wt}, | 
| vramw_r0,       vramw_r1,       egcw_rd,        egcw_rd};               // c0 rmw | {egc_rd,        egc_wt,         egcw_rd,        egcw_wt}}; | 
 |  |  | 
 |  |  | 
 | static REG8 MEMCALL i286_nonram_r(UINT32 address) { | static REG8 MEMCALL i286_nonram_r(UINT32 address) { | 
| Line 701  static REG16 MEMCALL i286_nonram_rw(UINT | Line 703  static REG16 MEMCALL i286_nonram_rw(UINT | 
 | return(0xffff); | return(0xffff); | 
 | } | } | 
 |  |  | 
 |  |  | 
 |  | void MEMCALL i286_memorymap(UINT type) { | 
 |  |  | 
 |  | const MMAPTBL   *mm; | 
 |  |  | 
 |  | mm = mmaptbl + (type & 1); | 
 |  |  | 
 |  | memfn.rd8[0xe8000 >> 15] = mm->brd8; | 
 |  | memfn.rd8[0xf0000 >> 15] = mm->brd8; | 
 |  | memfn.rd8[0xf8000 >> 15] = mm->ird8; | 
 |  |  | 
 |  | memfn.wr8[0xd0000 >> 15] = mm->ewr8; | 
 |  | memfn.wr8[0xd8000 >> 15] = mm->ewr8; | 
 |  | memfn.wr8[0xe8000 >> 15] = mm->bwr8; | 
 |  | memfn.wr8[0xf0000 >> 15] = mm->bwr8; | 
 |  | memfn.wr8[0xf8000 >> 15] = mm->bwr8; | 
 |  |  | 
 |  | memfn.rd16[0xe8000 >> 15] = mm->brd16; | 
 |  | memfn.rd16[0xf0000 >> 15] = mm->brd16; | 
 |  | memfn.rd16[0xf8000 >> 15] = mm->ird16; | 
 |  |  | 
 |  | memfn.wr16[0xd0000 >> 15] = mm->ewr16; | 
 |  | memfn.wr16[0xd8000 >> 15] = mm->ewr16; | 
 |  | memfn.wr16[0xe8000 >> 15] = mm->bwr16; | 
 |  | memfn.wr16[0xf0000 >> 15] = mm->bwr16; | 
 |  | memfn.wr16[0xf8000 >> 15] = mm->bwr16; | 
 |  | } | 
 |  |  | 
 | void MEMCALL i286_vram_dispatch(UINT func) { | void MEMCALL i286_vram_dispatch(UINT func) { | 
 |  |  | 
| UINT    proc; | const VACCTBL   *vacc; | 
 |  |  | 
| proc = func & 0x0f; | vacc = vacctbl + (func & 0x0f); | 
| memory_write[0xa8000 >> 15] = vram_write[proc]; | #if defined(SUPPORT_PC9821) | 
| memory_write[0xb0000 >> 15] = vram_write[proc]; | if (!(func & 0x20)) { | 
| memory_write[0xb8000 >> 15] = vram_write[proc]; | #endif | 
| memory_write[0xe0000 >> 15] = vram_write[proc]; | memfn.rd8[0xa8000 >> 15] = vacc->rd8; | 
|  | memfn.rd8[0xb0000 >> 15] = vacc->rd8; | 
| memory_read[0xa8000 >> 15] = vram_read[proc]; | memfn.rd8[0xb8000 >> 15] = vacc->rd8; | 
| memory_read[0xb0000 >> 15] = vram_read[proc]; | memfn.rd8[0xe0000 >> 15] = vacc->rd8; | 
| memory_read[0xb8000 >> 15] = vram_read[proc]; |  | 
| memory_read[0xe0000 >> 15] = vram_read[proc]; | memfn.wr8[0xa8000 >> 15] = vacc->wr8; | 
|  | memfn.wr8[0xb0000 >> 15] = vacc->wr8; | 
| memword_write[0xa8000 >> 15] = vramw_write[proc]; | memfn.wr8[0xb8000 >> 15] = vacc->wr8; | 
| memword_write[0xb0000 >> 15] = vramw_write[proc]; | memfn.wr8[0xe0000 >> 15] = vacc->wr8; | 
| memword_write[0xb8000 >> 15] = vramw_write[proc]; |  | 
| memword_write[0xe0000 >> 15] = vramw_write[proc]; | memfn.rd16[0xa8000 >> 15] = vacc->rd16; | 
|  | memfn.rd16[0xb0000 >> 15] = vacc->rd16; | 
| memword_read[0xa8000 >> 15] = vramw_read[proc]; | memfn.rd16[0xb8000 >> 15] = vacc->rd16; | 
| memword_read[0xb0000 >> 15] = vramw_read[proc]; | memfn.rd16[0xe0000 >> 15] = vacc->rd16; | 
| memword_read[0xb8000 >> 15] = vramw_read[proc]; |  | 
| memword_read[0xe0000 >> 15] = vramw_read[proc]; | memfn.wr16[0xa8000 >> 15] = vacc->wr16; | 
|  | memfn.wr16[0xb0000 >> 15] = vacc->wr16; | 
| if (!(func & 0x10)) {                                                   // degital | memfn.wr16[0xb8000 >> 15] = vacc->wr16; | 
| memory_write[0xe0000 >> 15] = i286_wn; | memfn.wr16[0xe0000 >> 15] = vacc->wr16; | 
| memword_write[0xe0000 >> 15] = i286w_wn; |  | 
| memory_read[0xe0000 >> 15] = i286_nonram_r; | if (!(func & 0x10)) {                                                   // digital | 
| memword_read[0xe0000 >> 15] = i286_nonram_rw; | memfn.wr8[0xe0000 >> 15] = i286_wn; | 
|  | memfn.wr16[0xe0000 >> 15] = i286w_wn; | 
|  | memfn.rd8[0xe0000 >> 15] = i286_nonram_r; | 
|  | memfn.rd16[0xe0000 >> 15] = i286_nonram_rw; | 
|  | } | 
|  | #if defined(SUPPORT_PC9821) | 
|  | } | 
|  | else { | 
|  | memfn.rd8[0xa8000 >> 15] = mem9821_b0r; | 
|  | memfn.rd8[0xb0000 >> 15] = mem9821_b0r; | 
|  | memfn.rd8[0xb8000 >> 15] = vacc->rd8; | 
|  | memfn.rd8[0xe0000 >> 15] = mem9821_b2r; | 
|  |  | 
|  | memfn.wr8[0xa8000 >> 15] = mem9821_b0w; | 
|  | memfn.wr8[0xb0000 >> 15] = mem9821_b0w; | 
|  | memfn.wr8[0xb8000 >> 15] = vacc->wr8; | 
|  | memfn.wr8[0xe0000 >> 15] = mem9821_b2w; | 
|  |  | 
|  | memfn.rd16[0xa8000 >> 15] = mem9821_b0rw; | 
|  | memfn.rd16[0xb0000 >> 15] = mem9821_b0rw; | 
|  | memfn.rd16[0xb8000 >> 15] = vacc->rd16; | 
|  | memfn.rd16[0xe0000 >> 15] = mem9821_b2rw; | 
|  |  | 
|  | memfn.wr16[0xa8000 >> 15] = mem9821_b0ww; | 
|  | memfn.wr16[0xb0000 >> 15] = mem9821_b0ww; | 
|  | memfn.wr16[0xb8000 >> 15] = vacc->wr16; | 
|  | memfn.wr16[0xe0000 >> 15] = mem9821_b2ww; | 
 | } | } | 
 | #if defined(USE_ASM) |  | 
 | i286a_vram_dispatch(func); |  | 
 | #endif | #endif | 
 | } | } | 
 |  |  | 
 | REG8 MEMCALL __i286_memoryread(UINT32 address) { |  | 
 |  |  | 
| if (address < I286_MEMREADMAX) { | REG8 MEMCALL i286_memoryread(UINT32 addr) { | 
| return(mem[address]); |  | 
|  | UINT32  pos; | 
|  |  | 
|  | if (addr < I286_MEMREADMAX) { | 
|  | return(mem[addr]); | 
 | } | } | 
| #if defined(USE_HIMEM) | else if (addr >= USE_HIMEM) { | 
| else if (address >= 0x10fff0) { | pos = (addr & CPU_ADRSMASK) - 0x100000; | 
| address -= 0x100000; | if (pos < CPU_EXTMEMSIZE) { | 
| if (address < CPU_EXTMEMSIZE) { | return(CPU_EXTMEM[pos]); | 
| return(CPU_EXTMEM[address]); |  | 
 | } | } | 
 |  | else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | 
 |  | return(memfn.rd8[(addr >> 15) & 0x1f](addr - 0x00f00000)); | 
 |  | } | 
 |  | #if defined(SUPPORT_PC9821) | 
 |  | else if (addr >= 0xfff00000) { | 
 |  | return(mem9821_r(addr)); | 
 |  | } | 
 |  | #endif | 
 | else { | else { | 
 | return(0xff); | return(0xff); | 
 | } | } | 
 | } | } | 
 | #endif |  | 
 | else { | else { | 
| return(memory_read[(address >> 15) & 0x1f](address)); | return(memfn.rd8[(addr >> 15) & 0x1f](addr)); | 
 | } | } | 
 | } | } | 
 |  |  | 
| REG16 MEMCALL __i286_memoryread_w(UINT32 address) { | REG16 MEMCALL i286_memoryread_w(UINT32 addr) { | 
 |  |  | 
 |  | UINT32  pos; | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
| if (address < (I286_MEMREADMAX - 1)) { | if (addr < (I286_MEMREADMAX - 1)) { | 
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + addr)); | 
| } |  | 
| #if defined(USE_HIMEM) |  | 
| else if (address >= (0x10fff0 - 1)) { |  | 
| address -= 0x100000; |  | 
| if (address == (0x00fff0 - 1)) { |  | 
| ret = mem[0x100000 + address]; |  | 
| } |  | 
| else if (address < CPU_EXTMEMSIZE) { |  | 
| ret = CPU_EXTMEM[address]; |  | 
| } |  | 
| else { |  | 
| ret = 0xff; |  | 
| } |  | 
| address++; |  | 
| if (address < CPU_EXTMEMSIZE) { |  | 
| ret += CPU_EXTMEM[address] << 8; |  | 
| } |  | 
| else { |  | 
| ret += 0xff00; |  | 
| } |  | 
| return(ret); |  | 
 | } | } | 
 |  | else if ((addr + 1) & 0x7fff) {                         // non 32kb boundary | 
 |  | if (addr >= USE_HIMEM) { | 
 |  | pos = (addr & CPU_ADRSMASK) - 0x100000; | 
 |  | if (pos < CPU_EXTMEMSIZE) { | 
 |  | return(LOADINTELWORD(CPU_EXTMEM + pos)); | 
 |  | } | 
 |  | else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | 
 |  | return(memfn.rd16[(addr >> 15) & 0x1f](addr - 0x00f00000)); | 
 |  | } | 
 |  | #if defined(SUPPORT_PC9821) | 
 |  | else if (addr >= 0xfff00000) { | 
 |  | return(mem9821_rw(addr)); | 
 |  | } | 
 | #endif | #endif | 
| else if ((address & 0x7fff) != 0x7fff) { | else { | 
| return(memword_read[(address >> 15) & 0x1f](address)); | return(0xffff); | 
|  | } | 
|  | } | 
|  | return(memfn.rd16[(addr >> 15) & 0x1f](addr)); | 
 | } | } | 
 | else { | else { | 
| ret = memory_read[(address >> 15) & 0x1f](address); | ret = i286_memoryread(addr); | 
| address++; | ret += (REG16)(i286_memoryread(addr + 1) << 8); | 
| ret += memory_read[(address >> 15) & 0x1f](address) << 8; |  | 
 | return(ret); | return(ret); | 
 | } | } | 
 | } | } | 
 |  |  | 
| UINT32 MEMCALL __i286_memoryread_d(UINT32 address) { | UINT32 MEMCALL i286_memoryread_d(UINT32 addr) { | 
|  |  | 
| UINT32 ret; |  | 
|  |  | 
| ret = __i286_memoryread_w(address); |  | 
| ret |= (UINT32)__i286_memoryread_w(address + 2) << 16; |  | 
|  |  | 
| return ret; |  | 
| } |  | 
 |  |  | 
| void MEMCALL __i286_memorywrite(UINT32 address, REG8 value) { | UINT32  pos; | 
|  | UINT32  ret; | 
 |  |  | 
| if (address < I286_MEMWRITEMAX) { | if (addr < (I286_MEMREADMAX - 3)) { | 
| mem[address] = (BYTE)value; | return(LOADINTELDWORD(mem + addr)); | 
 | } | } | 
| #if defined(USE_HIMEM) | else if (addr >= USE_HIMEM) { | 
| else if (address >= 0x10fff0) { | pos = (addr & CPU_ADRSMASK) - 0x100000; | 
| address -= 0x100000; | if ((pos + 3) < CPU_EXTMEMSIZE) { | 
| if (address < CPU_EXTMEMSIZE) { | return(LOADINTELDWORD(CPU_EXTMEM + pos)); | 
| CPU_EXTMEM[address] = (BYTE)value; |  | 
 | } | } | 
 | } | } | 
| #endif | if (!(addr & 1)) { | 
|  | ret = i286_memoryread_w(addr); | 
|  | ret += (UINT32)i286_memoryread_w(addr + 2) << 16; | 
|  | } | 
 | else { | else { | 
| memory_write[(address >> 15) & 0x1f](address, value); | ret = i286_memoryread(addr); | 
|  | ret += (UINT32)i286_memoryread_w(addr + 1) << 8; | 
|  | ret += (UINT32)i286_memoryread(addr + 3) << 24; | 
 | } | } | 
 |  | return(ret); | 
 | } | } | 
 |  |  | 
| void MEMCALL __i286_memorywrite_w(UINT32 address, REG16 value) { | void MEMCALL i286_memorywrite(UINT32 addr, REG8 value) { | 
 |  |  | 
| if (address < (I286_MEMWRITEMAX - 1)) { | UINT32  pos; | 
| STOREINTELWORD(mem + address, value); |  | 
|  | if (addr < I286_MEMWRITEMAX) { | 
|  | mem[addr] = (BYTE)value; | 
 | } | } | 
| #if defined(USE_HIMEM) | else if (addr >= USE_HIMEM) { | 
| else if (address >= (0x10fff0 - 1)) { | pos = (addr & CPU_ADRSMASK) - 0x100000; | 
| address -= 0x100000; | if (pos < CPU_EXTMEMSIZE) { | 
| if (address == (0x00fff0 - 1)) { | CPU_EXTMEM[pos] = (BYTE)value; | 
| mem[address] = (BYTE)value; |  | 
 | } | } | 
| else if (address < CPU_EXTMEMSIZE) { | else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | 
| CPU_EXTMEM[address] = (BYTE)value; | memfn.wr8[(addr >> 15) & 0x1f](addr - 0x00f00000, value); | 
 | } | } | 
| address++; | #if defined(SUPPORT_PC9821) | 
| if (address < CPU_EXTMEMSIZE) { | else if (addr >= 0xfff00000) { | 
| CPU_EXTMEM[address] = (BYTE)(value >> 8); | mem9821_w(addr, value); | 
|  | } | 
|  | #endif | 
|  | else { | 
|  | TRACEOUT(("mem_w %x %x", addr, value)); | 
 | } | } | 
 | } | } | 
 |  | else { | 
 |  | memfn.wr8[(addr >> 15) & 0x1f](addr, value); | 
 |  | } | 
 |  | } | 
 |  |  | 
 |  | void MEMCALL i286_memorywrite_w(UINT32 addr, REG16 value) { | 
 |  |  | 
 |  | UINT32  pos; | 
 |  |  | 
 |  | if (addr < (I286_MEMWRITEMAX - 1)) { | 
 |  | STOREINTELWORD(mem + addr, value); | 
 |  | } | 
 |  | else if ((addr + 1) & 0x7fff) {                         // non 32kb boundary | 
 |  | if (addr >= USE_HIMEM) { | 
 |  | pos = (addr & CPU_ADRSMASK) - 0x100000; | 
 |  | if (pos < CPU_EXTMEMSIZE) { | 
 |  | STOREINTELWORD(CPU_EXTMEM + pos, value); | 
 |  | } | 
 |  | else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | 
 |  | memfn.wr16[(addr >> 15) & 0x1f](addr - 0x00f00000, value); | 
 |  | } | 
 |  | #if defined(SUPPORT_PC9821) | 
 |  | else if (addr >= 0xfff00000) { | 
 |  | mem9821_ww(addr, value); | 
 |  | } | 
 | #endif | #endif | 
| else if ((address & 0x7fff) != 0x7fff) { | } | 
| memword_write[(address >> 15) & 0x1f](address, value); | else { | 
|  | memfn.wr16[(addr >> 15) & 0x1f](addr, value); | 
|  | } | 
 | } | } | 
 | else { | else { | 
| memory_write[(address >> 15) & 0x1f](address, (BYTE)value); | i286_memorywrite(addr, (UINT8)value); | 
| address++; | i286_memorywrite(addr + 1, (UINT8)(value >> 8)); | 
| memory_write[(address >> 15) & 0x1f](address, (BYTE)(value >> 8)); |  | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL __i286_memorywrite_d(UINT32 address, UINT32 value) { | void MEMCALL i286_memorywrite_d(UINT32 addr, UINT32 value) { | 
|  |  | 
|  | UINT32  pos; | 
 |  |  | 
| __i286_memorywrite_w(address, value & 0xffff); | if (addr < (I286_MEMWRITEMAX - 3)) { | 
| __i286_memorywrite_w(address + 2, (WORD)(value >> 16)); | STOREINTELDWORD(mem + addr, value); | 
|  | return; | 
|  | } | 
|  | else if (addr >= USE_HIMEM) { | 
|  | pos = (addr & CPU_ADRSMASK) - 0x100000; | 
|  | if ((pos + 3) < CPU_EXTMEMSIZE) { | 
|  | STOREINTELDWORD(CPU_EXTMEM + pos, value); | 
|  | return; | 
|  | } | 
|  | } | 
|  | if (!(addr & 1)) { | 
|  | i286_memorywrite_w(addr, (UINT16)value); | 
|  | i286_memorywrite_w(addr + 2, (UINT16)(value >> 16)); | 
|  | } | 
|  | else { | 
|  | i286_memorywrite(addr, (UINT8)value); | 
|  | i286_memorywrite_w(addr + 1, (UINT16)(value >> 8)); | 
|  | i286_memorywrite(addr + 3, (UINT8)(value >> 24)); | 
|  | } | 
 | } | } | 
 |  |  | 
| #if 0 | #ifdef NP2_MEMORY_ASM | 
 | REG8 MEMCALL i286_membyte_read(UINT seg, UINT off) { | REG8 MEMCALL i286_membyte_read(UINT seg, UINT off) { | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
| Line 880  REG16 MEMCALL i286_memword_read(UINT seg | Line 987  REG16 MEMCALL i286_memword_read(UINT seg | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < (I286_MEMREADMAX - 1)) { | if (address < (I286_MEMREADMAX - 1)) { | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
| Line 893  void MEMCALL i286_membyte_write(UINT seg | Line 1000  void MEMCALL i286_membyte_write(UINT seg | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < I286_MEMWRITEMAX) { | if (address < I286_MEMWRITEMAX) { | 
 | mem[address] = (BYTE)value; | mem[address] = (BYTE)value; | 
 | } | } | 
| Line 906  void MEMCALL i286_memword_write(UINT seg | Line 1013  void MEMCALL i286_memword_write(UINT seg | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < (I286_MEMWRITEMAX - 1)) { | if (address < (I286_MEMWRITEMAX - 1)) { | 
 | STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); | 
 | } | } | 
| Line 914  void MEMCALL i286_memword_write(UINT seg | Line 1021  void MEMCALL i286_memword_write(UINT seg | 
 | i286_memorywrite_w(address, value); | i286_memorywrite_w(address, value); | 
 | } | } | 
 | } | } | 
| #endif | #endif /* NP2_MEMORY_ASM */ | 
 |  |  | 
| void MEMCALL i286_memstr_read(UINT seg, UINT off, void *dat, UINT leng) { | void MEMCALL i286_memx_read(UINT32 address, void *dat, UINT leng) { | 
 |  |  | 
| BYTE    *out; | BYTE *out = (BYTE *)dat; | 
| UINT32  adrs; | UINT pos; | 
| UINT    size; | UINT diff; | 
 |  |  | 
| out = (BYTE *)dat; | /* fast memory access */ | 
| adrs = seg << 4; | if (address + leng < I286_MEMREADMAX) { | 
| if ((I286_MEMREADMAX >= 0x10000) && | CopyMemory(dat, mem + address, leng); | 
| (adrs < (I286_MEMREADMAX - 0x10000))) { | return; | 
| if (leng) { | } else if (address >= USE_HIMEM) { | 
| size = 0x10000 - off; | pos = (address & CPU_ADRSMASK) - 0x100000; | 
| if (size >= leng) { | if (pos + leng < CPU_EXTMEMSIZE) { | 
| CopyMemory(out, mem + adrs + off, leng); | CopyMemory(dat, CPU_EXTMEM + pos, leng); | 
| return; | return; | 
| } |  | 
| CopyMemory(out, mem + adrs + off, size); |  | 
| out += size; |  | 
| leng -= size; |  | 
| } |  | 
| while(leng >= 0x10000) { |  | 
| CopyMemory(out, mem + adrs, 0x10000); |  | 
| out += 0x10000; |  | 
| leng -= 0x10000; |  | 
 | } | } | 
| if (leng) { | if (pos < CPU_EXTMEMSIZE) { | 
| CopyMemory(out, mem + adrs, leng); | diff = CPU_EXTMEMSIZE - pos; | 
|  | CopyMemory(out, CPU_EXTMEM + pos, diff); | 
|  | out += diff; | 
|  | leng -= diff; | 
|  | address += diff; | 
 | } | } | 
 | } | } | 
| else { |  | 
| while(leng--) { | /* slow memory access */ | 
| *out++ = i286_memoryread(adrs + off); | while (leng-- > 0) { | 
| off = LOW16(off + 1); | *out++ = i286_memoryread(address++); | 
| } |  | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memstr_write(UINT seg, UINT off, | void MEMCALL i286_memx_write(UINT32 address, const void *dat, UINT leng) | 
| const void *dat, UINT leng) { | { | 
|  | const BYTE *out = (BYTE *)dat; | 
| BYTE    *out; | UINT pos; | 
| UINT32  adrs; | UINT diff; | 
| UINT    size; |  | 
 |  |  | 
| out = (BYTE *)dat; | /* fast memory access */ | 
| adrs = seg << 4; | if (address + leng < I286_MEMREADMAX) { | 
| if ((I286_MEMWRITEMAX >= 0x10000) && | CopyMemory(mem + address, dat, leng); | 
| (adrs < (I286_MEMWRITEMAX - 0x10000))) { | return; | 
| if (leng) { | } else if (address >= USE_HIMEM) { | 
| size = 0x10000 - off; | pos = (address & CPU_ADRSMASK) - 0x100000; | 
| if (size >= leng) { | if (pos + leng < CPU_EXTMEMSIZE) { | 
| CopyMemory(mem + adrs + off, out, leng); | CopyMemory(CPU_EXTMEM + pos, dat, leng); | 
| return; | return; | 
| } | } | 
| CopyMemory(mem + adrs + off, out, size); | if (pos < CPU_EXTMEMSIZE) { | 
| out += size; | diff = CPU_EXTMEMSIZE - pos; | 
| leng -= size; | CopyMemory(CPU_EXTMEM + pos, dat, diff); | 
| } | out += diff; | 
| while(leng >= 0x10000) { | leng -= diff; | 
| CopyMemory(mem + adrs, out, 0x10000); | address += diff; | 
| out += 0x10000; |  | 
| leng -= 0x10000; |  | 
| } |  | 
| if (leng) { |  | 
| CopyMemory(mem + adrs, out, leng); |  | 
 | } | } | 
 | } | } | 
| else { |  | 
| while(leng--) { | /* slow memory access */ | 
| i286_memorywrite(adrs + off, *out++); | while (leng-- > 0) { | 
| off = LOW16(off + 1); | i286_memorywrite(address++, *out++); | 
| } |  | 
 | } | } | 
 | } | } | 
 |  | #endif | 
 |  |  | 
 | void MEMCALL i286_memx_read(UINT32 address, void *dat, UINT leng) { |  | 
 |  |  | 
| if ((address + leng) < I286_MEMREADMAX) { | // ---- | 
| CopyMemory(dat, mem + address, leng); |  | 
| } | static UINT32 realaddr(UINT32 addr) { | 
| else { |  | 
| BYTE *out = (BYTE *)dat; | UINT32  pde; | 
| if (address < I286_MEMREADMAX) { | UINT32  pte; | 
| CopyMemory(out, mem + address, I286_MEMREADMAX - address); |  | 
| out += I286_MEMREADMAX - address; | if (CPU_STAT_PAGING) { | 
| leng -= I286_MEMREADMAX - address; | pde = i286_memoryread_d(CPU_STAT_PDE_BASE + ((addr >> 20) & 0xffc)); | 
| address = I286_MEMREADMAX; | if (!(pde & CPU_PDE_PRESENT)) { | 
|  | goto retdummy; | 
 | } | } | 
| while(leng--) { | pte = cpu_memoryread_d((pde & CPU_PDE_BASEADDR_MASK) + ((addr >> 10) & 0xffc)); | 
| *out++ = i286_memoryread(address++); | if (!(pte & CPU_PTE_PRESENT)) { | 
|  | goto retdummy; | 
 | } | } | 
 |  | addr = (pte & CPU_PTE_BASEADDR_MASK) + (addr & 0x00000fff); | 
 | } | } | 
 |  | return(addr); | 
 |  |  | 
 |  | retdummy: | 
 |  | return(0x01000000);             // てきとーにメモリが存在しない場所 | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memx_write(UINT32 address, const void *dat, UINT leng) { | void MEMCALL i286_memstr_read(UINT seg, UINT off, void *dat, UINT leng) { | 
 |  |  | 
| const BYTE      *out; | UINT32  adrs; | 
|  | UINT    size; | 
 |  |  | 
| if ((address + leng) < I286_MEMWRITEMAX) { | while(leng) { | 
| CopyMemory(mem + address, dat, leng); | off = LOW16(off); | 
|  | adrs = (seg << 4) + off; | 
|  | size = 0x1000 - (adrs & 0xfff); | 
|  | size = min(size, leng); | 
|  | size = min(size, 0x10000 - off); | 
|  | i286_memx_read(realaddr(adrs), dat, size); | 
|  | off += size; | 
|  | dat = ((BYTE *)dat) + size; | 
|  | leng -= size; | 
 | } | } | 
| else { | } | 
| out = (BYTE *)dat; |  | 
| if (address < I286_MEMWRITEMAX) { | void MEMCALL i286_memstr_write(UINT seg, UINT off, const void *dat, UINT leng) { | 
| CopyMemory(mem + address, out, I286_MEMWRITEMAX - address); | UINT32  adrs; | 
| out += I286_MEMWRITEMAX - address; | UINT    size; | 
| leng -= I286_MEMWRITEMAX - address; |  | 
| address = I286_MEMWRITEMAX; | while(leng) { | 
| } | off = LOW16(off); | 
| while(leng--) { | adrs = (seg << 4) + off; | 
| i286_memorywrite(address++, *out++); | size = 0x1000 - (adrs & 0xfff); | 
| } | size = min(size, leng); | 
|  | size = min(size, 0x10000 - off); | 
|  | i286_memx_write(realaddr(adrs), dat, size); | 
|  | off += size; | 
|  | dat = ((BYTE *)dat) + size; | 
|  | leng -= size; | 
 | } | } | 
 | } | } | 
 |  |  | 
 |  |  | 
 |  | #if 0           // テスト | 
 |  | void MEMCALL cpumem_strread(UINT32 adrs, void *dat, UINT leng) { | 
 |  |  | 
 |  | UINT    size; | 
 |  |  | 
 |  | while(leng) { | 
 |  | size = 0x1000 - (adrs & 0xfff); | 
 |  | size = min(size, leng); | 
 |  | i286_memx_read(realaddr(adrs), dat, size); | 
 |  | adrs += size; | 
 |  | dat = ((BYTE *)dat) + size; | 
 |  | leng -= size; | 
 |  | } | 
 |  | } | 
 | #endif | #endif | 
 |  |  |