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| version 1.2, 2003/12/12 01:04:40 | version 1.27, 2005/02/08 09:19:00 |
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| Line 3 | Line 3 |
| #ifndef NP2_MEMORY_ASM | #ifndef NP2_MEMORY_ASM |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "memory.h" | #include "mem9821.h" |
| #include "egcmem.h" | |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "memegc.h" | |
| #include "vram.h" | #include "vram.h" |
| #include "font.h" | #include "font.h" |
| Line 14 | Line 14 |
| BYTE mem[0x200000]; | BYTE mem[0x200000]; |
| #define USE_HIMEM | |
| // ---- write byte | // ---- write byte |
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN |
| mem[address & CPU_ADRSMASK] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; |
| } | } |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { // TRAM |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 55 static void MEMCALL tram_wt(UINT32 addre | Line 53 static void MEMCALL tram_wt(UINT32 addre |
| } | } |
| } | } |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| } | } |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| } | } |
| static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { | static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| Line 100 static void MEMCALL grcg_rmw0(UINT32 add | Line 98 static void MEMCALL grcg_rmw0(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { | static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| Line 129 static void MEMCALL grcg_rmw1(UINT32 add | Line 127 static void MEMCALL grcg_rmw1(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { | static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 153 static void MEMCALL grcg_tdw0(UINT32 add | Line 151 static void MEMCALL grcg_tdw0(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { | static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 177 static void MEMCALL grcg_tdw1(UINT32 add | Line 175 static void MEMCALL grcg_tdw1(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { | static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| memegc_wr8(address, value); | |
| } | |
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { // EMS | |
| CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | |
| } | |
| static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D000〜DFFF | |
| egc_write(address, value); | if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { |
| mem[address] = (BYTE)value; | |
| } | |
| } | } |
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F800〜FFFF |
| extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; |
| } | } |
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wn(UINT32 address, REG8 value) { // NONE |
| (void)address; | (void)address; |
| (void)value; | (void)value; |
| Line 196 static void MEMCALL i286_wn(UINT32 addre | Line 207 static void MEMCALL i286_wn(UINT32 addre |
| // ---- read byte | // ---- read byte |
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) { // MAIN |
| return(mem[address & CPU_ADRSMASK]); | return(mem[address & CPU_ADRSMASK]); |
| } | } |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { // TRAM |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 218 static REG8 MEMCALL tram_rd(UINT32 addre | Line 229 static REG8 MEMCALL tram_rd(UINT32 addre |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| static REG8 MEMCALL grcg_tcr0(UINT32 address) { | static REG8 MEMCALL grcg_tcr0(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| ret = 0; | ret = 0; |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 253 const BYTE *vram; | Line 264 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL grcg_tcr1(UINT32 address) { | static REG8 MEMCALL grcg_tcr1(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 276 const BYTE *vram; | Line 287 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { // VRAM |
| return(egc_read(address)); | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| return(memegc_rd8(address)); | |
| } | } |
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL emmc_rd(UINT32 address) { // EMS |
| return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); | return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); |
| } | } |
| static REG8 MEMCALL i286_itf(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) { // F800-FFFF |
| if (CPU_ITFBANK) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; |
| } | } |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 307 static void MEMCALL i286w_wt(UINT32 addr | Line 319 static void MEMCALL i286w_wt(UINT32 addr |
| static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | |
| if (address < 0xa1fff) { | if (address < 0xa1fff) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 340 static void MEMCALL tramw_wt(UINT32 addr | Line 353 static void MEMCALL tramw_wt(UINT32 addr |
| } | } |
| } | } |
| else if (address < 0xa5000) { | else if (address < 0xa5000) { |
| if (address & 1) { | if (!(address & 1)) { |
| value >>= 8; | value >>= 8; |
| } | } |
| if (cgwindow.writable & 1) { | if (cgwindow.writable & 1) { |
| Line 352 static void MEMCALL tramw_wt(UINT32 addr | Line 365 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_NON(page) { \ | #define GRCGW_NON(page) { \ |
| CPU_REMCLOCK -= vramop.vramwait; \ | CPU_REMCLOCK -= MEMWAIT_VRAM; \ |
| STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ |
| vramupdate[LOW15(address)] |= (1 << page); \ | vramupdate[LOW15(address)] |= (1 << page); \ |
| vramupdate[LOW15(address + 1)] |= (1 << page); \ | vramupdate[LOW15(address + 1)] |= (1 << page); \ |
| Line 361 static void MEMCALL tramw_wt(UINT32 addr | Line 374 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_RMW(page) { \ | #define GRCGW_RMW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| CPU_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 407 static void MEMCALL tramw_wt(UINT32 addr | Line 420 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_TDW(page) { \ | #define GRCGW_TDW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| CPU_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 441 static void MEMCALL grcgw_tdw1(UINT32 ad | Line 454 static void MEMCALL grcgw_tdw1(UINT32 ad |
| static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { |
| if (!(address & 1)) { | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| egc_write_w(address, value); | memegc_wr16(address, value); |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| egc_write(address, (REG8)value); | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| } | |
| else { | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| egc_write(address, (REG8)value); | |
| } | |
| } | |
| } | } |
| static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { |
| Line 461 static void MEMCALL emmcw_wt(UINT32 addr | Line 463 static void MEMCALL emmcw_wt(UINT32 addr |
| BYTE *ptr; | BYTE *ptr; |
| if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { |
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = CPU_EMSPTR[(address >> 14) & 3] + LOW14(address); |
| STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); |
| } | } |
| else { | else { |
| extmem.pageptr[(address >> 14) & 3][0x3fff] = (BYTE)value; | CPU_EMSPTR[(address >> 14) & 3][0x3fff] = (BYTE)value; |
| extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); | CPU_EMSPTR[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); |
| } | } |
| } | } |
| static void MEMCALL i286w_wd(UINT32 address, REG16 value) { | |
| BYTE *ptr; | |
| UINT16 bit; | |
| ptr = mem + address; | |
| bit = 1 << ((address >> 12) & 15); | |
| if ((address + 1) & 0xfff) { | |
| if (CPU_RAM_D000 & bit) { | |
| STOREINTELWORD(ptr, value); | |
| } | |
| } | |
| else { | |
| if (CPU_RAM_D000 & bit) { | |
| ptr[0] = (UINT8)value; | |
| } | |
| if (CPU_RAM_D000 & (bit << 1)) { | |
| ptr[1] = (UINT8)(value >> 8); | |
| } | |
| } | |
| } | |
| static void MEMCALL i286w_wb(UINT32 address, REG16 value) { | |
| BYTE *ptr; | |
| ptr = mem + (address + 0x1c8000 - 0xe8000); | |
| STOREINTELWORD(ptr, value); | |
| } | |
| static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { |
| (void)address; | (void)address; |
| Line 489 static REG16 MEMCALL i286w_rd(UINT32 add | Line 521 static REG16 MEMCALL i286w_rd(UINT32 add |
| static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 518 static REG16 MEMCALL tramw_rd(UINT32 add | Line 550 static REG16 MEMCALL tramw_rd(UINT32 add |
| static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); |
| } | } |
| Line 533 static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 565 static REG16 MEMCALL grcgw_tcr0(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 556 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 588 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 576 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 608 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| static REG16 MEMCALL egcw_rd(UINT32 address) { | static REG16 MEMCALL egcw_rd(UINT32 address) { |
| REG16 ret; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| return(memegc_rd16(address)); | |
| if (!(address & 1)) { | |
| return(egc_read_w(address)); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| ret = egc_read(address); | |
| ret += egc_read(address + 1) << 8; | |
| return(ret); | |
| } | |
| else { | |
| ret = egc_read(address + 1) << 8; | |
| ret += egc_read(address); | |
| return(ret); | |
| } | |
| } | |
| } | } |
| static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL emmcw_rd(UINT32 address) { |
| Line 601 const BYTE *ptr; | Line 618 const BYTE *ptr; |
| REG16 ret; | REG16 ret; |
| if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { |
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = CPU_EMSPTR[(address >> 14) & 3] + LOW14(address); |
| return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); |
| } | } |
| else { | else { |
| ret = extmem.pageptr[(address >> 14) & 3][0x3fff]; | ret = CPU_EMSPTR[(address >> 14) & 3][0x3fff]; |
| ret += extmem.pageptr[((address + 1) >> 14) & 3][0] << 8; | ret += CPU_EMSPTR[((address + 1) >> 14) & 3][0] << 8; |
| return(ret); | return(ret); |
| } | } |
| } | } |
| static REG16 MEMCALL i286w_itf(UINT32 address) { | static REG16 MEMCALL i286w_rb(UINT32 address) { |
| if (CPU_ITFBANK) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; |
| } | } |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 627 typedef REG8 (MEMCALL * MEM8READ)(UINT32 | Line 644 typedef REG8 (MEMCALL * MEM8READ)(UINT32 |
| typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); | typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); |
| typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); | typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); |
| static MEM8WRITE memory_write[] = { | typedef struct { |
| i286_wt, i286_wt, i286_wt, i286_wt, // 00 | MEM8READ rd8[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 20 | MEM8WRITE wr8[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 40 | MEM16READ rd16[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 60 | MEM16WRITE wr16[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 80 | } MEMFN; |
| tram_wt, vram_w0, vram_w0, vram_w0, // a0 | |
| emmc_wt, emmc_wt, i286_wn, i286_wn, // c0 | typedef struct { |
| vram_w0, i286_wn, i286_wn, i286_wn}; // e0 | MEM8READ brd8; // E8000-F7FFF byte read |
| MEM8READ ird8; // F8000-FFFFF byte read | |
| MEM8WRITE bwr8; // E8000-FFFFF byte write | |
| MEM16READ brd16; // E8000-F7FFF word read | |
| MEM16READ ird16; // F8000-FFFFF word read | |
| MEM16WRITE bwr16; // F8000-FFFFF word write | |
| } MMAPTBL; | |
| typedef struct { | |
| MEM8READ rd8; | |
| MEM8WRITE wr8; | |
| MEM16READ rd16; | |
| MEM16WRITE wr16; | |
| } VACCTBL; | |
| static MEM8READ memory_read[] = { | static MEMFN memfn = { |
| i286_rd, i286_rd, i286_rd, i286_rd, // 00 | {i286_rd, i286_rd, i286_rd, i286_rd, // 00 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 20 | i286_rd, i286_rd, i286_rd, i286_rd, // 20 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 40 | i286_rd, i286_rd, i286_rd, i286_rd, // 40 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 60 | i286_rd, i286_rd, i286_rd, i286_rd, // 60 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 80 | i286_rd, i286_rd, i286_rd, i286_rd, // 80 |
| tram_rd, vram_r0, vram_r0, vram_r0, // a0 | tram_rd, vram_r0, vram_r0, vram_r0, // a0 |
| emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 | emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 |
| vram_r0, i286_rd, i286_rd, i286_itf}; // f0 | vram_r0, i286_rd, i286_rd, i286_rb}, // e0 |
| static MEM16WRITE memword_write[] = { | {i286_wt, i286_wt, i286_wt, i286_wt, // 00 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 | i286_wt, i286_wt, i286_wt, i286_wt, // 20 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 | i286_wt, i286_wt, i286_wt, i286_wt, // 40 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 | i286_wt, i286_wt, i286_wt, i286_wt, // 60 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 | i286_wt, i286_wt, i286_wt, i286_wt, // 80 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80 | tram_wt, vram_w0, vram_w0, vram_w0, // a0 |
| tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0 | emmc_wt, emmc_wt, i286_wd, i286_wd, // c0 |
| emmcw_wt, emmcw_wt, i286w_wn, i286w_wn, // c0 | vram_w0, i286_wn, i286_wn, i286_wn}, // e0 |
| vramw_w0, i286w_wn, i286w_wn, i286w_wn}; // e0 | |
| static MEM16READ memword_read[] = { | {i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 | |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 |
| tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 | tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 |
| emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 | emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 |
| vramw_r0, i286w_rd, i286w_rd, i286w_itf}; // e0 | vramw_r0, i286w_rd, i286w_rd, i286w_rb}, // e0 |
| {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80 | |
| tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0 | |
| emmcw_wt, emmcw_wt, i286w_wd, i286w_wd, // c0 | |
| vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0 | |
| static const MEM8WRITE vram_write[] = { | static const MMAPTBL mmaptbl[2] = { |
| vram_w0, vram_w1, vram_w0, vram_w1, // 00 | {i286_rd, i286_rb, i286_wn, |
| vram_w0, vram_w1, vram_w0, vram_w1, // 40 | i286w_rd, i286w_rb, i286w_wn}, |
| grcg_tdw0, grcg_tdw1, egc_wt, egc_wt, // 80 tdw/tcr | {i286_rb, i286_rb, i286_wb, |
| grcg_rmw0, grcg_rmw1, egc_wt, egc_wt}; // c0 rmw | i286w_rb, i286w_rb, i286w_wb}}; |
| static const MEM8READ vram_read[] = { | static const VACCTBL vacctbl[0x10] = { |
| vram_r0, vram_r1, vram_r0, vram_r1, // 00 | {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00 |
| vram_r0, vram_r1, vram_r0, vram_r1, // 40 | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| grcg_tcr0, grcg_tcr1, egc_rd, egc_rd, // 80 tdw/tcr | {vram_r0, vram_w0, vramw_r0, vramw_w0}, |
| vram_r0, vram_r1, egc_rd, egc_rd}; // c0 rmw | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 40 | |
| static const MEM16WRITE vramw_write[] = { | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| vramw_w0, vramw_w1, vramw_w0, vramw_w1, // 00 | {vram_r0, vram_w0, vramw_r0, vramw_w0}, |
| vramw_w0, vramw_w1, vramw_w0, vramw_w1, // 40 | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| grcgw_tdw0, grcgw_tdw1, egcw_wt, egcw_wt, // 80 tdw/tcr | {grcg_tcr0, grcg_tdw0, grcgw_tcr0, grcgw_tdw0}, // 80 tdw/tcr |
| grcgw_rmw0, grcgw_rmw1, egcw_wt, egcw_wt}; // c0 rmw | {grcg_tcr1, grcg_tdw1, grcgw_tcr1, grcgw_tdw1}, |
| {egc_rd, egc_wt, egcw_rd, egcw_wt}, | |
| static const MEM16READ vramw_read[] = { | {egc_rd, egc_wt, egcw_rd, egcw_wt}, |
| vramw_r0, vramw_r1, vramw_r0, vramw_r1, // 00 | {vram_r0, grcg_rmw0, vramw_r0, grcgw_rmw0}, // c0 rmw |
| vramw_r0, vramw_r1, vramw_r0, vramw_r1, // 40 | {vram_r1, grcg_rmw1, vramw_r1, grcgw_rmw1}, |
| grcgw_tcr0, grcgw_tcr1, egcw_rd, egcw_rd, // 80 tdw/tcr | {egc_rd, egc_wt, egcw_rd, egcw_wt}, |
| vramw_r0, vramw_r1, egcw_rd, egcw_rd}; // c0 rmw | {egc_rd, egc_wt, egcw_rd, egcw_wt}}; |
| static REG8 MEMCALL i286_nonram_r(UINT32 address) { | static REG8 MEMCALL i286_nonram_r(UINT32 address) { |
| Line 704 static REG16 MEMCALL i286_nonram_rw(UINT | Line 741 static REG16 MEMCALL i286_nonram_rw(UINT |
| return(0xffff); | return(0xffff); |
| } | } |
| void MEMCALL i286_memorymap(UINT type) { | |
| const MMAPTBL *mm; | |
| mm = mmaptbl + (type & 1); | |
| memfn.rd8[0xe8000 >> 15] = mm->brd8; | |
| memfn.rd8[0xf0000 >> 15] = mm->brd8; | |
| memfn.rd8[0xf8000 >> 15] = mm->ird8; | |
| memfn.wr8[0xe8000 >> 15] = mm->bwr8; | |
| memfn.wr8[0xf0000 >> 15] = mm->bwr8; | |
| memfn.wr8[0xf8000 >> 15] = mm->bwr8; | |
| memfn.rd16[0xe8000 >> 15] = mm->brd16; | |
| memfn.rd16[0xf0000 >> 15] = mm->brd16; | |
| memfn.rd16[0xf8000 >> 15] = mm->ird16; | |
| memfn.wr16[0xe8000 >> 15] = mm->bwr16; | |
| memfn.wr16[0xf0000 >> 15] = mm->bwr16; | |
| memfn.wr16[0xf8000 >> 15] = mm->bwr16; | |
| } | |
| void MEMCALL i286_vram_dispatch(UINT func) { | void MEMCALL i286_vram_dispatch(UINT func) { |
| UINT proc; | const VACCTBL *vacc; |
| proc = func & 0x0f; | #if defined(SUPPORT_PC9821) |
| memory_write[0xa8000 >> 15] = vram_write[proc]; | if (!(func & 0x20)) { |
| memory_write[0xb0000 >> 15] = vram_write[proc]; | #endif |
| memory_write[0xb8000 >> 15] = vram_write[proc]; | vacc = vacctbl + (func & 0x0f); |
| memory_write[0xe0000 >> 15] = vram_write[proc]; | memfn.rd8[0xa8000 >> 15] = vacc->rd8; |
| memfn.rd8[0xb0000 >> 15] = vacc->rd8; | |
| memory_read[0xa8000 >> 15] = vram_read[proc]; | memfn.rd8[0xb8000 >> 15] = vacc->rd8; |
| memory_read[0xb0000 >> 15] = vram_read[proc]; | memfn.rd8[0xe0000 >> 15] = vacc->rd8; |
| memory_read[0xb8000 >> 15] = vram_read[proc]; | |
| memory_read[0xe0000 >> 15] = vram_read[proc]; | memfn.wr8[0xa8000 >> 15] = vacc->wr8; |
| memfn.wr8[0xb0000 >> 15] = vacc->wr8; | |
| memword_write[0xa8000 >> 15] = vramw_write[proc]; | memfn.wr8[0xb8000 >> 15] = vacc->wr8; |
| memword_write[0xb0000 >> 15] = vramw_write[proc]; | memfn.wr8[0xe0000 >> 15] = vacc->wr8; |
| memword_write[0xb8000 >> 15] = vramw_write[proc]; | |
| memword_write[0xe0000 >> 15] = vramw_write[proc]; | memfn.rd16[0xa8000 >> 15] = vacc->rd16; |
| memfn.rd16[0xb0000 >> 15] = vacc->rd16; | |
| memword_read[0xa8000 >> 15] = vramw_read[proc]; | memfn.rd16[0xb8000 >> 15] = vacc->rd16; |
| memword_read[0xb0000 >> 15] = vramw_read[proc]; | memfn.rd16[0xe0000 >> 15] = vacc->rd16; |
| memword_read[0xb8000 >> 15] = vramw_read[proc]; | |
| memword_read[0xe0000 >> 15] = vramw_read[proc]; | memfn.wr16[0xa8000 >> 15] = vacc->wr16; |
| memfn.wr16[0xb0000 >> 15] = vacc->wr16; | |
| if (!(func & 0x10)) { // degital | memfn.wr16[0xb8000 >> 15] = vacc->wr16; |
| memory_write[0xe0000 >> 15] = i286_wn; | memfn.wr16[0xe0000 >> 15] = vacc->wr16; |
| memword_write[0xe0000 >> 15] = i286w_wn; | |
| memory_read[0xe0000 >> 15] = i286_nonram_r; | if (!(func & 0x10)) { // digital |
| memword_read[0xe0000 >> 15] = i286_nonram_rw; | memfn.wr8[0xe0000 >> 15] = i286_wn; |
| memfn.wr16[0xe0000 >> 15] = i286w_wn; | |
| memfn.rd8[0xe0000 >> 15] = i286_nonram_r; | |
| memfn.rd16[0xe0000 >> 15] = i286_nonram_rw; | |
| } | |
| #if defined(SUPPORT_PC9821) | |
| } | |
| else { | |
| memfn.rd8[0xa8000 >> 15] = mem9821_b0r; | |
| memfn.rd8[0xb0000 >> 15] = mem9821_b0r; | |
| memfn.rd8[0xb8000 >> 15] = i286_nonram_r; | |
| memfn.rd8[0xe0000 >> 15] = mem9821_b2r; | |
| memfn.wr8[0xa8000 >> 15] = mem9821_b0w; | |
| memfn.wr8[0xb0000 >> 15] = mem9821_b0w; | |
| memfn.wr8[0xb8000 >> 15] = i286_wn; | |
| memfn.wr8[0xe0000 >> 15] = mem9821_b2w; | |
| memfn.rd16[0xa8000 >> 15] = mem9821_b0rw; | |
| memfn.rd16[0xb0000 >> 15] = mem9821_b0rw; | |
| memfn.rd16[0xb8000 >> 15] = i286_nonram_rw; | |
| memfn.rd16[0xe0000 >> 15] = mem9821_b2rw; | |
| memfn.wr16[0xa8000 >> 15] = mem9821_b0ww; | |
| memfn.wr16[0xb0000 >> 15] = mem9821_b0ww; | |
| memfn.wr16[0xb8000 >> 15] = i286w_wn; | |
| memfn.wr16[0xe0000 >> 15] = mem9821_b2ww; | |
| } | } |
| #if defined(USE_ASM) | |
| i286a_vram_dispatch(func); | |
| #endif | #endif |
| } | } |
| REG8 MEMCALL __i286_memoryread(UINT32 address) { | |
| if (address < I286_MEMREADMAX) { | REG8 MEMCALL i286_memoryread(UINT32 addr) { |
| return(mem[address]); | |
| UINT32 pos; | |
| if (addr < I286_MEMREADMAX) { | |
| return(mem[addr]); | |
| } | } |
| #if defined(USE_HIMEM) | else if (addr >= USE_HIMEM) { |
| else if (address >= 0x10fff0) { | pos = (addr & CPU_ADRSMASK) - 0x100000; |
| address -= 0x100000; | if (pos < CPU_EXTMEMSIZE) { |
| if (address < CPU_EXTMEMSIZE) { | return(CPU_EXTMEM[pos]); |
| return(CPU_EXTMEM[address]); | } |
| else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | |
| return(memfn.rd8[(addr >> 15) & 0x1f](addr - 0x00f00000)); | |
| } | } |
| #if defined(SUPPORT_PC9821) | |
| else if ((addr >= 0x00f00000) && (addr < 0x00f80000)) { | |
| return(mem9821_r(addr)); | |
| } | |
| else if ((addr >= 0xfff00000) && (addr < 0xfff80000)) { | |
| return(mem9821_r(addr)); | |
| } | |
| #endif | |
| else { | else { |
| // TRACEOUT(("out of mem (read8): %x", addr)); | |
| return(0xff); | return(0xff); |
| } | } |
| } | } |
| #endif | |
| else { | else { |
| return(memory_read[(address >> 15) & 0x1f](address)); | return(memfn.rd8[(addr >> 15) & 0x1f](addr)); |
| } | } |
| } | } |
| REG16 MEMCALL __i286_memoryread_w(UINT32 address) { | REG16 MEMCALL i286_memoryread_w(UINT32 addr) { |
| UINT32 pos; | |
| REG16 ret; | REG16 ret; |
| if (address < (I286_MEMREADMAX - 1)) { | if (addr < (I286_MEMREADMAX - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + addr)); |
| } | |
| #if defined(USE_HIMEM) | |
| else if (address >= (0x10fff0 - 1)) { | |
| address -= 0x100000; | |
| if (address == (0x00fff0 - 1)) { | |
| ret = mem[0x100000 + address]; | |
| } | |
| else if (address < CPU_EXTMEMSIZE) { | |
| ret = CPU_EXTMEM[address]; | |
| } | |
| else { | |
| ret = 0xff; | |
| } | |
| address++; | |
| if (address < CPU_EXTMEMSIZE) { | |
| ret += CPU_EXTMEM[address] << 8; | |
| } | |
| else { | |
| ret += 0xff00; | |
| } | |
| return(ret); | |
| } | } |
| else if ((addr + 1) & 0x7fff) { // non 32kb boundary | |
| if (addr >= USE_HIMEM) { | |
| pos = (addr & CPU_ADRSMASK) - 0x100000; | |
| if (pos < CPU_EXTMEMSIZE) { | |
| return(LOADINTELWORD(CPU_EXTMEM + pos)); | |
| } | |
| else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | |
| return(memfn.rd16[(addr >> 15) & 0x1f](addr - 0x00f00000)); | |
| } | |
| #if defined(SUPPORT_PC9821) | |
| else if ((addr >= 0x00f00000) && (addr < 0x00f80000)) { | |
| return(mem9821_rw(addr)); | |
| } | |
| else if ((addr >= 0xfff00000) && (addr < 0xfff80000)) { | |
| return(mem9821_rw(addr)); | |
| } | |
| #endif | #endif |
| else if ((address & 0x7fff) != 0x7fff) { | else { |
| return(memword_read[(address >> 15) & 0x1f](address)); | // TRACEOUT(("out of mem (read16): %x", addr)); |
| return(0xffff); | |
| } | |
| } | |
| return(memfn.rd16[(addr >> 15) & 0x1f](addr)); | |
| } | } |
| else { | else { |
| ret = memory_read[(address >> 15) & 0x1f](address); | ret = i286_memoryread(addr); |
| address++; | ret += (REG16)(i286_memoryread(addr + 1) << 8); |
| ret += memory_read[(address >> 15) & 0x1f](address) << 8; | |
| return(ret); | return(ret); |
| } | } |
| } | } |
| UINT32 MEMCALL __i286_memoryread_d(UINT32 address) { | UINT32 MEMCALL i286_memoryread_d(UINT32 addr) { |
| UINT32 ret; | |
| ret = __i286_memoryread_w(address); | |
| ret |= (UINT32)__i286_memoryread_w(address + 2) << 16; | |
| return ret; | UINT32 pos; |
| } | UINT32 ret; |
| void MEMCALL __i286_memorywrite(UINT32 address, REG8 value) { | |
| if (address < I286_MEMWRITEMAX) { | if (addr < (I286_MEMREADMAX - 3)) { |
| mem[address] = (BYTE)value; | return(LOADINTELDWORD(mem + addr)); |
| } | } |
| #if defined(USE_HIMEM) | else if (addr >= USE_HIMEM) { |
| else if (address >= 0x10fff0) { | pos = (addr & CPU_ADRSMASK) - 0x100000; |
| address -= 0x100000; | if ((pos + 3) < CPU_EXTMEMSIZE) { |
| if (address < CPU_EXTMEMSIZE) { | return(LOADINTELDWORD(CPU_EXTMEM + pos)); |
| CPU_EXTMEM[address] = (BYTE)value; | |
| } | } |
| } | } |
| #endif | if (!(addr & 1)) { |
| ret = i286_memoryread_w(addr); | |
| ret += (UINT32)i286_memoryread_w(addr + 2) << 16; | |
| } | |
| else { | else { |
| memory_write[(address >> 15) & 0x1f](address, value); | ret = i286_memoryread(addr); |
| ret += (UINT32)i286_memoryread_w(addr + 1) << 8; | |
| ret += (UINT32)i286_memoryread(addr + 3) << 24; | |
| } | } |
| return(ret); | |
| } | } |
| void MEMCALL __i286_memorywrite_w(UINT32 address, REG16 value) { | void MEMCALL i286_memorywrite(UINT32 addr, REG8 value) { |
| if (address < (I286_MEMWRITEMAX - 1)) { | UINT32 pos; |
| STOREINTELWORD(mem + address, value); | |
| if (addr < I286_MEMWRITEMAX) { | |
| mem[addr] = (BYTE)value; | |
| } | } |
| #if defined(USE_HIMEM) | else if (addr >= USE_HIMEM) { |
| else if (address >= (0x10fff0 - 1)) { | pos = (addr & CPU_ADRSMASK) - 0x100000; |
| address -= 0x100000; | if (pos < CPU_EXTMEMSIZE) { |
| if (address == (0x00fff0 - 1)) { | CPU_EXTMEM[pos] = (BYTE)value; |
| mem[address] = (BYTE)value; | |
| } | } |
| else if (address < CPU_EXTMEMSIZE) { | else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { |
| CPU_EXTMEM[address] = (BYTE)value; | memfn.wr8[(addr >> 15) & 0x1f](addr - 0x00f00000, value); |
| } | } |
| address++; | #if defined(SUPPORT_PC9821) |
| if (address < CPU_EXTMEMSIZE) { | else if ((addr >= 0x00f00000) && (addr < 0x00f80000)) { |
| CPU_EXTMEM[address] = (BYTE)(value >> 8); | mem9821_w(addr, value); |
| } | |
| else if ((addr >= 0xfff00000) && (addr < 0xfff80000)) { | |
| mem9821_w(addr, value); | |
| } | |
| #endif | |
| else { | |
| // TRACEOUT(("out of mem (write8): %x", addr)); | |
| } | } |
| } | } |
| else { | |
| memfn.wr8[(addr >> 15) & 0x1f](addr, value); | |
| } | |
| } | |
| void MEMCALL i286_memorywrite_w(UINT32 addr, REG16 value) { | |
| UINT32 pos; | |
| if (addr < (I286_MEMWRITEMAX - 1)) { | |
| STOREINTELWORD(mem + addr, value); | |
| } | |
| else if ((addr + 1) & 0x7fff) { // non 32kb boundary | |
| if (addr >= USE_HIMEM) { | |
| pos = (addr & CPU_ADRSMASK) - 0x100000; | |
| if (pos < CPU_EXTMEMSIZE) { | |
| STOREINTELWORD(CPU_EXTMEM + pos, value); | |
| } | |
| else if ((addr >= 0x00fa0000) && (addr < 0x01000000)) { | |
| memfn.wr16[(addr >> 15) & 0x1f](addr - 0x00f00000, value); | |
| } | |
| #if defined(SUPPORT_PC9821) | |
| else if ((addr >= 0x00f00000) && (addr < 0x00f80000)) { | |
| mem9821_ww(addr, value); | |
| } | |
| else if ((addr >= 0xfff00000) && (addr < 0xfff80000)) { | |
| mem9821_ww(addr, value); | |
| } | |
| #endif | #endif |
| else if ((address & 0x7fff) != 0x7fff) { | else { |
| memword_write[(address >> 15) & 0x1f](address, value); | // TRACEOUT(("out of mem (write16): %x", addr)); |
| } | |
| } | |
| else { | |
| memfn.wr16[(addr >> 15) & 0x1f](addr, value); | |
| } | |
| } | } |
| else { | else { |
| memory_write[(address >> 15) & 0x1f](address, (BYTE)value); | i286_memorywrite(addr, (UINT8)value); |
| address++; | i286_memorywrite(addr + 1, (UINT8)(value >> 8)); |
| memory_write[(address >> 15) & 0x1f](address, (BYTE)(value >> 8)); | |
| } | } |
| } | } |
| void MEMCALL __i286_memorywrite_d(UINT32 address, UINT32 value) { | void MEMCALL i286_memorywrite_d(UINT32 addr, UINT32 value) { |
| UINT32 pos; | |
| __i286_memorywrite_w(address, value & 0xffff); | if (addr < (I286_MEMWRITEMAX - 3)) { |
| __i286_memorywrite_w(address + 2, (WORD)(value >> 16)); | STOREINTELDWORD(mem + addr, value); |
| return; | |
| } | |
| else if (addr >= USE_HIMEM) { | |
| pos = (addr & CPU_ADRSMASK) - 0x100000; | |
| if ((pos + 3) < CPU_EXTMEMSIZE) { | |
| STOREINTELDWORD(CPU_EXTMEM + pos, value); | |
| return; | |
| } | |
| } | |
| if (!(addr & 1)) { | |
| i286_memorywrite_w(addr, (UINT16)value); | |
| i286_memorywrite_w(addr + 2, (UINT16)(value >> 16)); | |
| } | |
| else { | |
| i286_memorywrite(addr, (UINT8)value); | |
| i286_memorywrite_w(addr + 1, (UINT16)(value >> 8)); | |
| i286_memorywrite(addr + 3, (UINT8)(value >> 24)); | |
| } | |
| } | } |
| #if 0 | #if 0 |
| Line 870 REG8 MEMCALL i286_membyte_read(UINT seg, | Line 1023 REG8 MEMCALL i286_membyte_read(UINT seg, |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 883 REG16 MEMCALL i286_memword_read(UINT seg | Line 1036 REG16 MEMCALL i286_memword_read(UINT seg |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < (I286_MEMREADMAX - 1)) { | if (address < (I286_MEMREADMAX - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 896 void MEMCALL i286_membyte_write(UINT seg | Line 1049 void MEMCALL i286_membyte_write(UINT seg |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < I286_MEMWRITEMAX) { | if (address < I286_MEMWRITEMAX) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| Line 909 void MEMCALL i286_memword_write(UINT seg | Line 1062 void MEMCALL i286_memword_write(UINT seg |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < (I286_MEMWRITEMAX - 1)) { | if (address < (I286_MEMWRITEMAX - 1)) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| } | } |
| Line 919 void MEMCALL i286_memword_write(UINT seg | Line 1072 void MEMCALL i286_memword_write(UINT seg |
| } | } |
| #endif | #endif |
| void MEMCALL i286_memstr_read(UINT seg, UINT off, void *dat, UINT leng) { | void MEMCALL memp_read(UINT32 address, void *dat, UINT leng) { |
| BYTE *out; | BYTE *out = (BYTE *)dat; |
| UINT32 adrs; | UINT pos; |
| UINT size; | UINT diff; |
| out = (BYTE *)dat; | /* fast memory access */ |
| adrs = seg << 4; | if (address + leng < I286_MEMREADMAX) { |
| if ((I286_MEMREADMAX >= 0x10000) && | CopyMemory(dat, mem + address, leng); |
| (adrs < (I286_MEMREADMAX - 0x10000))) { | return; |
| if (leng) { | } else if (address >= USE_HIMEM) { |
| size = 0x10000 - off; | pos = (address & CPU_ADRSMASK) - 0x100000; |
| if (size >= leng) { | if (pos + leng < CPU_EXTMEMSIZE) { |
| CopyMemory(out, mem + adrs + off, leng); | CopyMemory(dat, CPU_EXTMEM + pos, leng); |
| return; | return; |
| } | |
| CopyMemory(out, mem + adrs + off, size); | |
| out += size; | |
| leng -= size; | |
| } | |
| while(leng >= 0x10000) { | |
| CopyMemory(out, mem + adrs, 0x10000); | |
| out += 0x10000; | |
| leng -= 0x10000; | |
| } | } |
| if (leng) { | if (pos < CPU_EXTMEMSIZE) { |
| CopyMemory(out, mem + adrs, leng); | diff = CPU_EXTMEMSIZE - pos; |
| CopyMemory(out, CPU_EXTMEM + pos, diff); | |
| out += diff; | |
| leng -= diff; | |
| address += diff; | |
| } | } |
| } | } |
| else { | |
| while(leng--) { | /* slow memory access */ |
| *out++ = i286_memoryread(adrs + off); | while (leng-- > 0) { |
| off = LOW16(off + 1); | *out++ = i286_memoryread(address++); |
| } | |
| } | } |
| } | } |
| void MEMCALL i286_memstr_write(UINT seg, UINT off, | void MEMCALL memp_write(UINT32 address, const void *dat, UINT leng) { |
| const void *dat, UINT leng) { | |
| BYTE *out; | const BYTE *out = (BYTE *)dat; |
| UINT32 adrs; | UINT pos; |
| UINT size; | UINT diff; |
| out = (BYTE *)dat; | /* fast memory access */ |
| adrs = seg << 4; | if (address + leng < I286_MEMREADMAX) { |
| if ((I286_MEMWRITEMAX >= 0x10000) && | CopyMemory(mem + address, dat, leng); |
| (adrs < (I286_MEMWRITEMAX - 0x10000))) { | return; |
| if (leng) { | } else if (address >= USE_HIMEM) { |
| size = 0x10000 - off; | pos = (address & CPU_ADRSMASK) - 0x100000; |
| if (size >= leng) { | if (pos + leng < CPU_EXTMEMSIZE) { |
| CopyMemory(mem + adrs + off, out, leng); | CopyMemory(CPU_EXTMEM + pos, dat, leng); |
| return; | return; |
| } | |
| CopyMemory(mem + adrs + off, out, size); | |
| out += size; | |
| leng -= size; | |
| } | |
| while(leng >= 0x10000) { | |
| CopyMemory(mem + adrs, out, 0x10000); | |
| out += 0x10000; | |
| leng -= 0x10000; | |
| } | } |
| if (leng) { | if (pos < CPU_EXTMEMSIZE) { |
| CopyMemory(mem + adrs, out, leng); | diff = CPU_EXTMEMSIZE - pos; |
| CopyMemory(CPU_EXTMEM + pos, dat, diff); | |
| out += diff; | |
| leng -= diff; | |
| address += diff; | |
| } | } |
| } | } |
| /* slow memory access */ | |
| while (leng-- > 0) { | |
| i286_memorywrite(address++, *out++); | |
| } | |
| } | |
| // ---- Logical Space (BIOS) | |
| static UINT32 physicaladdr(UINT32 addr, BOOL wr) { | |
| UINT32 a; | |
| UINT32 pde; | |
| UINT32 pte; | |
| a = CPU_STAT_PDE_BASE + ((addr >> 20) & 0xffc); | |
| pde = i286_memoryread_d(a); | |
| if (!(pde & CPU_PDE_PRESENT)) { | |
| goto retdummy; | |
| } | |
| if (!(pde & CPU_PDE_ACCESS)) { | |
| i286_memorywrite(a, (UINT8)(pde | CPU_PDE_ACCESS)); | |
| } | |
| a = (pde & CPU_PDE_BASEADDR_MASK) + ((addr >> 10) & 0xffc); | |
| pte = cpu_memoryread_d(a); | |
| if (!(pte & CPU_PTE_PRESENT)) { | |
| goto retdummy; | |
| } | |
| if (!(pte & CPU_PTE_ACCESS)) { | |
| i286_memorywrite(a, (UINT8)(pte | CPU_PTE_ACCESS)); | |
| } | |
| if ((wr) && (!(pte & CPU_PTE_DIRTY))) { | |
| i286_memorywrite(a, (UINT8)(pte | CPU_PTE_DIRTY)); | |
| } | |
| addr = (pte & CPU_PTE_BASEADDR_MASK) + (addr & 0x00000fff); | |
| return(addr); | |
| retdummy: | |
| return(0x01000000); // てきとーにメモリが存在しない場所 | |
| } | |
| REG8 MEMCALL meml_read8(UINT seg, UINT off) { | |
| UINT32 addr; | |
| addr = (seg << 4) + LOW16(off); | |
| if (CPU_STAT_PAGING) { | |
| addr = physicaladdr(addr, FALSE); | |
| } | |
| return(i286_memoryread(addr)); | |
| } | |
| REG16 MEMCALL meml_read16(UINT seg, UINT off) { | |
| UINT32 addr; | |
| addr = (seg << 4) + LOW16(off); | |
| if (!CPU_STAT_PAGING) { | |
| return(i286_memoryread_w(addr)); | |
| } | |
| else if ((addr + 1) & 0xfff) { | |
| return(i286_memoryread_w(physicaladdr(addr, FALSE))); | |
| } | |
| return(meml_read8(seg, off) + (meml_read8(seg, off + 1) << 8)); | |
| } | |
| void MEMCALL meml_write8(UINT seg, UINT off, REG8 dat) { | |
| UINT32 addr; | |
| addr = (seg << 4) + LOW16(off); | |
| if (CPU_STAT_PAGING) { | |
| addr = physicaladdr(addr, TRUE); | |
| } | |
| i286_memorywrite(addr, dat); | |
| } | |
| void MEMCALL meml_write16(UINT seg, UINT off, REG16 dat) { | |
| UINT32 addr; | |
| addr = (seg << 4) + LOW16(off); | |
| if (!CPU_STAT_PAGING) { | |
| i286_memorywrite_w(addr, dat); | |
| } | |
| else if ((addr + 1) & 0xfff) { | |
| i286_memorywrite_w(physicaladdr(addr, TRUE), dat); | |
| } | |
| else { | else { |
| while(leng--) { | meml_write8(seg, off, (REG8)dat); |
| i286_memorywrite(adrs + off, *out++); | meml_write8(seg, off + 1, (REG8)(dat >> 8)); |
| off = LOW16(off + 1); | |
| } | |
| } | } |
| } | } |
| void MEMCALL i286_memx_read(UINT32 address, void *dat, UINT leng) { | void MEMCALL meml_readstr(UINT seg, UINT off, void *dat, UINT leng) { |
| if ((address + leng) < I286_MEMREADMAX) { | UINT32 addr; |
| CopyMemory(dat, mem + address, leng); | UINT rem; |
| UINT size; | |
| while(leng) { | |
| off = LOW16(off); | |
| addr = (seg << 4) + off; | |
| rem = 0x10000 - off; | |
| size = min(leng, rem); | |
| if (CPU_STAT_PAGING) { | |
| rem = 0x1000 - (addr & 0xfff); | |
| size = min(size, rem); | |
| addr = physicaladdr(addr, FALSE); | |
| } | |
| memp_read(addr, dat, size); | |
| off += size; | |
| dat = ((BYTE *)dat) + size; | |
| leng -= size; | |
| } | |
| } | |
| void MEMCALL meml_writestr(UINT seg, UINT off, const void *dat, UINT leng) { | |
| UINT32 addr; | |
| UINT rem; | |
| UINT size; | |
| while(leng) { | |
| off = LOW16(off); | |
| addr = (seg << 4) + off; | |
| rem = 0x10000 - off; | |
| size = min(leng, rem); | |
| if (CPU_STAT_PAGING) { | |
| rem = 0x1000 - (addr & 0xfff); | |
| size = min(size, rem); | |
| addr = physicaladdr(addr, TRUE); | |
| } | |
| memp_write(addr, dat, size); | |
| off += size; | |
| dat = ((BYTE *)dat) + size; | |
| leng -= size; | |
| } | |
| } | |
| void MEMCALL meml_read(UINT32 address, void *dat, UINT leng) { | |
| UINT size; | |
| if (!CPU_STAT_PAGING) { | |
| memp_read(address, dat, leng); | |
| } | } |
| else { | else { |
| BYTE *out = (BYTE *)dat; | while(leng) { |
| if (address < I286_MEMREADMAX) { | size = 0x1000 - (address & 0xfff); |
| CopyMemory(out, mem + address, I286_MEMREADMAX - address); | size = min(size, leng); |
| out += I286_MEMREADMAX - address; | memp_read(physicaladdr(address, FALSE), dat, size); |
| leng -= I286_MEMREADMAX - address; | address += size; |
| address = I286_MEMREADMAX; | dat = ((BYTE *)dat) + size; |
| } | leng -= size; |
| while(leng--) { | |
| *out++ = i286_memoryread(address++); | |
| } | } |
| } | } |
| } | } |
| void MEMCALL i286_memx_write(UINT32 address, const void *dat, UINT leng) { | void MEMCALL meml_write(UINT32 address, const void *dat, UINT leng) { |
| const BYTE *out; | UINT size; |
| if ((address + leng) < I286_MEMWRITEMAX) { | if (!CPU_STAT_PAGING) { |
| CopyMemory(mem + address, dat, leng); | memp_write(address, dat, leng); |
| } | } |
| else { | else { |
| out = (BYTE *)dat; | while(leng) { |
| if (address < I286_MEMWRITEMAX) { | size = 0x1000 - (address & 0xfff); |
| CopyMemory(mem + address, out, I286_MEMWRITEMAX - address); | size = min(size, leng); |
| out += I286_MEMWRITEMAX - address; | memp_write(physicaladdr(address, TRUE), dat, size); |
| leng -= I286_MEMWRITEMAX - address; | address += size; |
| address = I286_MEMWRITEMAX; | dat = ((BYTE *)dat) + size; |
| } | leng -= size; |
| while(leng--) { | |
| i286_memorywrite(address++, *out++); | |
| } | } |
| } | } |
| } | } |
| #endif | #endif |