np2/i386c/memory.c - diff

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Diff for /np2/i386c/memory.c between versions 1.20 and 1.21

version 1.20, 2004/03/19 00:30:01	version 1.21, 2004/03/23 04:45:03
Line 19	Line 19

// ---- write byte	// ---- write byte

static void MEMCALL i286_wt(UINT32 address, REG8 value) {	static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN

mem[address & CPU_ADRSMASK] = (BYTE)value;	mem[address & CPU_ADRSMASK] = (BYTE)value;
}	}

static void MEMCALL tram_wt(UINT32 address, REG8 value) {	static void MEMCALL tram_wt(UINT32 address, REG8 value) { // VRAM

CPU_REMCLOCK -= MEMWAIT_TRAM;	CPU_REMCLOCK -= MEMWAIT_TRAM;
if (address < 0xa2000) {	if (address < 0xa2000) {
Line 56 static void MEMCALL tram_wt(UINT32 addre	Line 56 static void MEMCALL tram_wt(UINT32 addre
}	}
}	}

static void MEMCALL vram_w0(UINT32 address, REG8 value) {	static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM

CPU_REMCLOCK -= MEMWAIT_VRAM;	CPU_REMCLOCK -= MEMWAIT_VRAM;
mem[address] = (BYTE)value;	mem[address] = (BYTE)value;
Line 64 static void MEMCALL vram_w0(UINT32 addre	Line 64 static void MEMCALL vram_w0(UINT32 addre
gdcs.grphdisp \|= 1;	gdcs.grphdisp \|= 1;
}	}

static void MEMCALL vram_w1(UINT32 address, REG8 value) {	static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM

CPU_REMCLOCK -= MEMWAIT_VRAM;	CPU_REMCLOCK -= MEMWAIT_VRAM;
mem[address + VRAM_STEP] = (BYTE)value;	mem[address + VRAM_STEP] = (BYTE)value;
Line 72 static void MEMCALL vram_w1(UINT32 addre	Line 72 static void MEMCALL vram_w1(UINT32 addre
gdcs.grphdisp \|= 2;	gdcs.grphdisp \|= 2;
}	}

static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) {	static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM

REG8 mask;	REG8 mask;
BYTE *vram;	BYTE *vram;
Line 101 static void MEMCALL grcg_rmw0(UINT32 add	Line 101 static void MEMCALL grcg_rmw0(UINT32 add
}	}
}	}

static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) {	static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM

REG8 mask;	REG8 mask;
BYTE *vram;	BYTE *vram;
Line 130 static void MEMCALL grcg_rmw1(UINT32 add	Line 130 static void MEMCALL grcg_rmw1(UINT32 add
}	}
}	}

static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) {	static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM

BYTE *vram;	BYTE *vram;

Line 154 static void MEMCALL grcg_tdw0(UINT32 add	Line 154 static void MEMCALL grcg_tdw0(UINT32 add
(void)value;	(void)value;
}	}

static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) {	static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM

BYTE *vram;	BYTE *vram;

Line 178 static void MEMCALL grcg_tdw1(UINT32 add	Line 178 static void MEMCALL grcg_tdw1(UINT32 add
(void)value;	(void)value;
}	}

static void MEMCALL egc_wt(UINT32 address, REG8 value) {	static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM

CPU_REMCLOCK -= MEMWAIT_GRCG;	CPU_REMCLOCK -= MEMWAIT_GRCG;
egc_write(address, value);	egc_write(address, value);
}	}

static void MEMCALL i286_wb(UINT32 address, REG8 value) {	static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D0000¡ÁDFFFF

	if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) {
	mem[address] = (BYTE)value;
	}
	}

	static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F8000¡ÁFFFFF

mem[address + 0x1c8000 - 0xe8000] = (BYTE)value;	mem[address + 0x1c8000 - 0xe8000] = (BYTE)value;
}	}
Line 456 static void MEMCALL egcw_wt(UINT32 addre	Line 463 static void MEMCALL egcw_wt(UINT32 addre
}	}
}	}

	static void MEMCALL i286w_wd(UINT32 address, REG16 value) {

	BYTE *ptr;
	UINT16 bit;

	ptr = mem + address;
	bit = 1 << ((address >> 12) & 15);
	if ((address + 1) & 0xfff) {
	if (CPU_RAM_D000 & bit) {
	STOREINTELWORD(ptr, value);
	}
	}
	else {
	if (CPU_RAM_D000 & bit) {
	ptr[0] = (UINT8)value;
	}
	if (CPU_RAM_D000 & (bit << 1)) {
	ptr[1] = (UINT8)(value >> 8);
	}
	}
	}

static void MEMCALL i286w_wb(UINT32 address, REG16 value) {	static void MEMCALL i286w_wb(UINT32 address, REG16 value) {

mem[address + 0x1c8000 - 0xe8000] = (BYTE)value;	BYTE *ptr;
mem[address + 0x1c8001 - 0xe8000] = (BYTE)(value >> 8);
	ptr = mem + (address + 0x1c8000 - 0xe8000);
	STOREINTELWORD(ptr, value);
}	}

static void MEMCALL i286w_wn(UINT32 address, REG16 value) {	static void MEMCALL i286w_wn(UINT32 address, REG16 value) {
Line 612 typedef struct {	Line 643 typedef struct {
} MEMFN;	} MEMFN;

typedef struct {	typedef struct {
MEM8READ brd8;	MEM8READ brd8; // E8000-F7FFF byte read
MEM8READ ird8;	MEM8READ ird8; // F8000-FFFFF byte read
MEM8WRITE ewr8;	MEM8WRITE bwr8; // E8000-FFFFF byte write
MEM8WRITE bwr8;	MEM16READ brd16; // E8000-F7FFF word read
MEM16READ brd16;	MEM16READ ird16; // F8000-FFFFF word read
MEM16READ ird16;	MEM16WRITE bwr16; // F8000-FFFFF word write
MEM16WRITE ewr16;
MEM16WRITE bwr16;
} MMAPTBL;	} MMAPTBL;

typedef struct {	typedef struct {
Line 645 static MEMFN memfn = {	Line 674 static MEMFN memfn = {
i286_wt, i286_wt, i286_wt, i286_wt, // 60	i286_wt, i286_wt, i286_wt, i286_wt, // 60
i286_wt, i286_wt, i286_wt, i286_wt, // 80	i286_wt, i286_wt, i286_wt, i286_wt, // 80
tram_wt, vram_w0, vram_w0, vram_w0, // a0	tram_wt, vram_w0, vram_w0, vram_w0, // a0
i286_wn, i286_wn, i286_wn, i286_wn, // c0	i286_wn, i286_wn, i286_wd, i286_wd, // c0
vram_w0, i286_wn, i286_wn, i286_wn}, // e0	vram_w0, i286_wn, i286_wn, i286_wn}, // e0

{i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00	{i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00
Line 663 static MEMFN memfn = {	Line 692 static MEMFN memfn = {
i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60	i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60
i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80	i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80
tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0	tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0
i286w_wn, i286w_wn, i286w_wn, i286w_wn, // c0	i286w_wn, i286w_wn, i286w_wd, i286w_wd, // c0
vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0	vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0

static const MMAPTBL mmaptbl[2] = {	static const MMAPTBL mmaptbl[2] = {
{i286_rd, i286_rb, i286_wn, i286_wn,	{i286_rd, i286_rb, i286_wn,
i286w_rd, i286w_rb, i286w_wn, i286w_wn},	i286w_rd, i286w_rb, i286w_wn},
{i286_rb, i286_rb, i286_wt, i286_wb,	{i286_rb, i286_rb, i286_wb,
i286w_rb, i286w_rb, i286w_wt, i286w_wb}};	i286w_rb, i286w_rb, i286w_wb}};

static const VACCTBL vacctbl[0x10] = {	static const VACCTBL vacctbl[0x10] = {
{vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00	{vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00
Line 713 const MMAPTBL *mm;	Line 742 const MMAPTBL *mm;
memfn.rd8[0xe8000 >> 15] = mm->brd8;	memfn.rd8[0xe8000 >> 15] = mm->brd8;
memfn.rd8[0xf0000 >> 15] = mm->brd8;	memfn.rd8[0xf0000 >> 15] = mm->brd8;
memfn.rd8[0xf8000 >> 15] = mm->ird8;	memfn.rd8[0xf8000 >> 15] = mm->ird8;

memfn.wr8[0xd0000 >> 15] = mm->ewr8;
memfn.wr8[0xd8000 >> 15] = mm->ewr8;
memfn.wr8[0xe8000 >> 15] = mm->bwr8;	memfn.wr8[0xe8000 >> 15] = mm->bwr8;
memfn.wr8[0xf0000 >> 15] = mm->bwr8;	memfn.wr8[0xf0000 >> 15] = mm->bwr8;
memfn.wr8[0xf8000 >> 15] = mm->bwr8;	memfn.wr8[0xf8000 >> 15] = mm->bwr8;
Line 723 const MMAPTBL *mm;	Line 749 const MMAPTBL *mm;
memfn.rd16[0xe8000 >> 15] = mm->brd16;	memfn.rd16[0xe8000 >> 15] = mm->brd16;
memfn.rd16[0xf0000 >> 15] = mm->brd16;	memfn.rd16[0xf0000 >> 15] = mm->brd16;
memfn.rd16[0xf8000 >> 15] = mm->ird16;	memfn.rd16[0xf8000 >> 15] = mm->ird16;

memfn.wr16[0xd0000 >> 15] = mm->ewr16;
memfn.wr16[0xd8000 >> 15] = mm->ewr16;
memfn.wr16[0xe8000 >> 15] = mm->bwr16;	memfn.wr16[0xe8000 >> 15] = mm->bwr16;
memfn.wr16[0xf0000 >> 15] = mm->bwr16;	memfn.wr16[0xf0000 >> 15] = mm->bwr16;
memfn.wr16[0xf8000 >> 15] = mm->bwr16;	memfn.wr16[0xf8000 >> 15] = mm->bwr16;

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Removed from v.1.20
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	Added in v.1.21