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| version 1.22, 2004/03/29 05:50:29 | version 1.25, 2004/04/05 12:02:30 |
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| Line 3 | Line 3 |
| #ifndef NP2_MEMORY_ASM | #ifndef NP2_MEMORY_ASM |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "memory.h" | |
| #include "egcmem.h" | #include "egcmem.h" |
| #include "mem9821.h" | #include "mem9821.h" |
| #include "pccore.h" | #include "pccore.h" |
| Line 17 | Line 16 |
| // ---- write byte | // ---- write byte |
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN | static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN |
| mem[address & CPU_ADRSMASK] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; |
| } | } |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { // VRAM | static void MEMCALL tram_wt(UINT32 address, REG8 value) { // TRAM |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| Line 54 static void MEMCALL tram_wt(UINT32 addre | Line 53 static void MEMCALL tram_wt(UINT32 addre |
| } | } |
| } | } |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM | static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| Line 62 static void MEMCALL vram_w0(UINT32 addre | Line 61 static void MEMCALL vram_w0(UINT32 addre |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| } | } |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM | static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| Line 70 static void MEMCALL vram_w1(UINT32 addre | Line 69 static void MEMCALL vram_w1(UINT32 addre |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| } | } |
| static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| Line 99 static void MEMCALL grcg_rmw0(UINT32 add | Line 98 static void MEMCALL grcg_rmw0(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| Line 128 static void MEMCALL grcg_rmw1(UINT32 add | Line 127 static void MEMCALL grcg_rmw1(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| Line 152 static void MEMCALL grcg_tdw0(UINT32 add | Line 151 static void MEMCALL grcg_tdw0(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| Line 176 static void MEMCALL grcg_tdw1(UINT32 add | Line 175 static void MEMCALL grcg_tdw1(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM | static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| egc_write(address, value); | egc_write(address, value); |
| } | } |
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL emmc_wt(UINT32 address, REG8 value) { // EMS |
| CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; |
| } | } |
| static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D0000¡ÁDFFFF | static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D000¡ÁDFFF |
| if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { | if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| } | } |
| static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F8000¡ÁFFFFF | static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F800¡ÁFFFF |
| mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; |
| } | } |
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wn(UINT32 address, REG8 value) { // NONE |
| (void)address; | (void)address; |
| (void)value; | (void)value; |
| Line 208 static void MEMCALL i286_wn(UINT32 addre | Line 207 static void MEMCALL i286_wn(UINT32 addre |
| // ---- read byte | // ---- read byte |
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) { // MAIN |
| return(mem[address & CPU_ADRSMASK]); | return(mem[address & CPU_ADRSMASK]); |
| } | } |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { // TRAM |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| Line 230 static REG8 MEMCALL tram_rd(UINT32 addre | Line 229 static REG8 MEMCALL tram_rd(UINT32 addre |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| static REG8 MEMCALL grcg_tcr0(UINT32 address) { | static REG8 MEMCALL grcg_tcr0(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| Line 265 const BYTE *vram; | Line 264 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL grcg_tcr1(UINT32 address) { | static REG8 MEMCALL grcg_tcr1(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| Line 288 const BYTE *vram; | Line 287 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| return(egc_read(address)); | return(egc_read(address)); |
| } | } |
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL emmc_rd(UINT32 address) { // EMS |
| return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); | return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); |
| } | } |
| static REG8 MEMCALL i286_rb(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) { // F800-FFFF |
| if (CPU_ITFBANK) { | if (CPU_ITFBANK) { |
| address += VRAM_STEP; | address += VRAM_STEP; |
| Line 456 static void MEMCALL grcgw_tdw1(UINT32 ad | Line 455 static void MEMCALL grcgw_tdw1(UINT32 ad |
| static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| if (!(address & 1)) { | egc_write_w(address, value); |
| egc_write_w(address, value); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| egc_write(address, (REG8)value); | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| } | |
| else { | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| egc_write(address, (REG8)value); | |
| } | |
| } | |
| } | } |
| static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { |
| Line 621 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 608 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| static REG16 MEMCALL egcw_rd(UINT32 address) { | static REG16 MEMCALL egcw_rd(UINT32 address) { |
| REG16 ret; | |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| if (!(address & 1)) { | return(egc_read_w(address)); |
| return(egc_read_w(address)); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| ret = egc_read(address); | |
| ret += egc_read(address + 1) << 8; | |
| return(ret); | |
| } | |
| else { | |
| ret = egc_read(address + 1) << 8; | |
| ret += egc_read(address); | |
| return(ret); | |
| } | |
| } | |
| } | } |
| static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL emmcw_rd(UINT32 address) { |
| Line 796 void MEMCALL i286_vram_dispatch(UINT fun | Line 767 void MEMCALL i286_vram_dispatch(UINT fun |
| const VACCTBL *vacc; | const VACCTBL *vacc; |
| vacc = vacctbl + (func & 0x0f); | |
| #if defined(SUPPORT_PC9821) | #if defined(SUPPORT_PC9821) |
| if (!(func & 0x20)) { | if (!(func & 0x20)) { |
| #endif | #endif |
| vacc = vacctbl + (func & 0x0f); | |
| memfn.rd8[0xa8000 >> 15] = vacc->rd8; | memfn.rd8[0xa8000 >> 15] = vacc->rd8; |
| memfn.rd8[0xb0000 >> 15] = vacc->rd8; | memfn.rd8[0xb0000 >> 15] = vacc->rd8; |
| memfn.rd8[0xb8000 >> 15] = vacc->rd8; | memfn.rd8[0xb8000 >> 15] = vacc->rd8; |
| Line 831 const VACCTBL *vacc; | Line 802 const VACCTBL *vacc; |
| else { | else { |
| memfn.rd8[0xa8000 >> 15] = mem9821_b0r; | memfn.rd8[0xa8000 >> 15] = mem9821_b0r; |
| memfn.rd8[0xb0000 >> 15] = mem9821_b0r; | memfn.rd8[0xb0000 >> 15] = mem9821_b0r; |
| memfn.rd8[0xb8000 >> 15] = vacc->rd8; | memfn.rd8[0xb8000 >> 15] = i286_nonram_r; |
| memfn.rd8[0xe0000 >> 15] = mem9821_b2r; | memfn.rd8[0xe0000 >> 15] = mem9821_b2r; |
| memfn.wr8[0xa8000 >> 15] = mem9821_b0w; | memfn.wr8[0xa8000 >> 15] = mem9821_b0w; |
| memfn.wr8[0xb0000 >> 15] = mem9821_b0w; | memfn.wr8[0xb0000 >> 15] = mem9821_b0w; |
| memfn.wr8[0xb8000 >> 15] = vacc->wr8; | memfn.wr8[0xb8000 >> 15] = i286_wn; |
| memfn.wr8[0xe0000 >> 15] = mem9821_b2w; | memfn.wr8[0xe0000 >> 15] = mem9821_b2w; |
| memfn.rd16[0xa8000 >> 15] = mem9821_b0rw; | memfn.rd16[0xa8000 >> 15] = mem9821_b0rw; |
| memfn.rd16[0xb0000 >> 15] = mem9821_b0rw; | memfn.rd16[0xb0000 >> 15] = mem9821_b0rw; |
| memfn.rd16[0xb8000 >> 15] = vacc->rd16; | memfn.rd16[0xb8000 >> 15] = i286_nonram_rw; |
| memfn.rd16[0xe0000 >> 15] = mem9821_b2rw; | memfn.rd16[0xe0000 >> 15] = mem9821_b2rw; |
| memfn.wr16[0xa8000 >> 15] = mem9821_b0ww; | memfn.wr16[0xa8000 >> 15] = mem9821_b0ww; |
| memfn.wr16[0xb0000 >> 15] = mem9821_b0ww; | memfn.wr16[0xb0000 >> 15] = mem9821_b0ww; |
| memfn.wr16[0xb8000 >> 15] = vacc->wr16; | memfn.wr16[0xb8000 >> 15] = i286w_wn; |
| memfn.wr16[0xe0000 >> 15] = mem9821_b2ww; | memfn.wr16[0xe0000 >> 15] = mem9821_b2ww; |
| } | } |
| #endif | #endif |
| Line 1166 void MEMCALL memp_write(UINT32 address, | Line 1137 void MEMCALL memp_write(UINT32 address, |
| // ---- Logical Space (BIOS) | // ---- Logical Space (BIOS) |
| static UINT32 physicaladdr(UINT32 addr) { | static UINT32 physicaladdr(UINT32 addr, BOOL wr) { |
| UINT32 a; | UINT32 a; |
| UINT32 pde; | UINT32 pde; |
| UINT32 pte; | UINT32 pte; |
| if (CPU_STAT_PAGING) { | a = CPU_STAT_PDE_BASE + ((addr >> 20) & 0xffc); |
| a = CPU_STAT_PDE_BASE + ((addr >> 20) & 0xffc); | pde = i286_memoryread_d(a); |
| pde = i286_memoryread_d(a); | if (!(pde & CPU_PDE_PRESENT)) { |
| if (!(pde & CPU_PDE_PRESENT)) { | goto retdummy; |
| goto retdummy; | } |
| } | if (!(pde & CPU_PDE_ACCESS)) { |
| #if 0 | i286_memorywrite(a, (UINT8)(pde | CPU_PDE_ACCESS)); |
| if (!(pde & CPU_PDE_ACCESS)) { | } |
| i286_memorywrite_d(a, pde | CPU_PDE_ACCESS); | a = (pde & CPU_PDE_BASEADDR_MASK) + ((addr >> 10) & 0xffc); |
| } | pte = cpu_memoryread_d(a); |
| #endif | if (!(pte & CPU_PTE_PRESENT)) { |
| a = (pde & CPU_PDE_BASEADDR_MASK) + ((addr >> 10) & 0xffc); | goto retdummy; |
| pte = cpu_memoryread_d(a); | } |
| if (!(pte & CPU_PTE_PRESENT)) { | if (!(pte & CPU_PTE_ACCESS)) { |
| goto retdummy; | i286_memorywrite(a, (UINT8)(pte | CPU_PTE_ACCESS)); |
| } | } |
| #if 0 | if ((wr) && (!(pte & CPU_PTE_DIRTY))) { |
| if (!(pte & CPU_PTE_ACCESS)) { | i286_memorywrite(a, (UINT8)(pte | CPU_PTE_DIRTY)); |
| i286_memorywrite_d(a, pte | CPU_PTE_ACCESS); | |
| } | |
| #endif | |
| addr = (pte & CPU_PTE_BASEADDR_MASK) + (addr & 0x00000fff); | |
| } | } |
| addr = (pte & CPU_PTE_BASEADDR_MASK) + (addr & 0x00000fff); | |
| return(addr); | return(addr); |
| retdummy: | retdummy: |
| Line 1208 REG8 MEMCALL meml_read8(UINT seg, UINT o | Line 1176 REG8 MEMCALL meml_read8(UINT seg, UINT o |
| addr = (seg << 4) + LOW16(off); | addr = (seg << 4) + LOW16(off); |
| if (CPU_STAT_PAGING) { | if (CPU_STAT_PAGING) { |
| addr = physicaladdr(addr); | addr = physicaladdr(addr, FALSE); |
| } | } |
| return(i286_memoryread(addr)); | return(i286_memoryread(addr)); |
| } | } |
| Line 1222 REG16 MEMCALL meml_read16(UINT seg, UINT | Line 1190 REG16 MEMCALL meml_read16(UINT seg, UINT |
| return(i286_memoryread_w(addr)); | return(i286_memoryread_w(addr)); |
| } | } |
| else if ((addr + 1) & 0xfff) { | else if ((addr + 1) & 0xfff) { |
| return(i286_memoryread_w(physicaladdr(addr))); | return(i286_memoryread_w(physicaladdr(addr, FALSE))); |
| } | } |
| return(meml_read8(seg, off) + (meml_read8(seg, off + 1) << 8)); | return(meml_read8(seg, off) + (meml_read8(seg, off + 1) << 8)); |
| } | } |
| Line 1233 void MEMCALL meml_write8(UINT seg, UINT | Line 1201 void MEMCALL meml_write8(UINT seg, UINT |
| addr = (seg << 4) + LOW16(off); | addr = (seg << 4) + LOW16(off); |
| if (CPU_STAT_PAGING) { | if (CPU_STAT_PAGING) { |
| addr = physicaladdr(addr); | addr = physicaladdr(addr, TRUE); |
| } | } |
| i286_memorywrite(addr, dat); | i286_memorywrite(addr, dat); |
| } | } |
| Line 1247 void MEMCALL meml_write16(UINT seg, UINT | Line 1215 void MEMCALL meml_write16(UINT seg, UINT |
| i286_memorywrite_w(addr, dat); | i286_memorywrite_w(addr, dat); |
| } | } |
| else if ((addr + 1) & 0xfff) { | else if ((addr + 1) & 0xfff) { |
| i286_memorywrite_w(physicaladdr(addr), dat); | i286_memorywrite_w(physicaladdr(addr, TRUE), dat); |
| } | } |
| else { | else { |
| meml_write8(seg, off, (REG8)dat); | meml_write8(seg, off, (REG8)dat); |
| Line 1257 void MEMCALL meml_write16(UINT seg, UINT | Line 1225 void MEMCALL meml_write16(UINT seg, UINT |
| void MEMCALL meml_readstr(UINT seg, UINT off, void *dat, UINT leng) { | void MEMCALL meml_readstr(UINT seg, UINT off, void *dat, UINT leng) { |
| UINT32 adrs; | UINT32 addr; |
| UINT rem; | |
| UINT size; | UINT size; |
| while(leng) { | while(leng) { |
| off = LOW16(off); | off = LOW16(off); |
| adrs = (seg << 4) + off; | addr = (seg << 4) + off; |
| size = 0x1000 - (adrs & 0xfff); | rem = 0x10000 - off; |
| size = min(size, leng); | size = min(leng, rem); |
| size = min(size, 0x10000 - off); | if (CPU_STAT_PAGING) { |
| memp_read(physicaladdr(adrs), dat, size); | rem = 0x1000 - (addr & 0xfff); |
| size = min(size, rem); | |
| addr = physicaladdr(addr, FALSE); | |
| } | |
| memp_read(addr, dat, size); | |
| off += size; | off += size; |
| dat = ((BYTE *)dat) + size; | dat = ((BYTE *)dat) + size; |
| leng -= size; | leng -= size; |
| Line 1275 void MEMCALL meml_readstr(UINT seg, UINT | Line 1248 void MEMCALL meml_readstr(UINT seg, UINT |
| void MEMCALL meml_writestr(UINT seg, UINT off, const void *dat, UINT leng) { | void MEMCALL meml_writestr(UINT seg, UINT off, const void *dat, UINT leng) { |
| UINT32 adrs; | UINT32 addr; |
| UINT rem; | |
| UINT size; | UINT size; |
| while(leng) { | while(leng) { |
| off = LOW16(off); | off = LOW16(off); |
| adrs = (seg << 4) + off; | addr = (seg << 4) + off; |
| size = 0x1000 - (adrs & 0xfff); | rem = 0x10000 - off; |
| size = min(size, leng); | size = min(leng, rem); |
| size = min(size, 0x10000 - off); | if (CPU_STAT_PAGING) { |
| memp_write(physicaladdr(adrs), dat, size); | rem = 0x1000 - (addr & 0xfff); |
| size = min(size, rem); | |
| addr = physicaladdr(addr, TRUE); | |
| } | |
| memp_write(addr, dat, size); | |
| off += size; | off += size; |
| dat = ((BYTE *)dat) + size; | dat = ((BYTE *)dat) + size; |
| leng -= size; | leng -= size; |
| Line 1302 void MEMCALL meml_read(UINT32 address, v | Line 1280 void MEMCALL meml_read(UINT32 address, v |
| while(leng) { | while(leng) { |
| size = 0x1000 - (address & 0xfff); | size = 0x1000 - (address & 0xfff); |
| size = min(size, leng); | size = min(size, leng); |
| memp_read(physicaladdr(address), dat, size); | memp_read(physicaladdr(address, FALSE), dat, size); |
| address += size; | address += size; |
| dat = ((BYTE *)dat) + size; | dat = ((BYTE *)dat) + size; |
| leng -= size; | leng -= size; |
| Line 1321 void MEMCALL meml_write(UINT32 address, | Line 1299 void MEMCALL meml_write(UINT32 address, |
| while(leng) { | while(leng) { |
| size = 0x1000 - (address & 0xfff); | size = 0x1000 - (address & 0xfff); |
| size = min(size, leng); | size = min(size, leng); |
| memp_write(physicaladdr(address), dat, size); | memp_write(physicaladdr(address, TRUE), dat, size); |
| address += size; | address += size; |
| dat = ((BYTE *)dat) + size; | dat = ((BYTE *)dat) + size; |
| leng -= size; | leng -= size; |