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| version 1.24, 2004/04/05 09:45:06 | version 1.27, 2005/02/08 09:19:00 |
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| Line 3 | Line 3 |
| #ifndef NP2_MEMORY_ASM | #ifndef NP2_MEMORY_ASM |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "memory.h" | |
| #include "egcmem.h" | |
| #include "mem9821.h" | #include "mem9821.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "memegc.h" | |
| #include "vram.h" | #include "vram.h" |
| #include "font.h" | #include "font.h" |
| Line 17 | Line 16 |
| // ---- write byte | // ---- write byte |
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN | static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN |
| mem[address & CPU_ADRSMASK] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; |
| } | } |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { // VRAM | static void MEMCALL tram_wt(UINT32 address, REG8 value) { // TRAM |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| Line 54 static void MEMCALL tram_wt(UINT32 addre | Line 53 static void MEMCALL tram_wt(UINT32 addre |
| } | } |
| } | } |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM | static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| Line 62 static void MEMCALL vram_w0(UINT32 addre | Line 61 static void MEMCALL vram_w0(UINT32 addre |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| } | } |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM | static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| Line 70 static void MEMCALL vram_w1(UINT32 addre | Line 69 static void MEMCALL vram_w1(UINT32 addre |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| } | } |
| static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| Line 99 static void MEMCALL grcg_rmw0(UINT32 add | Line 98 static void MEMCALL grcg_rmw0(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| Line 128 static void MEMCALL grcg_rmw1(UINT32 add | Line 127 static void MEMCALL grcg_rmw1(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| Line 152 static void MEMCALL grcg_tdw0(UINT32 add | Line 151 static void MEMCALL grcg_tdw0(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM | static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| Line 176 static void MEMCALL grcg_tdw1(UINT32 add | Line 175 static void MEMCALL grcg_tdw1(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM | static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| egc_write(address, value); | memegc_wr8(address, value); |
| } | } |
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL emmc_wt(UINT32 address, REG8 value) { // EMS |
| CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; |
| } | } |
| static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D0000¡ÁDFFFF | static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D000¡ÁDFFF |
| if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { | if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| } | } |
| static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F8000¡ÁFFFFF | static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F800¡ÁFFFF |
| mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; |
| } | } |
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wn(UINT32 address, REG8 value) { // NONE |
| (void)address; | (void)address; |
| (void)value; | (void)value; |
| Line 208 static void MEMCALL i286_wn(UINT32 addre | Line 207 static void MEMCALL i286_wn(UINT32 addre |
| // ---- read byte | // ---- read byte |
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) { // MAIN |
| return(mem[address & CPU_ADRSMASK]); | return(mem[address & CPU_ADRSMASK]); |
| } | } |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { // TRAM |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| Line 230 static REG8 MEMCALL tram_rd(UINT32 addre | Line 229 static REG8 MEMCALL tram_rd(UINT32 addre |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_VRAM; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| static REG8 MEMCALL grcg_tcr0(UINT32 address) { | static REG8 MEMCALL grcg_tcr0(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| Line 265 const BYTE *vram; | Line 264 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL grcg_tcr1(UINT32 address) { | static REG8 MEMCALL grcg_tcr1(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| Line 288 const BYTE *vram; | Line 287 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| return(egc_read(address)); | return(memegc_rd8(address)); |
| } | } |
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL emmc_rd(UINT32 address) { // EMS |
| return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); | return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); |
| } | } |
| static REG8 MEMCALL i286_rb(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) { // F800-FFFF |
| if (CPU_ITFBANK) { | if (CPU_ITFBANK) { |
| address += VRAM_STEP; | address += VRAM_STEP; |
| Line 354 static void MEMCALL tramw_wt(UINT32 addr | Line 353 static void MEMCALL tramw_wt(UINT32 addr |
| } | } |
| } | } |
| else if (address < 0xa5000) { | else if (address < 0xa5000) { |
| if (address & 1) { | if (!(address & 1)) { |
| value >>= 8; | value >>= 8; |
| } | } |
| if (cgwindow.writable & 1) { | if (cgwindow.writable & 1) { |
| Line 456 static void MEMCALL grcgw_tdw1(UINT32 ad | Line 455 static void MEMCALL grcgw_tdw1(UINT32 ad |
| static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| if (!(address & 1)) { | memegc_wr16(address, value); |
| egc_write_w(address, value); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| egc_write(address, (REG8)value); | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| } | |
| else { | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| egc_write(address, (REG8)value); | |
| } | |
| } | |
| } | } |
| static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { |
| Line 621 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 608 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| static REG16 MEMCALL egcw_rd(UINT32 address) { | static REG16 MEMCALL egcw_rd(UINT32 address) { |
| REG16 ret; | |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| if (!(address & 1)) { | return(memegc_rd16(address)); |
| return(egc_read_w(address)); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| ret = egc_read(address); | |
| ret += egc_read(address + 1) << 8; | |
| return(ret); | |
| } | |
| else { | |
| ret = egc_read(address + 1) << 8; | |
| ret += egc_read(address); | |
| return(ret); | |
| } | |
| } | |
| } | } |
| static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL emmcw_rd(UINT32 address) { |