--- np2/i386c/memory.c 2003/12/25 19:21:17 1.4 +++ np2/i386c/memory.c 2004/02/20 16:09:04 1.10 @@ -14,7 +14,7 @@ BYTE mem[0x200000]; -#define USE_HIMEM +#define USE_HIMEM 0x110000 // ---- write byte @@ -25,7 +25,7 @@ static void MEMCALL i286_wt(UINT32 addre static void MEMCALL tram_wt(UINT32 address, REG8 value) { - CPU_REMCLOCK -= vramop.tramwait; + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < 0xa2000) { mem[address] = (BYTE)value; tramupdate[LOW12(address >> 1)] = 1; @@ -57,7 +57,7 @@ static void MEMCALL tram_wt(UINT32 addre static void MEMCALL vram_w0(UINT32 address, REG8 value) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; mem[address] = (BYTE)value; vramupdate[LOW15(address)] |= 1; gdcs.grphdisp |= 1; @@ -65,7 +65,7 @@ static void MEMCALL vram_w0(UINT32 addre static void MEMCALL vram_w1(UINT32 address, REG8 value) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; mem[address + VRAM_STEP] = (BYTE)value; vramupdate[LOW15(address)] |= 2; gdcs.grphdisp |= 2; @@ -76,7 +76,7 @@ static void MEMCALL grcg_rmw0(UINT32 add REG8 mask; BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; mask = ~value; address = LOW15(address); vramupdate[address] |= 1; @@ -105,7 +105,7 @@ static void MEMCALL grcg_rmw1(UINT32 add REG8 mask; BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; mask = ~value; address = LOW15(address); vramupdate[address] |= 2; @@ -133,7 +133,7 @@ static void MEMCALL grcg_tdw0(UINT32 add BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; address = LOW15(address); vramupdate[address] |= 1; gdcs.grphdisp |= 1; @@ -157,7 +157,7 @@ static void MEMCALL grcg_tdw1(UINT32 add BYTE *vram; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; address = LOW15(address); vramupdate[address] |= 2; gdcs.grphdisp |= 2; @@ -179,12 +179,13 @@ static void MEMCALL grcg_tdw1(UINT32 add static void MEMCALL egc_wt(UINT32 address, REG8 value) { + CPU_REMCLOCK -= MEMWAIT_GRCG; egc_write(address, value); } -static void MEMCALL emmc_wt(UINT32 address, REG8 value) { +static void MEMCALL i286_wb(UINT32 address, REG8 value) { - extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; + mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; } static void MEMCALL i286_wn(UINT32 address, REG8 value) { @@ -203,7 +204,7 @@ static REG8 MEMCALL i286_rd(UINT32 addre static REG8 MEMCALL tram_rd(UINT32 address) { - CPU_REMCLOCK -= vramop.tramwait; + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < 0xa4000) { return(mem[address]); } @@ -220,13 +221,13 @@ static REG8 MEMCALL tram_rd(UINT32 addre static REG8 MEMCALL vram_r0(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(mem[address]); } static REG8 MEMCALL vram_r1(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(mem[address + VRAM_STEP]); } @@ -235,7 +236,7 @@ static REG8 MEMCALL grcg_tcr0(UINT32 add const BYTE *vram; REG8 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; vram = mem + LOW15(address); ret = 0; if (!(grcg.modereg & 1)) { @@ -258,7 +259,7 @@ static REG8 MEMCALL grcg_tcr1(UINT32 add const BYTE *vram; REG8 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; ret = 0; vram = mem + LOW15(address); if (!(grcg.modereg & 1)) { @@ -278,18 +279,14 @@ const BYTE *vram; static REG8 MEMCALL egc_rd(UINT32 address) { + CPU_REMCLOCK -= MEMWAIT_GRCG; return(egc_read(address)); } -static REG8 MEMCALL emmc_rd(UINT32 address) { - - return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); -} - -static REG8 MEMCALL i286_itf(UINT32 address) { +static REG8 MEMCALL i286_rb(UINT32 address) { if (CPU_ITFBANK) { - address = ITF_ADRS + LOW15(address); + address += VRAM_STEP; } return(mem[address]); } @@ -307,6 +304,7 @@ static void MEMCALL i286w_wt(UINT32 addr static void MEMCALL tramw_wt(UINT32 address, REG16 value) { + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < 0xa1fff) { STOREINTELWORD(mem + address, value); tramupdate[LOW12(address >> 1)] = 1; @@ -352,7 +350,7 @@ static void MEMCALL tramw_wt(UINT32 addr #define GRCGW_NON(page) { \ - CPU_REMCLOCK -= vramop.vramwait; \ + CPU_REMCLOCK -= MEMWAIT_VRAM; \ STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ vramupdate[LOW15(address)] |= (1 << page); \ vramupdate[LOW15(address + 1)] |= (1 << page); \ @@ -361,7 +359,7 @@ static void MEMCALL tramw_wt(UINT32 addr #define GRCGW_RMW(page) { \ BYTE *vram; \ - CPU_REMCLOCK -= vramop.grcgwait; \ + CPU_REMCLOCK -= MEMWAIT_GRCG; \ address = LOW15(address); \ vramupdate[address] |= (1 << page); \ vramupdate[address + 1] |= (1 << page); \ @@ -407,7 +405,7 @@ static void MEMCALL tramw_wt(UINT32 addr #define GRCGW_TDW(page) { \ BYTE *vram; \ - CPU_REMCLOCK -= vramop.grcgwait; \ + CPU_REMCLOCK -= MEMWAIT_GRCG; \ address = LOW15(address); \ vramupdate[address] |= (1 << page); \ vramupdate[address + 1] |= (1 << page); \ @@ -441,6 +439,7 @@ static void MEMCALL grcgw_tdw1(UINT32 ad static void MEMCALL egcw_wt(UINT32 address, REG16 value) { + CPU_REMCLOCK -= MEMWAIT_GRCG; if (!(address & 1)) { egc_write_w(address, value); } @@ -456,18 +455,10 @@ static void MEMCALL egcw_wt(UINT32 addre } } -static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { - - BYTE *ptr; +static void MEMCALL i286w_wb(UINT32 address, REG16 value) { - if ((address & 0x3fff) != 0x3fff) { - ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); - STOREINTELWORD(ptr, value); - } - else { - extmem.pageptr[(address >> 14) & 3][0x3fff] = (BYTE)value; - extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); - } + mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; + mem[address + 0x1c8001 - 0xe8000] = (BYTE)(value >> 8); } static void MEMCALL i286w_wn(UINT32 address, REG16 value) { @@ -489,7 +480,7 @@ static REG16 MEMCALL i286w_rd(UINT32 add static REG16 MEMCALL tramw_rd(UINT32 address) { - CPU_REMCLOCK -= vramop.tramwait; + CPU_REMCLOCK -= MEMWAIT_TRAM; if (address < (0xa4000 - 1)) { return(LOADINTELWORD(mem + address)); } @@ -518,13 +509,13 @@ static REG16 MEMCALL tramw_rd(UINT32 add static REG16 MEMCALL vramw_r0(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(LOADINTELWORD(mem + address)); } static REG16 MEMCALL vramw_r1(UINT32 address) { - CPU_REMCLOCK -= vramop.vramwait; + CPU_REMCLOCK -= MEMWAIT_VRAM; return(LOADINTELWORD(mem + address + VRAM_STEP)); } @@ -533,7 +524,7 @@ static REG16 MEMCALL grcgw_tcr0(UINT32 a BYTE *vram; REG16 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; ret = 0; vram = mem + LOW15(address); if (!(grcg.modereg & 1)) { @@ -556,7 +547,7 @@ static REG16 MEMCALL grcgw_tcr1(UINT32 a BYTE *vram; REG16 ret; - CPU_REMCLOCK -= vramop.grcgwait; + CPU_REMCLOCK -= MEMWAIT_GRCG; ret = 0; vram = mem + LOW15(address); if (!(grcg.modereg & 1)) { @@ -578,6 +569,7 @@ static REG16 MEMCALL egcw_rd(UINT32 addr REG16 ret; + CPU_REMCLOCK -= MEMWAIT_GRCG; if (!(address & 1)) { return(egc_read_w(address)); } @@ -595,26 +587,10 @@ static REG16 MEMCALL egcw_rd(UINT32 addr } } -static REG16 MEMCALL emmcw_rd(UINT32 address) { - -const BYTE *ptr; - REG16 ret; - - if ((address & 0x3fff) != 0x3fff) { - ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); - return(LOADINTELWORD(ptr)); - } - else { - ret = extmem.pageptr[(address >> 14) & 3][0x3fff]; - ret += extmem.pageptr[((address + 1) >> 14) & 3][0] << 8; - return(ret); - } -} - -static REG16 MEMCALL i286w_itf(UINT32 address) { +static REG16 MEMCALL i286w_rb(UINT32 address) { if (CPU_ITFBANK) { - address = ITF_ADRS + LOW15(address); + address += VRAM_STEP; } return(LOADINTELWORD(mem + address)); } @@ -627,69 +603,91 @@ typedef REG8 (MEMCALL * MEM8READ)(UINT32 typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); -static MEM8WRITE memory_write[] = { - i286_wt, i286_wt, i286_wt, i286_wt, // 00 - i286_wt, i286_wt, i286_wt, i286_wt, // 20 - i286_wt, i286_wt, i286_wt, i286_wt, // 40 - i286_wt, i286_wt, i286_wt, i286_wt, // 60 - i286_wt, i286_wt, i286_wt, i286_wt, // 80 - tram_wt, vram_w0, vram_w0, vram_w0, // a0 - emmc_wt, emmc_wt, i286_wn, i286_wn, // c0 - vram_w0, i286_wn, i286_wn, i286_wn}; // e0 +typedef struct { + MEM8READ rd8[0x20]; + MEM8WRITE wr8[0x20]; + MEM16READ rd16[0x20]; + MEM16WRITE wr16[0x20]; +} MEMFN; + +typedef struct { + MEM8READ brd8; + MEM8READ ird8; + MEM8WRITE ewr8; + MEM8WRITE bwr8; + MEM16READ brd16; + MEM16READ ird16; + MEM16WRITE ewr16; + MEM16WRITE bwr16; +} MMAPTBL; + +typedef struct { + MEM8READ rd8; + MEM8WRITE wr8; + MEM16READ rd16; + MEM16WRITE wr16; +} VACCTBL; -static MEM8READ memory_read[] = { - i286_rd, i286_rd, i286_rd, i286_rd, // 00 +static MEMFN memfn = { + {i286_rd, i286_rd, i286_rd, i286_rd, // 00 i286_rd, i286_rd, i286_rd, i286_rd, // 20 i286_rd, i286_rd, i286_rd, i286_rd, // 40 i286_rd, i286_rd, i286_rd, i286_rd, // 60 i286_rd, i286_rd, i286_rd, i286_rd, // 80 tram_rd, vram_r0, vram_r0, vram_r0, // a0 - emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 - vram_r0, i286_rd, i286_rd, i286_itf}; // f0 + i286_rd, i286_rd, i286_rd, i286_rd, // c0 + vram_r0, i286_rd, i286_rd, i286_rb}, // e0 -static MEM16WRITE memword_write[] = { - i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 - i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 - i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 - i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 - i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80 - tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0 - emmcw_wt, emmcw_wt, i286w_wn, i286w_wn, // c0 - vramw_w0, i286w_wn, i286w_wn, i286w_wn}; // e0 + {i286_wt, i286_wt, i286_wt, i286_wt, // 00 + i286_wt, i286_wt, i286_wt, i286_wt, // 20 + i286_wt, i286_wt, i286_wt, i286_wt, // 40 + i286_wt, i286_wt, i286_wt, i286_wt, // 60 + i286_wt, i286_wt, i286_wt, i286_wt, // 80 + tram_wt, vram_w0, vram_w0, vram_w0, // a0 + i286_wn, i286_wn, i286_wn, i286_wn, // c0 + vram_w0, i286_wn, i286_wn, i286_wn}, // e0 -static MEM16READ memword_read[] = { - i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 + {i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 - emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 - vramw_r0, i286w_rd, i286w_rd, i286w_itf}; // e0 + i286w_rd, i286w_rd, i286w_rd, i286w_rd, // c0 + vramw_r0, i286w_rd, i286w_rd, i286w_rb}, // e0 + + {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 + i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 + i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 + i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 + i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80 + tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0 + i286w_wn, i286w_wn, i286w_wn, i286w_wn, // c0 + vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0 -static const MEM8WRITE vram_write[] = { - vram_w0, vram_w1, vram_w0, vram_w1, // 00 - vram_w0, vram_w1, vram_w0, vram_w1, // 40 - grcg_tdw0, grcg_tdw1, egc_wt, egc_wt, // 80 tdw/tcr - grcg_rmw0, grcg_rmw1, egc_wt, egc_wt}; // c0 rmw - -static const MEM8READ vram_read[] = { - vram_r0, vram_r1, vram_r0, vram_r1, // 00 - vram_r0, vram_r1, vram_r0, vram_r1, // 40 - grcg_tcr0, grcg_tcr1, egc_rd, egc_rd, // 80 tdw/tcr - vram_r0, vram_r1, egc_rd, egc_rd}; // c0 rmw - -static const MEM16WRITE vramw_write[] = { - vramw_w0, vramw_w1, vramw_w0, vramw_w1, // 00 - vramw_w0, vramw_w1, vramw_w0, vramw_w1, // 40 - grcgw_tdw0, grcgw_tdw1, egcw_wt, egcw_wt, // 80 tdw/tcr - grcgw_rmw0, grcgw_rmw1, egcw_wt, egcw_wt}; // c0 rmw - -static const MEM16READ vramw_read[] = { - vramw_r0, vramw_r1, vramw_r0, vramw_r1, // 00 - vramw_r0, vramw_r1, vramw_r0, vramw_r1, // 40 - grcgw_tcr0, grcgw_tcr1, egcw_rd, egcw_rd, // 80 tdw/tcr - vramw_r0, vramw_r1, egcw_rd, egcw_rd}; // c0 rmw +static const MMAPTBL mmaptbl[2] = { + {i286_rd, i286_rb, i286_wn, i286_wn, + i286w_rd, i286w_rb, i286w_wn, i286w_wn}, + {i286_rb, i286_rb, i286_wt, i286_wb, + i286w_rb, i286w_rb, i286w_wt, i286w_wb}}; + +static const VACCTBL vacctbl[0x10] = { + {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00 + {vram_r1, vram_w1, vramw_r1, vramw_w1}, + {vram_r0, vram_w0, vramw_r0, vramw_w0}, + {vram_r1, vram_w1, vramw_r1, vramw_w1}, + {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 40 + {vram_r1, vram_w1, vramw_r1, vramw_w1}, + {vram_r0, vram_w0, vramw_r0, vramw_w0}, + {vram_r1, vram_w1, vramw_r1, vramw_w1}, + {grcg_tcr0, grcg_tdw0, grcgw_tcr0, grcgw_tdw0}, // 80 tdw/tcr + {grcg_tcr1, grcg_tdw1, grcgw_tcr1, grcgw_tdw1}, + {egc_rd, egc_wt, egcw_rd, egcw_wt}, + {egc_rd, egc_wt, egcw_rd, egcw_wt}, + {vram_r0, grcg_rmw0, vramw_r0, grcgw_rmw0}, // c0 rmw + {vram_r1, grcg_rmw1, vramw_r1, grcgw_rmw1}, + {egc_rd, egc_wt, egcw_rd, egcw_wt}, + {egc_rd, egc_wt, egcw_rd, egcw_wt}}; static REG8 MEMCALL i286_nonram_r(UINT32 address) { @@ -704,49 +702,77 @@ static REG16 MEMCALL i286_nonram_rw(UINT return(0xffff); } + +void MEMCALL i286_memorymap(UINT type) { + +const MMAPTBL *mm; + + mm = mmaptbl + (type & 1); + + memfn.rd8[0xe8000 >> 15] = mm->brd8; + memfn.rd8[0xf0000 >> 15] = mm->brd8; + memfn.rd8[0xf8000 >> 15] = mm->ird8; + + memfn.wr8[0xd0000 >> 15] = mm->ewr8; + memfn.wr8[0xd8000 >> 15] = mm->ewr8; + memfn.wr8[0xe8000 >> 15] = mm->bwr8; + memfn.wr8[0xf0000 >> 15] = mm->bwr8; + memfn.wr8[0xf8000 >> 15] = mm->bwr8; + + memfn.rd16[0xe8000 >> 15] = mm->brd16; + memfn.rd16[0xf0000 >> 15] = mm->brd16; + memfn.rd16[0xf8000 >> 15] = mm->ird16; + + memfn.wr16[0xd0000 >> 15] = mm->ewr16; + memfn.wr16[0xd8000 >> 15] = mm->ewr16; + memfn.wr16[0xe8000 >> 15] = mm->bwr16; + memfn.wr16[0xf0000 >> 15] = mm->bwr16; + memfn.wr16[0xf8000 >> 15] = mm->bwr16; +} + void MEMCALL i286_vram_dispatch(UINT func) { - UINT proc; +const VACCTBL *vacc; + + vacc = vacctbl + (func & 0x0f); + + memfn.rd8[0xa8000 >> 15] = vacc->rd8; + memfn.rd8[0xb0000 >> 15] = vacc->rd8; + memfn.rd8[0xb8000 >> 15] = vacc->rd8; + memfn.rd8[0xe0000 >> 15] = vacc->rd8; + + memfn.wr8[0xa8000 >> 15] = vacc->wr8; + memfn.wr8[0xb0000 >> 15] = vacc->wr8; + memfn.wr8[0xb8000 >> 15] = vacc->wr8; + memfn.wr8[0xe0000 >> 15] = vacc->wr8; - proc = func & 0x0f; - memory_write[0xa8000 >> 15] = vram_write[proc]; - memory_write[0xb0000 >> 15] = vram_write[proc]; - memory_write[0xb8000 >> 15] = vram_write[proc]; - memory_write[0xe0000 >> 15] = vram_write[proc]; - - memory_read[0xa8000 >> 15] = vram_read[proc]; - memory_read[0xb0000 >> 15] = vram_read[proc]; - memory_read[0xb8000 >> 15] = vram_read[proc]; - memory_read[0xe0000 >> 15] = vram_read[proc]; - - memword_write[0xa8000 >> 15] = vramw_write[proc]; - memword_write[0xb0000 >> 15] = vramw_write[proc]; - memword_write[0xb8000 >> 15] = vramw_write[proc]; - memword_write[0xe0000 >> 15] = vramw_write[proc]; - - memword_read[0xa8000 >> 15] = vramw_read[proc]; - memword_read[0xb0000 >> 15] = vramw_read[proc]; - memword_read[0xb8000 >> 15] = vramw_read[proc]; - memword_read[0xe0000 >> 15] = vramw_read[proc]; - - if (!(func & 0x10)) { // degital - memory_write[0xe0000 >> 15] = i286_wn; - memword_write[0xe0000 >> 15] = i286w_wn; - memory_read[0xe0000 >> 15] = i286_nonram_r; - memword_read[0xe0000 >> 15] = i286_nonram_rw; + memfn.rd16[0xa8000 >> 15] = vacc->rd16; + memfn.rd16[0xb0000 >> 15] = vacc->rd16; + memfn.rd16[0xb8000 >> 15] = vacc->rd16; + memfn.rd16[0xe0000 >> 15] = vacc->rd16; + + memfn.wr16[0xa8000 >> 15] = vacc->wr16; + memfn.wr16[0xb0000 >> 15] = vacc->wr16; + memfn.wr16[0xb8000 >> 15] = vacc->wr16; + memfn.wr16[0xe0000 >> 15] = vacc->wr16; + + if (!(func & 0x10)) { // digital + memfn.wr8[0xe0000 >> 15] = i286_wn; + memfn.wr16[0xe0000 >> 15] = i286w_wn; + memfn.rd8[0xe0000 >> 15] = i286_nonram_r; + memfn.rd16[0xe0000 >> 15] = i286_nonram_rw; } -#if defined(USE_ASM) - i286a_vram_dispatch(func); -#endif } -REG8 MEMCALL __i286_memoryread(UINT32 address) { + +REG8 MEMCALL i286_memoryread(UINT32 paddr) { + + UINT32 address = paddr & CPU_ADRSMASK; if (address < I286_MEMREADMAX) { return(mem[address]); } -#if defined(USE_HIMEM) - else if (address >= 0x10fff0) { + else if (address >= USE_HIMEM) { address -= 0x100000; if (address < CPU_EXTMEMSIZE) { return(CPU_EXTMEM[address]); @@ -755,23 +781,22 @@ REG8 MEMCALL __i286_memoryread(UINT32 ad return(0xff); } } -#endif else { - return(memory_read[(address >> 15) & 0x1f](address)); + return(memfn.rd8[(address >> 15) & 0x1f](address)); } } -REG16 MEMCALL __i286_memoryread_w(UINT32 address) { +REG16 MEMCALL i286_memoryread_w(UINT32 paddr) { + UINT32 address = paddr & CPU_ADRSMASK; REG16 ret; if (address < (I286_MEMREADMAX - 1)) { return(LOADINTELWORD(mem + address)); } -#if defined(USE_HIMEM) - else if (address >= (0x10fff0 - 1)) { + else if (address >= (USE_HIMEM - 1)) { address -= 0x100000; - if (address == (0x00fff0 - 1)) { + if (address == (USE_HIMEM - 0x100000 - 1)) { ret = mem[0x100000 + address]; } else if (address < CPU_EXTMEMSIZE) { @@ -789,63 +814,65 @@ REG16 MEMCALL __i286_memoryread_w(UINT32 } return(ret); } -#endif else if ((address & 0x7fff) != 0x7fff) { - return(memword_read[(address >> 15) & 0x1f](address)); + return(memfn.rd16[(address >> 15) & 0x1f](address)); } else { - ret = memory_read[(address >> 15) & 0x1f](address); + ret = memfn.rd8[(address >> 15) & 0x1f](address); address++; - ret += memory_read[(address >> 15) & 0x1f](address) << 8; + ret += (REG16)(memfn.rd8[(address >> 15) & 0x1f](address)) << 8; return(ret); } } -UINT32 MEMCALL __i286_memoryread_d(UINT32 address) { +UINT32 MEMCALL i286_memoryread_d(UINT32 paddr) { - UINT32 ret; - - ret = __i286_memoryread_w(address); - ret |= (UINT32)__i286_memoryread_w(address + 2) << 16; + UINT32 address = paddr & CPU_ADRSMASK; + UINT32 adrs; + UINT32 ret; + if (address < (I286_MEMREADMAX - 3)) { + return(LOADINTELDWORD(mem + address)); + } + else if (address >= USE_HIMEM) { + adrs = address - 0x100000; + if (adrs + 3 < CPU_EXTMEMSIZE) { + return(LOADINTELDWORD(CPU_EXTMEM + adrs)); + } + } + ret = i286_memoryread_w(address); + ret += (UINT32)i286_memoryread_w(address + 2) << 16; return ret; } -void MEMCALL __i286_memorywrite(UINT32 address, REG8 value) { +void MEMCALL i286_memorywrite(UINT32 paddr, REG8 value) { + + UINT32 address = paddr & CPU_ADRSMASK; if (address < I286_MEMWRITEMAX) { mem[address] = (BYTE)value; } -#if defined(USE_HIMEM) - else if (address >= 0x10fff0) { + else if (address >= USE_HIMEM) { address -= 0x100000; if (address < CPU_EXTMEMSIZE) { CPU_EXTMEM[address] = (BYTE)value; } } -#endif else { - memory_write[(address >> 15) & 0x1f](address, value); + memfn.wr8[(address >> 15) & 0x1f](address, value); } } -void MEMCALL __i286_memorywrite_w(UINT32 address, REG16 value) { +void MEMCALL i286_memorywrite_w(UINT32 paddr, REG16 value) { + + UINT32 address = paddr & CPU_ADRSMASK; if (address < (I286_MEMWRITEMAX - 1)) { STOREINTELWORD(mem + address, value); -#if defined(TRACE) - if (address == 0x00404) { - TRACEOUT(("CPU_SP = %.4x [%.4x:%.4x]", value, CPU_CS, CPU_IP)); - } - if (address == 0x00406) { - TRACEOUT(("CPU_SS = %.4x [%.4x:%.4x]", value, CPU_CS, CPU_IP)); - } -#endif } -#if defined(USE_HIMEM) - else if (address >= (0x10fff0 - 1)) { + else if (address >= (USE_HIMEM - 1)) { address -= 0x100000; - if (address == (0x00fff0 - 1)) { + if (address == (USE_HIMEM - 0x100000 - 1)) { mem[address] = (BYTE)value; } else if (address < CPU_EXTMEMSIZE) { @@ -856,24 +883,37 @@ void MEMCALL __i286_memorywrite_w(UINT32 CPU_EXTMEM[address] = (BYTE)(value >> 8); } } -#endif else if ((address & 0x7fff) != 0x7fff) { - memword_write[(address >> 15) & 0x1f](address, value); + memfn.wr16[(address >> 15) & 0x1f](address, value); } else { - memory_write[(address >> 15) & 0x1f](address, (BYTE)value); + memfn.wr8[(address >> 15) & 0x1f](address, (BYTE)value); address++; - memory_write[(address >> 15) & 0x1f](address, (BYTE)(value >> 8)); + memfn.wr8[(address >> 15) & 0x1f](address, (BYTE)(value >> 8)); } } -void MEMCALL __i286_memorywrite_d(UINT32 address, UINT32 value) { +void MEMCALL i286_memorywrite_d(UINT32 paddr, UINT32 value) { + + UINT32 address = paddr & CPU_ADRSMASK; + UINT32 adrs; - __i286_memorywrite_w(address, value & 0xffff); - __i286_memorywrite_w(address + 2, (WORD)(value >> 16)); + if (address < (I286_MEMWRITEMAX - 3)) { + STOREINTELDWORD(mem + address, value); + return; + } + else if (address >= USE_HIMEM) { + adrs = address - 0x100000; + if (adrs + 3 < CPU_EXTMEMSIZE) { + STOREINTELDWORD(CPU_EXTMEM + adrs, value); + return; + } + } + i286_memorywrite_w(address, value & 0xffff); + i286_memorywrite_w(address + 2, (WORD)(value >> 16)); } -#if 0 +#ifdef NP2_MEMORY_ASM REG8 MEMCALL i286_membyte_read(UINT seg, UINT off) { UINT32 address; @@ -925,7 +965,7 @@ void MEMCALL i286_memword_write(UINT seg i286_memorywrite_w(address, value); } } -#endif +#endif /* NP2_MEMORY_ASM */ void MEMCALL i286_memstr_read(UINT seg, UINT off, void *dat, UINT leng) { @@ -965,8 +1005,7 @@ void MEMCALL i286_memstr_read(UINT seg, } } -void MEMCALL i286_memstr_write(UINT seg, UINT off, - const void *dat, UINT leng) { +void MEMCALL i286_memstr_write(UINT seg, UINT off, const void *dat, UINT leng) { BYTE *out; UINT32 adrs; @@ -1043,6 +1082,4 @@ const BYTE *out; } } } - #endif -