| version 1.3, 2003/12/08 00:55:32 | version 1.10, 2007/11/03 00:00:20 | 
| Line 22  static void IOOUTCALL crtc_o7c(UINT port | Line 22  static void IOOUTCALL crtc_o7c(UINT port | 
 | if (grcg.chip) { | if (grcg.chip) { | 
 | grcg.modereg = (UINT8)dat; | grcg.modereg = (UINT8)dat; | 
 | grcg.counter = 0; | grcg.counter = 0; | 
| vramop.operate &= VOP_GRCGMASK; | vramop.operate &= ~(3 << VOPBIT_GRCG); | 
| vramop.operate |= ((dat & 0xc0) >> 4); | vramop.operate |= ((dat & 0xc0) >> (6 - VOPBIT_GRCG)); | 
 | if (grcg.chip >= 2) { | if (grcg.chip >= 2) { | 
 | grcg.gdcwithgrcg = (dat >> 4) & 0x0c; | grcg.gdcwithgrcg = (dat >> 4) & 0x0c; | 
 | } | } | 
| i286_vram_dispatch(vramop.operate); | MEMM_VRAM(vramop.operate); | 
 | } | } | 
 | (void)port; | (void)port; | 
 | } | } | 
| Line 60  static const IOINP crtci70[8] = { | Line 60  static const IOINP crtci70[8] = { | 
 | NULL,           NULL,           NULL,           NULL, | NULL,           NULL,           NULL,           NULL, | 
 | NULL,           NULL,           crtc_i7c,       NULL}; | NULL,           NULL,           crtc_i7c,       NULL}; | 
 |  |  | 
| void crtc_reset(void) { |  | 
|  | void crtc_biosreset(void) { | 
|  |  | 
|  | if (!(np2cfg.dipsw[0] & 0x01)) { | 
|  | crtc.reg.pl = 0; | 
|  | crtc.reg.bl = 0x0f; | 
|  | crtc.reg.cl = 0x10; | 
|  | crtc.reg.ssl = 0; | 
|  | } | 
|  | else { | 
|  | crtc.reg.pl = 0; | 
|  | crtc.reg.bl = 0x07; | 
|  | crtc.reg.cl = 0x08; | 
|  | crtc.reg.ssl = 0; | 
|  | } | 
|  | gdcs.textdisp |= GDCSCRN_ALLDRAW; | 
|  |  | 
|  | grcg.modereg = 0; | 
|  | grcg.counter = 0; | 
|  | vramop.operate &= ~(3 << VOPBIT_GRCG); | 
|  | grcg.gdcwithgrcg = 0; | 
|  | ZeroMemory(grcg.tile, sizeof(grcg.tile)); | 
|  | MEMM_VRAM(vramop.operate); | 
|  | } | 
|  |  | 
|  | void crtc_reset(const NP2CFG *pConfig) { | 
 |  |  | 
 | ZeroMemory(&grcg, sizeof(grcg)); | ZeroMemory(&grcg, sizeof(grcg)); | 
 | ZeroMemory(&crtc, sizeof(crtc)); | ZeroMemory(&crtc, sizeof(crtc)); | 
| crtc.reg.pl = 0x00; | #if defined(SUPPORT_PC9821) | 
| crtc.reg.bl = 0x0f; | grcg.chip = 3;                                                  // PC-9821は EGC必須 | 
| crtc.reg.cl = 0x10; | #else | 
| grcg.chip = np2cfg.grcg & 3;                    // GRCG動作のコピー | grcg.chip = pConfig->grcg & 3;                  // GRCG動作のコピー | 
|  | #endif | 
|  | crtc_biosreset(); | 
 | } | } | 
 |  |  | 
 | void crtc_bind(void) { | void crtc_bind(void) { |