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| version 1.2, 2003/10/21 11:22:05 | version 1.6, 2004/03/19 00:30:01 |
|---|---|
| Line 7 | Line 7 |
| // ---- I/O | // ---- I/O |
| static void IOOUTCALL crtc_o70(UINT port, BYTE dat) { | static void IOOUTCALL crtc_o70(UINT port, REG8 dat) { |
| port = (port & 0x0e) >> 1; | port = (port & 0x0e) >> 1; |
| dat &= 0x1f; | dat &= 0x1f; |
| if (crtc.b[port] != dat) { | if (crtc.b[port] != dat) { |
| crtc.b[port] = dat; | crtc.b[port] = (UINT8)dat; |
| gdcs.textdisp |= GDCSCRN_ALLDRAW; | gdcs.textdisp |= GDCSCRN_ALLDRAW; |
| } | } |
| } | } |
| static void IOOUTCALL crtc_o7c(UINT port, BYTE dat) { | static void IOOUTCALL crtc_o7c(UINT port, REG8 dat) { |
| if (grcg.chip) { | if (grcg.chip) { |
| grcg.modereg = dat; | grcg.modereg = (UINT8)dat; |
| grcg.counter = 0; | grcg.counter = 0; |
| vramop.operate &= VOP_GRCGMASK; | vramop.operate &= VOP_GRCGMASK; |
| vramop.operate |= ((dat & 0xc0) >> 4); | vramop.operate |= ((dat & 0xc0) >> 4); |
| Line 32 static void IOOUTCALL crtc_o7c(UINT port | Line 32 static void IOOUTCALL crtc_o7c(UINT port |
| (void)port; | (void)port; |
| } | } |
| static void IOOUTCALL crtc_o7e(UINT port, BYTE dat) { | static void IOOUTCALL crtc_o7e(UINT port, REG8 dat) { |
| int cnt; | int cnt; |
| cnt = grcg.counter; | cnt = grcg.counter; |
| grcg.tile[cnt].b[0] = dat; | grcg.tile[cnt].b[0] = (UINT8)dat; |
| grcg.tile[cnt].b[1] = dat; | grcg.tile[cnt].b[1] = (UINT8)dat; |
| grcg.counter = (cnt + 1) & 3; | grcg.counter = (cnt + 1) & 3; |
| (void)port; | (void)port; |
| } | } |
| static BYTE IOINPCALL crtc_i7c(UINT port) { | static REG8 IOINPCALL crtc_i7c(UINT port) { |
| (void)port; | (void)port; |
| return(grcg.modereg); | return(grcg.modereg); |
| Line 60 static const IOINP crtci70[8] = { | Line 60 static const IOINP crtci70[8] = { |
| NULL, NULL, NULL, NULL, | NULL, NULL, NULL, NULL, |
| NULL, NULL, crtc_i7c, NULL}; | NULL, NULL, crtc_i7c, NULL}; |
| void crtc_biosreset(void) { | |
| if (!(np2cfg.dipsw[0] & 0x01)) { | |
| crtc.reg.pl = 0; | |
| crtc.reg.bl = 0x0f; | |
| crtc.reg.cl = 0x10; | |
| crtc.reg.ssl = 0; | |
| } | |
| else { | |
| crtc.reg.pl = 0; | |
| crtc.reg.bl = 0x07; | |
| crtc.reg.cl = 0x08; | |
| crtc.reg.ssl = 0; | |
| } | |
| gdcs.textdisp |= GDCSCRN_ALLDRAW; | |
| } | |
| void crtc_reset(void) { | void crtc_reset(void) { |
| ZeroMemory(&grcg, sizeof(grcg)); | ZeroMemory(&grcg, sizeof(grcg)); |
| ZeroMemory(&crtc, sizeof(crtc)); | ZeroMemory(&crtc, sizeof(crtc)); |
| crtc.reg.pl = 0x00; | #if defined(SUPPORT_PC9821) |
| crtc.reg.bl = 0x0f; | grcg.chip = 3; // PC-9821は EGC必須 |
| crtc.reg.cl = 0x10; | #else |
| grcg.chip = np2cfg.grcg & 3; // GRCG動作のコピー | grcg.chip = np2cfg.grcg & 3; // GRCG動作のコピー |
| #endif | |
| crtc_biosreset(); | |
| } | } |
| void crtc_bind(void) { | void crtc_bind(void) { |