np2/io/dipsw.c - diff

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Diff for /np2/io/dipsw.c between versions 1.1 and 1.6

version 1.1, 2003/10/16 17:57:50	version 1.6, 2007/11/11 13:54:14
Line 1	Line 1
#include "compiler.h"	#include "compiler.h"
#include "sysmng.h"	#include "sysmng.h"
#include "i286.h"	#include "cpucore.h"
#include "pccore.h"	#include "pccore.h"
#include "iocore.h"	#include "iocore.h"
	#include "sound.h"
	#include "beep.h"


void IOOUTCALL dipsw_w8(UINT port, BYTE value) {	void IOOUTCALL dipsw_w8(UINT port, REG8 value) {

BYTE set;	UINT8 set;
UINT update;

update = 0;
switch(port & 0x0f00) {	switch(port & 0x0f00) {
case 0x0400:	case 0x0400:
if (!(iflags[value] & 0x04)) {	if (!(iflags[value] & 0x04)) {
set = (value ^ 0x04) & 0xbc;	set = value & 0xfc;
if ((np2cfg.dipsw[0] ^ set) & 0xbc) {	if ((pccore.dipsw[0] ^ set) & 0xfc) {
np2cfg.dipsw[0] &= ~(0xbc);	pccore.dipsw[0] &= ~(0xfc);
np2cfg.dipsw[0] \|= set;	pccore.dipsw[0] \|= set;
update \|= SYS_UPDATECFG;
}	}
}	}
break;	break;

case 0x0500:	case 0x0500:
if (!(iflags[value] & 0x04)) {	if (!(iflags[value] & 0x04)) {
set = value & 0xaf;	set = value & 0xef;
if ((np2cfg.dipsw[1] ^ set) & 0xaf) {	if ((pccore.dipsw[1] ^ set) & 0xef) {
np2cfg.dipsw[1] &= ~(0xaf);	pccore.dipsw[1] &= ~(0xef);
np2cfg.dipsw[1] \|= set;	pccore.dipsw[1] \|= set;
update \|= SYS_UPDATECFG;
}	}
}	}
break;	break;

case 0x0600:	case 0x0600:
if (!(iflags[value] & 0x04)) {	if (!(iflags[value] & 0x04)) {
set = (value ^ 0x08) & 0x3f;	set = value & 0x7f;
if ((np2cfg.dipsw[2] ^ set) & 0x3f) {	if ((pccore.dipsw[2] ^ set) & 0x7f) {
np2cfg.dipsw[2] &= ~(0x3f);	pccore.dipsw[2] &= ~(0x7f);
np2cfg.dipsw[2] \|= set;	pccore.dipsw[2] \|= set;
update \|= SYS_UPDATECFG;
}	}
}	}
break;	break;
Line 48 void IOOUTCALL dipsw_w8(UINT port, BYTE	Line 45 void IOOUTCALL dipsw_w8(UINT port, BYTE
case 0x0700:	case 0x0700:
if (!(iflags[value] & 0x04)) {	if (!(iflags[value] & 0x04)) {
set = (value & 0x20) >> 1;	set = (value & 0x20) >> 1;
if ((np2cfg.dipsw[1] ^ set) & 0x10) {	if ((pccore.dipsw[1] ^ set) & 0x10) {
np2cfg.dipsw[1] ^= 0x10;	pccore.dipsw[1] ^= 0x10;
update \|= SYS_UPDATECFG;
}	}
set = (value >> 2) & 0x03;	set = (value >> 2) & 0x03;
if (np2cfg.BEEP_VOL != set) {	if (np2cfg.BEEP_VOL != set) {
np2cfg.BEEP_VOL = set;	np2cfg.BEEP_VOL = set;
update \|= SYS_UPDATECFG;	beep_setvol(set);
	sysmng_update(SYS_UPDATECFG);
}	}
}	}
break;	break;
Line 63 void IOOUTCALL dipsw_w8(UINT port, BYTE	Line 60 void IOOUTCALL dipsw_w8(UINT port, BYTE
case 0x0e00:	case 0x0e00:
if (!(iflags[value] & 0x04)) {	if (!(iflags[value] & 0x04)) {
set = (value & 0x10) << 3;	set = (value & 0x10) << 3;
if ((np2cfg.dipsw[2] ^ set) & 0x80) {	if ((pccore.dipsw[2] ^ set) & 0x80) {
np2cfg.dipsw[2] ^= 0x80;	pccore.dipsw[2] ^= 0x80;
update \|= SYS_UPDATECFG;
}	}
}	}
break;	break;
}	}
sysmng_update(update);
}	}

BYTE IOINPCALL dipsw_r8(UINT port) {	REG8 IOINPCALL dipsw_r8(UINT port) {

BYTE ret = 0xff;	REG8 ret;

	ret = 0xff;
switch(port & 0x0f00) {	switch(port & 0x0f00) {
case 0x0400:	case 0x0400:
ret = (np2cfg.dipsw[0] ^ 0x04) & 0xbc;	ret = pccore.dipsw[0] & 0xfc;
if (iflags[ret] & 0x04) {	if (iflags[ret] & 0x04) {
ret \|= 0x01;	ret \|= 0x01;
}	}
break;	break;

case 0x0500:	case 0x0500:
ret = np2cfg.dipsw[1] & 0xaf;	ret = pccore.dipsw[1] & 0xef;
if (iflags[ret] & 0x04) {	if (iflags[ret] & 0x04) {
ret \|= 0x10;	ret \|= 0x10;
}	}
break;	break;

case 0x0600:	case 0x0600:
ret = (np2cfg.dipsw[2] ^ 0x02) & 0x33;	ret = pccore.dipsw[2] & 0x7f;
if (iflags[ret] & 0x04) {	if (iflags[ret] & 0x04) {
ret \|= 0x80;	ret \|= 0x80;
}	}
break;	break;

case 0x0700:	case 0x0700:
ret = ((np2cfg.dipsw[1] & 0x10) << 1) \|	ret = ((pccore.dipsw[1] & 0x10) << 1) \|
((np2cfg.BEEP_VOL & 0x03) << 2);	((np2cfg.BEEP_VOL & 0x03) << 2);
if (iflags[ret] & 0x04) {	if (iflags[ret] & 0x04) {
ret \|= 0x80;	ret \|= 0x80;
Line 108 BYTE IOINPCALL dipsw_r8(UINT port) {	Line 104 BYTE IOINPCALL dipsw_r8(UINT port) {
break;	break;

case 0x0e00:	case 0x0e00:
ret = (np2cfg.dipsw[2] & 0x80) >> 3;	ret = (pccore.dipsw[2] & 0x80) >> 3;
if (iflags[ret] & 0x04) {	if (iflags[ret] & 0x04) {
ret \|= 0x80;	ret \|= 0x80;
}	}

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