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| version 1.3, 2003/12/08 00:55:32 | version 1.6, 2007/11/11 13:54:14 |
|---|---|
| Line 9 | Line 9 |
| void IOOUTCALL dipsw_w8(UINT port, REG8 value) { | void IOOUTCALL dipsw_w8(UINT port, REG8 value) { |
| BYTE set; | UINT8 set; |
| UINT update; | |
| update = 0; | |
| switch(port & 0x0f00) { | switch(port & 0x0f00) { |
| case 0x0400: | case 0x0400: |
| if (!(iflags[value] & 0x04)) { | if (!(iflags[value] & 0x04)) { |
| set = (value ^ 0x04) & 0xbc; | set = value & 0xfc; |
| if ((np2cfg.dipsw[0] ^ set) & 0xbc) { | if ((pccore.dipsw[0] ^ set) & 0xfc) { |
| np2cfg.dipsw[0] &= ~(0xbc); | pccore.dipsw[0] &= ~(0xfc); |
| np2cfg.dipsw[0] |= set; | pccore.dipsw[0] |= set; |
| update |= SYS_UPDATECFG; | |
| } | } |
| } | } |
| break; | break; |
| case 0x0500: | case 0x0500: |
| if (!(iflags[value] & 0x04)) { | if (!(iflags[value] & 0x04)) { |
| set = value & 0xaf; | set = value & 0xef; |
| if ((np2cfg.dipsw[1] ^ set) & 0xaf) { | if ((pccore.dipsw[1] ^ set) & 0xef) { |
| np2cfg.dipsw[1] &= ~(0xaf); | pccore.dipsw[1] &= ~(0xef); |
| np2cfg.dipsw[1] |= set; | pccore.dipsw[1] |= set; |
| update |= SYS_UPDATECFG; | |
| } | } |
| } | } |
| break; | break; |
| case 0x0600: | case 0x0600: |
| if (!(iflags[value] & 0x04)) { | if (!(iflags[value] & 0x04)) { |
| set = (value ^ 0x08) & 0x3f; | set = value & 0x7f; |
| if ((np2cfg.dipsw[2] ^ set) & 0x3f) { | if ((pccore.dipsw[2] ^ set) & 0x7f) { |
| np2cfg.dipsw[2] &= ~(0x3f); | pccore.dipsw[2] &= ~(0x7f); |
| np2cfg.dipsw[2] |= set; | pccore.dipsw[2] |= set; |
| update |= SYS_UPDATECFG; | |
| } | } |
| } | } |
| break; | break; |
| Line 50 void IOOUTCALL dipsw_w8(UINT port, REG8 | Line 45 void IOOUTCALL dipsw_w8(UINT port, REG8 |
| case 0x0700: | case 0x0700: |
| if (!(iflags[value] & 0x04)) { | if (!(iflags[value] & 0x04)) { |
| set = (value & 0x20) >> 1; | set = (value & 0x20) >> 1; |
| if ((np2cfg.dipsw[1] ^ set) & 0x10) { | if ((pccore.dipsw[1] ^ set) & 0x10) { |
| np2cfg.dipsw[1] ^= 0x10; | pccore.dipsw[1] ^= 0x10; |
| update |= SYS_UPDATECFG; | |
| } | } |
| set = (value >> 2) & 0x03; | set = (value >> 2) & 0x03; |
| if (np2cfg.BEEP_VOL != set) { | if (np2cfg.BEEP_VOL != set) { |
| np2cfg.BEEP_VOL = set; | np2cfg.BEEP_VOL = set; |
| beep_setvol(set); | beep_setvol(set); |
| update |= SYS_UPDATECFG; | sysmng_update(SYS_UPDATECFG); |
| } | } |
| } | } |
| break; | break; |
| Line 66 void IOOUTCALL dipsw_w8(UINT port, REG8 | Line 60 void IOOUTCALL dipsw_w8(UINT port, REG8 |
| case 0x0e00: | case 0x0e00: |
| if (!(iflags[value] & 0x04)) { | if (!(iflags[value] & 0x04)) { |
| set = (value & 0x10) << 3; | set = (value & 0x10) << 3; |
| if ((np2cfg.dipsw[2] ^ set) & 0x80) { | if ((pccore.dipsw[2] ^ set) & 0x80) { |
| np2cfg.dipsw[2] ^= 0x80; | pccore.dipsw[2] ^= 0x80; |
| update |= SYS_UPDATECFG; | |
| } | } |
| } | } |
| break; | break; |
| } | } |
| sysmng_update(update); | |
| } | } |
| REG8 IOINPCALL dipsw_r8(UINT port) { | REG8 IOINPCALL dipsw_r8(UINT port) { |
| Line 83 REG8 IOINPCALL dipsw_r8(UINT port) { | Line 75 REG8 IOINPCALL dipsw_r8(UINT port) { |
| ret = 0xff; | ret = 0xff; |
| switch(port & 0x0f00) { | switch(port & 0x0f00) { |
| case 0x0400: | case 0x0400: |
| ret = (np2cfg.dipsw[0] ^ 0x04) & 0xbc; | ret = pccore.dipsw[0] & 0xfc; |
| if (iflags[ret] & 0x04) { | if (iflags[ret] & 0x04) { |
| ret |= 0x01; | ret |= 0x01; |
| } | } |
| break; | break; |
| case 0x0500: | case 0x0500: |
| ret = np2cfg.dipsw[1] & 0xaf; | ret = pccore.dipsw[1] & 0xef; |
| if (iflags[ret] & 0x04) { | if (iflags[ret] & 0x04) { |
| ret |= 0x10; | ret |= 0x10; |
| } | } |
| break; | break; |
| case 0x0600: | case 0x0600: |
| ret = (np2cfg.dipsw[2] ^ 0x02) & 0x33; | ret = pccore.dipsw[2] & 0x7f; |
| if (iflags[ret] & 0x04) { | if (iflags[ret] & 0x04) { |
| ret |= 0x80; | ret |= 0x80; |
| } | } |
| break; | break; |
| case 0x0700: | case 0x0700: |
| ret = ((np2cfg.dipsw[1] & 0x10) << 1) | | ret = ((pccore.dipsw[1] & 0x10) << 1) | |
| ((np2cfg.BEEP_VOL & 0x03) << 2); | ((np2cfg.BEEP_VOL & 0x03) << 2); |
| if (iflags[ret] & 0x04) { | if (iflags[ret] & 0x04) { |
| ret |= 0x80; | ret |= 0x80; |
| Line 112 REG8 IOINPCALL dipsw_r8(UINT port) { | Line 104 REG8 IOINPCALL dipsw_r8(UINT port) { |
| break; | break; |
| case 0x0e00: | case 0x0e00: |
| ret = (np2cfg.dipsw[2] & 0x80) >> 3; | ret = (pccore.dipsw[2] & 0x80) >> 3; |
| if (iflags[ret] & 0x04) { | if (iflags[ret] & 0x04) { |
| ret |= 0x80; | ret |= 0x80; |
| } | } |