--- np2/io/dmac.c 2003/10/16 17:57:51 1.1 +++ np2/io/dmac.c 2004/01/22 01:10:04 1.7 @@ -1,28 +1,39 @@ #include "compiler.h" -#include "i286.h" -#include "memory.h" #include "pccore.h" #include "iocore.h" #include "sound.h" -#include "fmboard.h" +#include "cs4231.h" +#include "sasiio.h" -void DMACCALL dma_dummyout(BYTE data) { +void DMACCALL dma_dummyout(REG8 data) { (void)data; } -BYTE DMACCALL dma_dummyin(void) { +REG8 DMACCALL dma_dummyin(void) { return(0xff); } -BYTE DMACCALL dma_dummyproc(BYTE func) { +REG8 DMACCALL dma_dummyproc(REG8 func) { (void)func; return(0); } +static const DMAPROC dmaproc[] = { + {dma_dummyout, dma_dummyin, dma_dummyproc}, // NONE + {fdc_datawrite, fdc_dataread, fdc_dmafunc}, // FDD +#if defined(SUPPORT_SASI) + {sasi_datawrite, sasi_dataread, sasi_dmafunc}, // SASI +#else + {dma_dummyout, dma_dummyin, dma_dummyproc}, // SASI +#endif + {dma_dummyout, dma_dummyin, dma_dummyproc}, // SCSI + {dma_dummyout, dma_dummyin, cs4231dmafunc}, // CS4231 +}; + // ---- @@ -30,7 +41,7 @@ void dmac_check(void) { BOOL workchg; DMACH ch; - BYTE bit; + REG8 bit; workchg = FALSE; ch = dmac.dmach; @@ -39,7 +50,7 @@ void dmac_check(void) { if ((!(dmac.mask & bit)) && (ch->ready)) { if (!(dmac.work & bit)) { dmac.work |= bit; - if (ch->extproc(DMAEXT_START)) { + if (ch->proc.extproc(DMAEXT_START)) { dmac.stat &= ~bit; // ver0.27 dmac.working |= bit; workchg = TRUE; @@ -50,7 +61,7 @@ void dmac_check(void) { if (dmac.work & bit) { dmac.work &= ~bit; dmac.working &= ~bit; - ch->extproc(DMAEXT_BREAK); + ch->proc.extproc(DMAEXT_BREAK); workchg = TRUE; } } @@ -65,7 +76,7 @@ void dmac_check(void) { // ---- I/O -static void IOOUTCALL dmac_o01(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o01(UINT port, REG8 dat) { DMACH dmach; int lh; @@ -77,7 +88,7 @@ static void IOOUTCALL dmac_o01(UINT port dmach->adrsorg.b[lh] = dat; } -static void IOOUTCALL dmac_o03(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o03(UINT port, REG8 dat) { int ch; DMACH dmach; @@ -92,13 +103,13 @@ static void IOOUTCALL dmac_o03(UINT port dmac.stat &= ~(1 << ch); } -static void IOOUTCALL dmac_o13(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o13(UINT port, REG8 dat) { dmac.dmach[dat & 3].sreq = dat; (void)port; } -static void IOOUTCALL dmac_o15(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o15(UINT port, REG8 dat) { if (dat & 4) { dmac.mask |= (1 << (dat & 3)); @@ -110,42 +121,42 @@ static void IOOUTCALL dmac_o15(UINT port (void)port; } -static void IOOUTCALL dmac_o17(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o17(UINT port, REG8 dat) { dmac.dmach[dat & 3].mode = dat; (void)port; } -static void IOOUTCALL dmac_o19(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o19(UINT port, REG8 dat) { dmac.lh = DMA16_LOW; (void)port; (void)dat; } -static void IOOUTCALL dmac_o1b(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o1b(UINT port, REG8 dat) { dmac.mask = 0x0f; (void)port; (void)dat; } -static void IOOUTCALL dmac_o1f(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o1f(UINT port, REG8 dat) { dmac.mask = dat; dmac_check(); (void)port; } -static void IOOUTCALL dmac_o21(UINT port, BYTE dat) { +static void IOOUTCALL dmac_o21(UINT port, REG8 dat) { DMACH dmach; dmach = dmac.dmach + (((port >> 1) + 1) & 3); - dmach->adrs.b[DMA32_HIGH + DMA16_LOW] = dat; + dmach->adrs.b[DMA32_HIGH + DMA16_LOW] = dat & 0x0f; } -static BYTE IOINPCALL dmac_i01(UINT port) { +static REG8 IOINPCALL dmac_i01(UINT port) { DMACH dmach; int lh; @@ -153,10 +164,10 @@ static BYTE IOINPCALL dmac_i01(UINT port dmach = dmac.dmach + ((port >> 2) & 3); lh = dmac.lh; dmac.lh = lh ^ 1; - return(dmach->leng.b[lh]); + return(dmach->adrs.b[lh + DMA32_LOW]); } -static BYTE IOINPCALL dmac_i03(UINT port) { +static REG8 IOINPCALL dmac_i03(UINT port) { DMACH dmach; int lh; @@ -164,10 +175,10 @@ static BYTE IOINPCALL dmac_i03(UINT port dmach = dmac.dmach + ((port >> 2) & 3); lh = dmac.lh; dmac.lh = lh ^ 1; - return(dmach->adrs.b[lh + DMA32_LOW]); + return(dmach->leng.b[lh]); } -static BYTE IOINPCALL dmac_i11(UINT port) { +static REG8 IOINPCALL dmac_i11(UINT port) { (void)port; return(dmac.stat); // ToDo!! @@ -193,24 +204,10 @@ static const IOOUT dmaco21[4] = { void dmac_reset(void) { - int i; - ZeroMemory(&dmac, sizeof(dmac)); dmac.lh = DMA16_LOW; dmac.mask = 0xf; - for (i=0; i<4; i++) { - dmac.dmach[i].outproc = dma_dummyout; - dmac.dmach[i].inproc = dma_dummyin; - dmac.dmach[i].extproc = dma_dummyproc; - } - dmac.dmach[0].extproc = cs4231dmafunc; - dmac.dmach[DMA_2HD].inproc = fdc_DataRegRead; - dmac.dmach[DMA_2HD].outproc = fdc_DataRegWrite; - dmac.dmach[DMA_2HD].extproc = fdc_dmafunc; - dmac.dmach[DMA_2DD].inproc = fdc_DataRegRead; - dmac.dmach[DMA_2DD].outproc = fdc_DataRegWrite; - dmac.dmach[DMA_2DD].extproc = fdc_dmafunc; - + dmac_procset(); // TRACEOUT(("sizeof(_DMACH) = %d", sizeof(_DMACH))); } @@ -221,3 +218,74 @@ void dmac_bind(void) { iocore_attachsysoutex(0x0021, 0x0cf1, dmaco21, 4); } + +// ---- + +static void dmacset(REG8 channel) { + + DMADEV *dev; + DMADEV *devterm; + UINT dmadev; + + dev = dmac.device; + devterm = dev + dmac.devices; + dmadev = DMADEV_NONE; + while(dev < devterm) { + if (dev->channel == channel) { + dmadev = dev->device; + } + dev++; + } + if (dmadev >= sizeof(dmaproc) / sizeof(DMAPROC)) { + dmadev = 0; + } + dmac.dmach[channel].proc = dmaproc[dmadev]; +} + +void dmac_procset(void) { + + REG8 i; + + for (i=0; i<4; i++) { + dmacset(i); + } +} + +void dmac_attach(REG8 device, REG8 channel) { + + dmac_detach(device); + + if (dmac.devices < (sizeof(dmac.device) / sizeof(DMADEV))) { + dmac.device[dmac.devices].device = device; + dmac.device[dmac.devices].channel = channel; + dmac.devices++; + dmacset(channel); + } +} + +void dmac_detach(REG8 device) { + + DMADEV *dev; + DMADEV *devterm; + REG8 ch; + + dev = dmac.device; + devterm = dev + dmac.devices; + while(dev < devterm) { + if (dev->device == device) { + break; + } + dev++; + } + if (dev < devterm) { + ch = dev->channel; + dev++; + while(dev < devterm) { + *(dev - 1) = *dev; + dev++; + } + dmac.devices--; + dmacset(ch); + } +} +