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| version 1.8, 2004/01/29 09:41:50 | version 1.9, 2004/01/29 10:54:06 |
|---|---|
| Line 54 static BOOL fdc_isfdcinterrupt(void) { | Line 54 static BOOL fdc_isfdcinterrupt(void) { |
| REG8 DMACCALL fdc_dmafunc(REG8 func) { | REG8 DMACCALL fdc_dmafunc(REG8 func) { |
| TRACEOUT(("fdc_dmafunc = %d", func)); | // TRACEOUT(("fdc_dmafunc = %d", func)); |
| switch(func) { | switch(func) { |
| case DMAEXT_START: | case DMAEXT_START: |
| return(1); | return(1); |
| Line 254 static void FDC_SenseDeviceStatus(void) | Line 254 static void FDC_SenseDeviceStatus(void) |
| else { | else { |
| fdc.buf[0] |= 0x80; | fdc.buf[0] |= 0x80; |
| } | } |
| TRACEOUT(("FDC_SenseDeviceStatus %.2x", fdc.buf[0])); | // TRACEOUT(("FDC_SenseDeviceStatus %.2x", fdc.buf[0])); |
| fdc.event = FDCEVENT_BUFSEND; | fdc.event = FDCEVENT_BUFSEND; |
| fdc.bufcnt = 1; | fdc.bufcnt = 1; |
| fdc.bufp = 0; | fdc.bufp = 0; |
| Line 435 static void FDC_SenceintStatus(void) { | Line 435 static void FDC_SenceintStatus(void) { |
| fdc.buf[1] = fdc.treg[fdc.us]; | fdc.buf[1] = fdc.treg[fdc.us]; |
| fdc.bufcnt = 2; | fdc.bufcnt = 2; |
| fdc.stat[fdc.us] = 0; | fdc.stat[fdc.us] = 0; |
| TRACEOUT(("fdc stat - %d [%.2x]", fdc.us, fdc.buf[0])); | // TRACEOUT(("fdc stat - %d [%.2x]", fdc.us, fdc.buf[0])); |
| } | } |
| else { | else { |
| for (; i<4; i++) { | for (; i<4; i++) { |
| Line 444 static void FDC_SenceintStatus(void) { | Line 444 static void FDC_SenceintStatus(void) { |
| fdc.buf[1] = fdc.treg[i]; | fdc.buf[1] = fdc.treg[i]; |
| fdc.bufcnt = 2; | fdc.bufcnt = 2; |
| fdc.stat[i] = 0; | fdc.stat[i] = 0; |
| TRACEOUT(("fdc stat - %d [%.2x]", i, fdc.buf[0])); | // TRACEOUT(("fdc stat - %d [%.2x]", i, fdc.buf[0])); |
| break; | break; |
| } | } |
| } | } |
| Line 712 REG8 DMACCALL fdc_dataread(void) { | Line 712 REG8 DMACCALL fdc_dataread(void) { |
| static void IOOUTCALL fdc_o92(UINT port, REG8 dat) { | static void IOOUTCALL fdc_o92(UINT port, REG8 dat) { |
| TRACEOUT(("fdc out %.2x %.2x [%.4x:%.4x]", port, dat, CPU_CS, CPU_IP)); | // TRACEOUT(("fdc out %.2x %.2x [%.4x:%.4x]", port, dat, CPU_CS, CPU_IP)); |
| if (((port >> 4) ^ fdc.chgreg) & 1) { | if (((port >> 4) ^ fdc.chgreg) & 1) { |
| return; | return; |
| Line 724 static void IOOUTCALL fdc_o92(UINT port, | Line 724 static void IOOUTCALL fdc_o92(UINT port, |
| static void IOOUTCALL fdc_o94(UINT port, REG8 dat) { | static void IOOUTCALL fdc_o94(UINT port, REG8 dat) { |
| TRACEOUT(("fdc out %.2x %.2x [%.4x:%.4x]", port, dat, CPU_CS, CPU_IP)); | // TRACEOUT(("fdc out %.2x %.2x [%.4x:%.4x]", port, dat, CPU_CS, CPU_IP)); |
| if (((port >> 4) ^ fdc.chgreg) & 1) { | if (((port >> 4) ^ fdc.chgreg) & 1) { |
| return; | return; |
| Line 739 static void IOOUTCALL fdc_o94(UINT port, | Line 739 static void IOOUTCALL fdc_o94(UINT port, |
| static REG8 IOINPCALL fdc_i90(UINT port) { | static REG8 IOINPCALL fdc_i90(UINT port) { |
| TRACEOUT(("fdc in %.2x %.2x [%.4x:%.4x]", port, fdc.status, | // TRACEOUT(("fdc in %.2x %.2x [%.4x:%.4x]", port, fdc.status, |
| CPU_CS, CPU_IP)); | // CPU_CS, CPU_IP)); |
| if (((port >> 4) ^ fdc.chgreg) & 1) { | if (((port >> 4) ^ fdc.chgreg) & 1) { |
| return(0xff); | return(0xff); |
| Line 762 static REG8 IOINPCALL fdc_i92(UINT port) | Line 762 static REG8 IOINPCALL fdc_i92(UINT port) |
| else { | else { |
| ret = fdc.lastdata; | ret = fdc.lastdata; |
| } | } |
| TRACEOUT(("fdc in %.2x %.2x [%.4x:%.4x]", port, ret, CPU_CS, CPU_IP)); | // TRACEOUT(("fdc in %.2x %.2x [%.4x:%.4x]", port, ret, CPU_CS, CPU_IP)); |
| return(ret); | return(ret); |
| } | } |