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| version 1.9, 2004/01/29 10:54:06 | version 1.18, 2007/11/03 00:00:20 |
|---|---|
| Line 20 static const UINT8 FDCCMD_TABLE[32] = { | Line 20 static const UINT8 FDCCMD_TABLE[32] = { |
| #define FDC_FORCEREADY (1) | #define FDC_FORCEREADY (1) |
| #define FDC_MAXDRIVE 2 | |
| #define FDC_DELAYERROR7 | #define FDC_DELAYERROR7 |
| Line 85 void fdcsend_error7(void) { | Line 84 void fdcsend_error7(void) { |
| fdc.event = FDCEVENT_BUFSEND; | fdc.event = FDCEVENT_BUFSEND; |
| fdc.bufp = 0; | fdc.bufp = 0; |
| fdc.bufcnt = 7; | fdc.bufcnt = 7; |
| fdc.buf[0] = (BYTE)(fdc.stat[fdc.us] >> 0); | fdc.buf[0] = (UINT8)(fdc.stat[fdc.us] >> 0); |
| fdc.buf[1] = (BYTE)(fdc.stat[fdc.us] >> 8); | fdc.buf[1] = (UINT8)(fdc.stat[fdc.us] >> 8); |
| fdc.buf[2] = (BYTE)(fdc.stat[fdc.us] >> 16); | fdc.buf[2] = (UINT8)(fdc.stat[fdc.us] >> 16); |
| fdc.buf[3] = fdc.C; | fdc.buf[3] = fdc.C; |
| fdc.buf[4] = fdc.H; | fdc.buf[4] = fdc.H; |
| fdc.buf[5] = fdc.R; | fdc.buf[5] = fdc.R; |
| Line 239 static void FDC_SenseDeviceStatus(void) | Line 238 static void FDC_SenseDeviceStatus(void) |
| get_hdus(); | get_hdus(); |
| fdc.buf[0] = (fdc.hd << 2) | fdc.us; | fdc.buf[0] = (fdc.hd << 2) | fdc.us; |
| fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; | fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; |
| if (fdc.us < FDC_MAXDRIVE) { | if (fdc.equip & (1 << fdc.us)) { |
| fdc.buf[0] |= 0x08; | fdc.buf[0] |= 0x08; |
| if (!fdc.treg[fdc.us]) { | if (!fdc.treg[fdc.us]) { |
| fdc.buf[0] |= 0x10; | fdc.buf[0] |= 0x10; |
| Line 268 static void FDC_SenseDeviceStatus(void) | Line 267 static void FDC_SenseDeviceStatus(void) |
| } | } |
| } | } |
| static BOOL writesector(void) { | static BRESULT writesector(void) { |
| fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; | fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; |
| if (!FDC_DriveCheck(TRUE)) { | if (!FDC_DriveCheck(TRUE)) { |
| Line 403 static void FDC_Recalibrate(void) { | Line 402 static void FDC_Recalibrate(void) { |
| fdc.ncn = 0; | fdc.ncn = 0; |
| fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; | fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; |
| fdc.stat[fdc.us] |= FDCRLT_SE; | fdc.stat[fdc.us] |= FDCRLT_SE; |
| if (fdc.us >= FDC_MAXDRIVE) { | if (!(fdc.equip & (1 << fdc.us))) { |
| fdc.stat[fdc.us] |= FDCRLT_NR | FDCRLT_IC0; | fdc.stat[fdc.us] |= FDCRLT_NR | FDCRLT_IC0; |
| } | } |
| else if (!fddfile[fdc.us].fname[0]) { | else if (!fddfile[fdc.us].fname[0]) { |
| Line 431 static void FDC_SenceintStatus(void) { | Line 430 static void FDC_SenceintStatus(void) { |
| if (fdc_isfdcinterrupt()) { | if (fdc_isfdcinterrupt()) { |
| i = 0; | i = 0; |
| if (fdc.stat[fdc.us]) { | if (fdc.stat[fdc.us]) { |
| fdc.buf[0] = (BYTE)fdc.stat[fdc.us]; | fdc.buf[0] = (UINT8)fdc.stat[fdc.us]; |
| fdc.buf[1] = fdc.treg[fdc.us]; | fdc.buf[1] = fdc.treg[fdc.us]; |
| fdc.bufcnt = 2; | fdc.bufcnt = 2; |
| fdc.stat[fdc.us] = 0; | fdc.stat[fdc.us] = 0; |
| Line 440 static void FDC_SenceintStatus(void) { | Line 439 static void FDC_SenceintStatus(void) { |
| else { | else { |
| for (; i<4; i++) { | for (; i<4; i++) { |
| if (fdc.stat[i]) { | if (fdc.stat[i]) { |
| fdc.buf[0] = (BYTE)fdc.stat[i]; | fdc.buf[0] = (UINT8)fdc.stat[i]; |
| fdc.buf[1] = fdc.treg[i]; | fdc.buf[1] = fdc.treg[i]; |
| fdc.bufcnt = 2; | fdc.bufcnt = 2; |
| fdc.stat[i] = 0; | fdc.stat[i] = 0; |
| Line 553 static void FDC_Seek(void) { // cm | Line 552 static void FDC_Seek(void) { // cm |
| fdc.ncn = fdc.cmds[1]; | fdc.ncn = fdc.cmds[1]; |
| fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; | fdc.stat[fdc.us] = (fdc.hd << 2) | fdc.us; |
| fdc.stat[fdc.us] |= FDCRLT_SE; | fdc.stat[fdc.us] |= FDCRLT_SE; |
| if ((fdc.us >= FDC_MAXDRIVE) || (!fddfile[fdc.us].fname[0])) { | if ((!(fdc.equip & (1 << fdc.us))) || |
| (!fddfile[fdc.us].fname[0])) { | |
| fdc.stat[fdc.us] |= FDCRLT_NR | FDCRLT_IC0; | fdc.stat[fdc.us] |= FDCRLT_NR | FDCRLT_IC0; |
| } | } |
| else { | else { |
| Line 771 static REG8 IOINPCALL fdc_i94(UINT port) | Line 771 static REG8 IOINPCALL fdc_i94(UINT port) |
| if (((port >> 4) ^ fdc.chgreg) & 1) { | if (((port >> 4) ^ fdc.chgreg) & 1) { |
| return(0xff); | return(0xff); |
| } | } |
| return(0x40); | if (port & 0x10) { // 94 |
| return(0x40); | |
| } | |
| else { // CC | |
| return(0x70); // readyを立てるるる | |
| } | |
| } | } |
| Line 793 static REG8 IOINPCALL fdc_ibe(UINT port) | Line 798 static REG8 IOINPCALL fdc_ibe(UINT port) |
| return((fdc.chgreg & 3) | 8); | return((fdc.chgreg & 3) | 8); |
| } | } |
| static void IOOUTCALL fdc_o4be(UINT port, REG8 dat) { | |
| fdc.reg144 = dat; | |
| if (dat & 0x10) { | |
| fdc.rpm[(dat >> 5) & 3] = dat & 1; | |
| } | |
| (void)port; | |
| } | |
| static REG8 IOINPCALL fdc_i4be(UINT port) { | |
| (void)port; | |
| return(fdc.rpm[(fdc.reg144 >> 5) & 3] | 0xf0); | |
| } | |
| // ---- I/F | // ---- I/F |
| Line 803 static const IOINP fdci90[4] = { | Line 823 static const IOINP fdci90[4] = { |
| static const IOOUT fdcobe[1] = {fdc_obe}; | static const IOOUT fdcobe[1] = {fdc_obe}; |
| static const IOINP fdcibe[1] = {fdc_ibe}; | static const IOINP fdcibe[1] = {fdc_ibe}; |
| void fdc_reset(void) { | void fdc_reset(const NP2CFG *pConfig) { |
| ZeroMemory(&fdc, sizeof(fdc)); | ZeroMemory(&fdc, sizeof(fdc)); |
| fdc.equip = pConfig->fddequip; | |
| #if defined(SUPPORT_PC9821) | |
| fdc.support144 = 1; | |
| #else | |
| fdc.support144 = pConfig->usefd144; | |
| #endif | |
| fdcstatusreset(); | fdcstatusreset(); |
| dmac_attach(DMADEV_2HD, FDC_DMACH2HD); | dmac_attach(DMADEV_2HD, FDC_DMACH2HD); |
| dmac_attach(DMADEV_2DD, FDC_DMACH2DD); | dmac_attach(DMADEV_2DD, FDC_DMACH2DD); |
| Line 817 void fdc_bind(void) { | Line 843 void fdc_bind(void) { |
| iocore_attachcmnoutex(0x0090, 0x00f9, fdco90, 4); | iocore_attachcmnoutex(0x0090, 0x00f9, fdco90, 4); |
| iocore_attachcmninpex(0x0090, 0x00f9, fdci90, 4); | iocore_attachcmninpex(0x0090, 0x00f9, fdci90, 4); |
| // iocore_attachcmnoutex(0x00c8, 0x00f9, fdco90, 4); | iocore_attachcmnoutex(0x00c8, 0x00f9, fdco90, 4); |
| // iocore_attachcmninpex(0x00c8, 0x00f9, fdci90, 4); | iocore_attachcmninpex(0x00c8, 0x00f9, fdci90, 4); |
| if (fdc.support144) { | |
| iocore_attachout(0x04be, fdc_o4be); | |
| iocore_attachinp(0x04be, fdc_i4be); | |
| } | |
| iocore_attachsysoutex(0x00be, 0x0cff, fdcobe, 1); | iocore_attachsysoutex(0x00be, 0x0cff, fdcobe, 1); |
| iocore_attachsysinpex(0x00be, 0x0cff, fdcibe, 1); | iocore_attachsysinpex(0x00be, 0x0cff, fdcibe, 1); |
| } | } |