|
|
| version 1.3, 2003/10/17 11:10:02 | version 1.5, 2003/10/21 11:22:05 |
|---|---|
| Line 4 | Line 4 |
| #include "memory.h" | #include "memory.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "gdc_cmd.tbl" | |
| #include "palettes.h" | |
| #include "vram.h" | #include "vram.h" |
| #include "palettes.h" | |
| #include "gdc_cmd.tbl" | |
| #define SEARHC_SYNC | #define SEARHC_SYNC |
| #define TURE_SYNC | #define TURE_SYNC |
| extern BYTE screenupdate; | |
| static const BYTE defdegpal[4] = {0x04,0x15,0x26,0x37}; | static const BYTE defdegpal[4] = {0x04,0x15,0x26,0x37}; |
| static const BYTE defsync[8] = {0x10,0x4e,0x07,0x25,0x07,0x07,0x90,0x65}; | static const BYTE defsync[8] = {0x10,0x4e,0x07,0x25,0x07,0x07,0x90,0x65}; |
| Line 53 void gdc_setanalogpal(int color, int rgb | Line 51 void gdc_setanalogpal(int color, int rgb |
| if (!gdc.vsync) { | if (!gdc.vsync) { |
| event = palevent.event + palevent.events; | event = palevent.event + palevent.events; |
| event->clock = nevent.item[NEVENT_FLAMES].clock - | event->clock = nevent.item[NEVENT_FLAMES].clock - |
| (nevent.baseclock - nevent.remainclock); | (I286_BASECLOCK - I286_REMCLOCK); |
| event->color = (color * sizeof(RGB32)) + rgb; | event->color = (color * sizeof(RGB32)) + rgb; |
| event->value = value; | event->value = value; |
| palevent.events++; | palevent.events++; |
| Line 394 static BYTE IOINPCALL gdc_i60(UINT port) | Line 392 static BYTE IOINPCALL gdc_i60(UINT port) |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| } | } |
| #ifdef SEARHC_SYNC | #ifdef SEARHC_SYNC |
| if ((i286reg.inport) && (nevent.remainclock >= 5)) { | if ((i286reg.inport) && (I286_REMCLOCK >= 5)) { |
| UINT16 jadr = 0xfa74; | UINT16 jadr = 0xfa74; |
| UINT16 memv; | UINT16 memv; |
| memv = i286_memoryread_w(i286reg.inport); | memv = i286_memoryread_w(i286reg.inport); |
| Line 407 static BYTE IOINPCALL gdc_i60(UINT port) | Line 405 static BYTE IOINPCALL gdc_i60(UINT port) |
| memv = i286_memoryread_w(i286reg.inport + 2); | memv = i286_memoryread_w(i286reg.inport + 2); |
| if (memv == jadr) { // je | if (memv == jadr) { // je |
| if (!gdc.vsync) { | if (!gdc.vsync) { |
| nevent.remainclock = -1; | I286_REMCLOCK = -1; |
| } | } |
| } | } |
| else if (memv == (jadr + 1)) { // jne | else if (memv == (jadr + 1)) { // jne |
| if (gdc.vsync) { | if (gdc.vsync) { |
| nevent.remainclock = -1; | I286_REMCLOCK = -1; |
| } | } |
| } | } |
| } | } |
| } | } |
| #endif | #endif |
| #ifdef TURE_SYNC // クロックイベントの誤差修正 | #ifdef TURE_SYNC // クロックイベントの誤差修正 |
| if (nevent.item[NEVENT_FLAMES].clock < | if (nevent.item[NEVENT_FLAMES].clock < (I286_BASECLOCK - I286_REMCLOCK)) { |
| (nevent.baseclock - nevent.remainclock)) { | |
| ret ^= 0x20; | ret ^= 0x20; |
| } | } |
| #endif | #endif |
| Line 560 static BYTE IOINPCALL gdc_ia0(UINT port) | Line 557 static BYTE IOINPCALL gdc_ia0(UINT port) |
| gdc_work(GDCWORK_SLAVE); | gdc_work(GDCWORK_SLAVE); |
| } | } |
| #ifdef SEARHC_SYNC | #ifdef SEARHC_SYNC |
| if ((i286reg.inport) && (nevent.remainclock >= 5)) { | if ((i286reg.inport) && (I286_REMCLOCK >= 5)) { |
| UINT16 jadr = 0xfa74; | UINT16 jadr = 0xfa74; |
| UINT16 memv; | UINT16 memv; |
| memv = i286_memoryread_w(i286reg.inport); | memv = i286_memoryread_w(i286reg.inport); |
| Line 573 static BYTE IOINPCALL gdc_ia0(UINT port) | Line 570 static BYTE IOINPCALL gdc_ia0(UINT port) |
| memv = i286_memoryread_w(i286reg.inport + 2); | memv = i286_memoryread_w(i286reg.inport + 2); |
| if (memv == jadr) { // je | if (memv == jadr) { // je |
| if (!gdc.vsync) { | if (!gdc.vsync) { |
| nevent.remainclock = -1; | I286_REMCLOCK = -1; |
| } | } |
| } | } |
| else if (memv == (jadr + 1)) { // jne | else if (memv == (jadr + 1)) { // jne |
| if (gdc.vsync) { | if (gdc.vsync) { |
| nevent.remainclock = -1; | I286_REMCLOCK = -1; |
| } | } |
| } | } |
| } | } |
| } | } |
| #endif | #endif |
| #ifdef TURE_SYNC // クロックイベントの誤差修正 | #ifdef TURE_SYNC // クロックイベントの誤差修正 |
| if (nevent.item[NEVENT_FLAMES].clock < | if (nevent.item[NEVENT_FLAMES].clock < (I286_BASECLOCK - I286_REMCLOCK)) { |
| (nevent.baseclock - nevent.remainclock)) { | |
| ret ^= 0x20; | ret ^= 0x20; |
| } | } |
| #endif | #endif |