|
|
| version 1.32, 2004/03/23 22:39:40 | version 1.35, 2005/02/07 14:46:11 |
|---|---|
| Line 117 void gdc_setanalogpalall(const UINT16 *p | Line 117 void gdc_setanalogpalall(const UINT16 *p |
| gdc.anareg[(c * 3) + 1] = (pal >> 4) & 15; | gdc.anareg[(c * 3) + 1] = (pal >> 4) & 15; |
| gdc.anareg[(c * 3) + 2] = (pal >> 0) & 15; | gdc.anareg[(c * 3) + 2] = (pal >> 0) & 15; |
| #endif | #endif |
| gdc_setanalogpal(c, offsetof(RGB32, p.g), (pal >> 8) & 15); | gdc_setanalogpal(c, offsetof(RGB32, p.g), (REG8)((pal >> 8) & 15)); |
| gdc_setanalogpal(c, offsetof(RGB32, p.r), (pal >> 4) & 15); | gdc_setanalogpal(c, offsetof(RGB32, p.r), (REG8)((pal >> 4) & 15)); |
| gdc_setanalogpal(c, offsetof(RGB32, p.b), (pal >> 0) & 15); | gdc_setanalogpal(c, offsetof(RGB32, p.b), (REG8)((pal >> 0) & 15)); |
| } | } |
| } | } |
| Line 417 const GDCCLK *clk; | Line 417 const GDCCLK *clk; |
| void gdc_restorekacmode(void) { | void gdc_restorekacmode(void) { |
| BYTE bit; | UINT8 bit; |
| bit = (((!np2cfg.uPD72020) && (gdc.mode1 & 0x20))?0x00:0xff); | bit = (((!np2cfg.uPD72020) && (gdc.mode1 & 0x20))?0x00:0xff); |
| if (gdc.bitac != bit) { | if (gdc.bitac != bit) { |
| Line 490 static void IOOUTCALL gdc_o6a(UINT port, | Line 490 static void IOOUTCALL gdc_o6a(UINT port, |
| REG8 bit; | REG8 bit; |
| TRACEOUT(("port:%.4x %.2x", port, dat)); | |
| if (!(dat & 0xf8)) { | if (!(dat & 0xf8)) { |
| bit = (dat >> 1) & 3; | bit = (dat >> 1) & 3; |
| dat &= 1; | dat &= 1; |
| Line 935 static REG8 IOINPCALL gdc_iae(UINT port) | Line 937 static REG8 IOINPCALL gdc_iae(UINT port) |
| #if defined(SUPPORT_PC9821) | #if defined(SUPPORT_PC9821) |
| static void IOOUTCALL gdc_o9a0(UINT port, REG8 dat) { | static void IOOUTCALL gdc_o9a0(UINT port, REG8 dat) { |
| TRACEOUT(("port:%.4x,%.2x", port, dat)); | |
| gdc.ff2 = dat; | gdc.ff2 = dat; |
| (void)port; | (void)port; |
| } | } |