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| version 1.32, 2004/03/23 22:39:40 | version 1.37, 2005/02/27 15:07:36 |
|---|---|
| Line 117 void gdc_setanalogpalall(const UINT16 *p | Line 117 void gdc_setanalogpalall(const UINT16 *p |
| gdc.anareg[(c * 3) + 1] = (pal >> 4) & 15; | gdc.anareg[(c * 3) + 1] = (pal >> 4) & 15; |
| gdc.anareg[(c * 3) + 2] = (pal >> 0) & 15; | gdc.anareg[(c * 3) + 2] = (pal >> 0) & 15; |
| #endif | #endif |
| gdc_setanalogpal(c, offsetof(RGB32, p.g), (pal >> 8) & 15); | gdc_setanalogpal(c, offsetof(RGB32, p.g), (REG8)((pal >> 8) & 15)); |
| gdc_setanalogpal(c, offsetof(RGB32, p.r), (pal >> 4) & 15); | gdc_setanalogpal(c, offsetof(RGB32, p.r), (REG8)((pal >> 4) & 15)); |
| gdc_setanalogpal(c, offsetof(RGB32, p.b), (pal >> 0) & 15); | gdc_setanalogpal(c, offsetof(RGB32, p.b), (REG8)((pal >> 0) & 15)); |
| } | } |
| } | } |
| Line 148 void gdc_analogext(BOOL extend) { | Line 148 void gdc_analogext(BOOL extend) { |
| if (extend) { | if (extend) { |
| gdc.analog |= (1 << GDCANALOG_256); | gdc.analog |= (1 << GDCANALOG_256); |
| vramop.operate |= 0x20; | vramop.operate |= (1 << VOPBIT_VGA); |
| } | } |
| else { | else { |
| gdc.analog &= ~(1 << (GDCANALOG_256)); | gdc.analog &= ~(1 << (GDCANALOG_256)); |
| vramop.operate &= ~0x20; | vramop.operate &= ~(1 << VOPBIT_VGA); |
| } | } |
| gdcs.palchange = GDCSCRN_REDRAW; | gdcs.palchange = GDCSCRN_REDRAW; |
| gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; | gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; |
| Line 417 const GDCCLK *clk; | Line 417 const GDCCLK *clk; |
| void gdc_restorekacmode(void) { | void gdc_restorekacmode(void) { |
| BYTE bit; | UINT8 bit; |
| bit = (((!np2cfg.uPD72020) && (gdc.mode1 & 0x20))?0x00:0xff); | bit = (((!np2cfg.uPD72020) && (gdc.mode1 & 0x20))?0x00:0xff); |
| if (gdc.bitac != bit) { | if (gdc.bitac != bit) { |
| Line 503 static void IOOUTCALL gdc_o6a(UINT port, | Line 503 static void IOOUTCALL gdc_o6a(UINT port, |
| gdc.analog &= ~(1 << GDCANALOG_16); | gdc.analog &= ~(1 << GDCANALOG_16); |
| gdc.analog |= (dat << GDCANALOG_16); | gdc.analog |= (dat << GDCANALOG_16); |
| gdcs.palchange = GDCSCRN_REDRAW; | gdcs.palchange = GDCSCRN_REDRAW; |
| vramop.operate &= VOP_ANALOGMASK; | vramop.operate &= ~(1 << VOPBIT_ANALOG); |
| vramop.operate |= dat << 4; | vramop.operate |= dat << VOPBIT_ANALOG; |
| i286_vram_dispatch(vramop.operate); | i286_vram_dispatch(vramop.operate); |
| } | } |
| break; | break; |
| case 2: | case 2: |
| if ((gdc.mode2 & 0x08) && (grcg.chip == 3)) { | if ((gdc.mode2 & 0x08) && (grcg.chip == 3)) { |
| vramop.operate &= VOP_EGCMASK; | vramop.operate &= ~(1 << VOPBIT_EGC); |
| vramop.operate |= dat << 1; | vramop.operate |= dat << VOPBIT_EGC; |
| i286_vram_dispatch(vramop.operate); | i286_vram_dispatch(vramop.operate); |
| } | } |
| break; | break; |
| Line 713 static void IOOUTCALL gdc_oa4(UINT port, | Line 713 static void IOOUTCALL gdc_oa4(UINT port, |
| static void IOOUTCALL gdc_oa6(UINT port, REG8 dat) { | static void IOOUTCALL gdc_oa6(UINT port, REG8 dat) { |
| if ((gdcs.access ^ dat) & 1) { | dat = dat & 1; |
| gdcs.access = dat & 1; | if (gdcs.access != dat) { |
| vramop.operate &= VOP_ACCESSMASK; | gdcs.access = (UINT8)dat; |
| vramop.operate |= gdcs.access; | vramop.operate &= ~(1 << VOPBIT_ACCESS); |
| vramop.operate |= dat << VOPBIT_ACCESS; | |
| i286_vram_dispatch(vramop.operate); | i286_vram_dispatch(vramop.operate); |
| } | } |
| (void)port; | (void)port; |
| Line 1045 static const IOINP gdcia0[8] = { | Line 1046 static const IOINP gdcia0[8] = { |
| void gdc_biosreset(void) { | void gdc_biosreset(void) { |
| #if defined(SUPPORT_PC9821) | #if defined(SUPPORT_PC9821) |
| UINT i, j; | UINT i; |
| UINT j; | |
| UINT8 tmp; | UINT8 tmp; |
| UINT8 *pal; | UINT8 *pal; |
| #endif | #endif |
| Line 1085 void gdc_biosreset(void) { | Line 1087 void gdc_biosreset(void) { |
| gdcs.access = 0; | gdcs.access = 0; |
| gdc.analog &= ~(1 << GDCANALOG_16); | gdc.analog &= ~(1 << GDCANALOG_16); |
| gdcs.palchange = GDCSCRN_REDRAW; | gdcs.palchange = GDCSCRN_REDRAW; |
| vramop.operate &= VOP_ACCESSMASK; | |
| vramop.operate &= VOP_EGCMASK; | gdc.mode2 &= ~(1 << 0); |
| vramop.operate &= VOP_ANALOGMASK; | gdc.mode2 &= ~(1 << 2); |
| gdc.mode2 &= ~(1 << 3); | |
| gdcs.mode2 = gdc.mode2; | |
| vramop.operate &= ~(1 << VOPBIT_ACCESS); | |
| vramop.operate &= ~(1 << VOPBIT_EGC); | |
| vramop.operate &= ~(1 << VOPBIT_ANALOG); | |
| #if defined(SUPPORT_PC9821) | #if defined(SUPPORT_PC9821) |
| gdc.analog &= ~(1 << (GDCANALOG_256)); | gdc.analog &= ~(1 << (GDCANALOG_256)); |
| vramop.operate &= ~0x20; | vramop.operate &= ~(1 << VOPBIT_VGA); |
| #endif | #endif |
| i286_vram_dispatch(vramop.operate); | i286_vram_dispatch(vramop.operate); |